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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
commit | 1d933447fc62de67db938970a8308ac47189fd96 (patch) | |
tree | df7f389eeae7916c3a58082644d6929bf0e94280 /tests/quick/se/00.hello/ref/arm/linux/simple-timing | |
parent | 660fbd543f7c84dec81cd17bdb4ff08f954aec77 (diff) | |
download | gem5-1d933447fc62de67db938970a8308ac47189fd96.tar.xz |
stats: Update to match ARM ISA changes
Diffstat (limited to 'tests/quick/se/00.hello/ref/arm/linux/simple-timing')
-rwxr-xr-x | tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout | 2 | ||||
-rw-r--r-- | tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt | 10 |
2 files changed, 7 insertions, 5 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout index 1bcd9c702..daa769407 100755 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout @@ -1,3 +1,5 @@ +Redirecting stdout to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing/simout +Redirecting stderr to build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt index e99784abb..78aca14dc 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt @@ -4,10 +4,10 @@ sim_seconds 0.000028 # Nu sim_ticks 28298500 # Number of ticks simulated final_tick 28298500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 343617 # Simulator instruction rate (inst/s) -host_op_rate 400476 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2123290642 # Simulator tick rate (ticks/s) -host_mem_usage 263372 # Number of bytes of host memory used +host_inst_rate 311400 # Simulator instruction rate (inst/s) +host_op_rate 363255 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1927478424 # Simulator tick rate (ticks/s) +host_mem_usage 306584 # Number of bytes of host memory used host_seconds 0.01 # Real time elapsed on the host sim_insts 4566 # Number of instructions simulated sim_ops 5330 # Number of ops (including micro ops) simulated @@ -158,7 +158,7 @@ system.cpu.num_func_calls 203 # nu system.cpu.num_conditional_control_insts 722 # number of instructions that are conditional controls system.cpu.num_int_insts 4624 # number of integer instructions system.cpu.num_fp_insts 16 # number of float instructions -system.cpu.num_int_register_reads 7573 # number of times the integer registers were read +system.cpu.num_int_register_reads 7538 # number of times the integer registers were read system.cpu.num_int_register_writes 2728 # number of times the integer registers were written system.cpu.num_fp_register_reads 16 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written |