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authorAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
commitb63631536d974f31cf99ee280271dc0f7b4c746f (patch)
treeff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/quick/se/00.hello/ref/mips/linux
parent646c4a23ca44aab5468c896034288151c89be782 (diff)
downloadgem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models. The main reason for bundling them up is to minimise the changeset size.
Diffstat (limited to 'tests/quick/se/00.hello/ref/mips/linux')
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt93
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt93
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt84
3 files changed, 136 insertions, 134 deletions
diff --git a/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt
index b2a150376..aeb0e2e25 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000025 # Nu
sim_ticks 24587000 # Number of ticks simulated
final_tick 24587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 41260 # Simulator instruction rate (inst/s)
-host_op_rate 41253 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 174426700 # Simulator tick rate (ticks/s)
-host_mem_usage 226212 # Number of bytes of host memory used
-host_seconds 0.14 # Real time elapsed on the host
+host_inst_rate 52979 # Simulator instruction rate (inst/s)
+host_op_rate 52966 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 223940501 # Simulator tick rate (ticks/s)
+host_mem_usage 224928 # Number of bytes of host memory used
+host_seconds 0.11 # Real time elapsed on the host
sim_insts 5814 # Number of instructions simulated
sim_ops 5814 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 20288 # Number of bytes read from this memory
@@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 825151503 # In
system.physmem.bw_total::cpu.inst 825151503 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 359214219 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 1184365722 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 455 # Total number of read requests seen
-system.physmem.writeReqs 0 # Total number of write requests seen
-system.physmem.cpureqs 455 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 455 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 455 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 29120 # Total number of bytes read from memory
system.physmem.bytesWritten 0 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 29120 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 28 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis
@@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq 404 # Tr
system.membus.trans_dist::ReadResp 404 # Transaction distribution
system.membus.trans_dist::ReadExReq 51 # Transaction distribution
system.membus.trans_dist::ReadExResp 51 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 910 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 910 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 29120 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 29120 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 910 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 910 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 29120 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 29120 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 29120 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 551500 # Layer occupancy (ticks)
@@ -293,15 +294,15 @@ system.cpu.stage3.utilization 2.517539 # Pe
system.cpu.stage4.idleCycles 46285 # Number of cycles 0 instructions are processed.
system.cpu.stage4.runCycles 2890 # Number of cycles 1+ instructions are processed.
system.cpu.stage4.utilization 5.876970 # Percentage of cycles stage was utilized (processing insts).
-system.cpu.icache.tags.replacements 13 # number of replacements
-system.cpu.icache.tags.tagsinuse 150.350232 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 428 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 319 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 1.341693 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 150.350232 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.073413 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.073413 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 13 # number of replacements
+system.cpu.icache.tags.tagsinuse 150.350232 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 428 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 319 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 1.341693 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 150.350232 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.073413 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.073413 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 428 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 428 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 428 # number of demand (read+write) hits
@@ -382,12 +383,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 406 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 406 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 51 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 51 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 638 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 276 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 914 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 20416 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8832 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 29248 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 638 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 276 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 914 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 20416 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8832 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 29248 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 29248 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 228500 # Layer occupancy (ticks)
@@ -396,17 +397,17 @@ system.cpu.toL2Bus.respLayer0.occupancy 543000 # La
system.cpu.toL2Bus.respLayer0.utilization 2.2 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 228000 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%)
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 208.008874 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 404 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.004950 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 152.043119 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 55.965756 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 208.008874 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 404 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.004950 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 152.043119 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 55.965756 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004640 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.001708 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.006348 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.006348 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 2 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 2 # number of ReadReq hits
system.cpu.l2cache.demand_hits::cpu.inst 2 # number of demand (read+write) hits
@@ -521,15 +522,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 57861.198738
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 62804.347826 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 59360.439560 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 89.984709 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 1638 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 11.869565 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 89.984709 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.021969 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.021969 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 89.984709 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 1638 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 11.869565 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 89.984709 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.021969 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.021969 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 1066 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 1066 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 572 # number of WriteReq hits
diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt
index 6a930873f..f0a85d261 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000022 # Nu
sim_ticks 21805500 # Number of ticks simulated
final_tick 21805500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 79844 # Simulator instruction rate (inst/s)
-host_op_rate 79828 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 337538221 # Simulator tick rate (ticks/s)
-host_mem_usage 228256 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_inst_rate 44396 # Simulator instruction rate (inst/s)
+host_op_rate 44386 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 187676879 # Simulator tick rate (ticks/s)
+host_mem_usage 228012 # Number of bytes of host memory used
+host_seconds 0.12 # Real time elapsed on the host
sim_insts 5156 # Number of instructions simulated
sim_ops 5156 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 21440 # Number of bytes read from this memory
@@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 983238174 # In
system.physmem.bw_total::cpu.inst 983238174 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 416775584 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 1400013758 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 477 # Total number of read requests seen
-system.physmem.writeReqs 0 # Total number of write requests seen
-system.physmem.cpureqs 477 # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs 477 # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts 477 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
system.physmem.bytesRead 30528 # Total number of bytes read from memory
system.physmem.bytesWritten 0 # Total number of bytes written to memory
system.physmem.bytesConsumedRd 30528 # bytesRead derated as per pkt->getSize()
system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q
system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
system.physmem.perBankRdReqs::0 30 # Track reads on a per bank basis
system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis
@@ -194,10 +195,10 @@ system.membus.trans_dist::ReadReq 426 # Tr
system.membus.trans_dist::ReadResp 426 # Transaction distribution
system.membus.trans_dist::ReadExReq 51 # Transaction distribution
system.membus.trans_dist::ReadExResp 51 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 954 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 954 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 30528 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 30528 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 954 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 954 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 30528 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 30528 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 30528 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 605000 # Layer occupancy (ticks)
@@ -495,12 +496,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 429 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 429 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 51 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 51 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 676 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 284 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 960 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 21632 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 9088 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 30720 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 676 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 284 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 960 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 21632 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9088 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 30720 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 30720 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 240000 # Layer occupancy (ticks)
@@ -509,15 +510,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 573500 # La
system.cpu.toL2Bus.respLayer0.utilization 2.6 # Layer utilization (%)
system.cpu.toL2Bus.respLayer1.occupancy 230000 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%)
-system.cpu.icache.tags.replacements 17 # number of replacements
-system.cpu.icache.tags.tagsinuse 160.845390 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 1531 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 338 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 4.529586 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 160.845390 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.078538 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.078538 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 17 # number of replacements
+system.cpu.icache.tags.tagsinuse 160.845390 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 1531 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 338 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 4.529586 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 160.845390 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.078538 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.078538 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 1531 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 1531 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 1531 # number of demand (read+write) hits
@@ -593,17 +594,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 70585.798817
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 70585.798817 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 70585.798817 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 220.792115 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 426 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.007042 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 163.133804 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 57.658310 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 220.792115 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 426 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.007042 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 163.133804 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 57.658310 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004978 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.001760 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.006738 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.006738 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 3 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 3 # number of ReadReq hits
system.cpu.l2cache.demand_hits::cpu.inst 3 # number of demand (read+write) hits
@@ -718,15 +719,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 57459.701493
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64862.676056 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 59663.522013 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 91.308892 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 2395 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 142 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 16.866197 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 91.308892 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.022292 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.022292 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 91.308892 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 2395 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 142 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 16.866197 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 91.308892 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.022292 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.022292 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 1832 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 1832 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 563 # number of WriteReq hits
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt
index bfb8470a6..d3256ea4d 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000032 # Nu
sim_ticks 31633000 # Number of ticks simulated
final_tick 31633000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 482351 # Simulator instruction rate (inst/s)
-host_op_rate 481309 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2613274672 # Simulator tick rate (ticks/s)
-host_mem_usage 225064 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 304637 # Simulator instruction rate (inst/s)
+host_op_rate 304230 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1653175117 # Simulator tick rate (ticks/s)
+host_mem_usage 224940 # Number of bytes of host memory used
+host_seconds 0.02 # Real time elapsed on the host
sim_insts 5814 # Number of instructions simulated
sim_ops 5814 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 19264 # Number of bytes read from this memory
@@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 388 # Tr
system.membus.trans_dist::ReadResp 388 # Transaction distribution
system.membus.trans_dist::ReadExReq 51 # Transaction distribution
system.membus.trans_dist::ReadExResp 51 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 878 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 878 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 28096 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 28096 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 878 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 878 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28096 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 28096 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 28096 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 439000 # Layer occupancy (ticks)
@@ -83,15 +83,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 63266 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 13 # number of replacements
-system.cpu.icache.tags.tagsinuse 132.545353 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 5513 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 303 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 18.194719 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 132.545353 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.064719 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.064719 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 13 # number of replacements
+system.cpu.icache.tags.tagsinuse 132.545353 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 5513 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 303 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 18.194719 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 132.545353 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.064719 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.064719 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 5513 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 5513 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 5513 # number of demand (read+write) hits
@@ -161,17 +161,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 52722.772277
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52722.772277 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 52722.772277 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 0 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 188.114191 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 388 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 0.005155 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 133.890657 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 54.223533 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 188.114191 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 388 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0.005155 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 133.890657 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 54.223533 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004086 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.001655 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.005741 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.005741 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 2 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 2 # number of ReadReq hits
system.cpu.l2cache.demand_hits::cpu.inst 2 # number of demand (read+write) hits
@@ -286,15 +286,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 87.492114 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 1950 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 14.130435 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 87.492114 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.021360 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.021360 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 87.492114 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 1950 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 14.130435 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 87.492114 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.021360 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.021360 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 1076 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 1076 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 874 # number of WriteReq hits
@@ -389,12 +389,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 390 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 390 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 51 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 51 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 606 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 276 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 882 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 19392 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8832 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 28224 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 606 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 276 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 882 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 19392 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8832 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 28224 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 28224 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 220500 # Layer occupancy (ticks)