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authorNilay Vaish <nilay@cs.wisc.edu>2014-09-01 16:55:52 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2014-09-01 16:55:52 -0500
commitfa1fbcf020ee9aacdd4a7a09e81a633e09bad97a (patch)
treeec6cf719a27b279e250d9201c6af5143df649003 /tests/quick/se/00.hello/ref/mips
parent2cbe7c705be1cce44c5581fa58569cd95cc0f62d (diff)
downloadgem5-fa1fbcf020ee9aacdd4a7a09e81a633e09bad97a.tar.xz
stats: updates due to recent ruby and x86 changes
Also updates many out of date config files.
Diffstat (limited to 'tests/quick/se/00.hello/ref/mips')
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini43
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini17
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini20
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini32
-rw-r--r--tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini20
5 files changed, 112 insertions, 20 deletions
diff --git a/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini
index 734275a58..a47df6208 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini
@@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
+load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
@@ -36,7 +38,9 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -78,6 +82,7 @@ numThreads=1
profile=0
progress_interval=0
simpoint_start_insts=
+socket_id=0
stageTracing=false
stageWidth=4
switched_out=false
@@ -255,7 +260,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/hello/bin/mips/linux/hello
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello
gid=100
input=cin
max_stack_size=67108864
@@ -269,9 +274,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
@@ -284,9 +299,9 @@ master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
-type=SimpleDRAM
+type=DRAMCtrl
activation_limit=4
-addr_mapping=RaBaChCo
+addr_mapping=RoRaBaChCo
banks_per_rank=8
burst_length=8
channels=1
@@ -297,27 +312,33 @@ device_rowbuffer_size=1024
devices_per_rank=8
eventq_index=0
in_addr_map=true
+max_accesses_per_row=16
mem_sched_policy=frfcfs
+min_writes_per_switch=16
null=false
-page_policy=open
+page_policy=open_adaptive
range=0:134217727
ranks_per_channel=2
read_buffer_size=32
static_backend_latency=10000
static_frontend_latency=10000
tBURST=5000
+tCK=1250
tCL=13750
tRAS=35000
tRCD=13750
tREFI=7800000
-tRFC=300000
+tRFC=260000
tRP=13750
-tRRD=6250
+tRRD=6000
+tRTP=7500
+tRTW=2500
+tWR=15000
tWTR=7500
-tXAW=40000
-write_buffer_size=32
-write_high_thresh_perc=70
-write_low_thresh_perc=0
+tXAW=30000
+write_buffer_size=64
+write_high_thresh_perc=85
+write_low_thresh_perc=50
port=system.membus.master[0]
[system.voltage_domain]
diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini
index d92641c25..1f8305e4e 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini
@@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
@@ -37,7 +38,9 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -603,7 +606,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/mips/linux/hello
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello
gid=100
input=cin
max_stack_size=67108864
@@ -617,9 +620,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini
index cb74c0ee3..a20aef42c 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini
+++ b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini
@@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
+load_offset=0
mem_mode=atomic
mem_ranges=
memories=system.physmem
@@ -36,12 +38,15 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
type=AtomicSimpleCPU
children=dtb interrupts isa itb tracer workload
+branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
@@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
+socket_id=0
switched_out=false
system=system
tracer=system.cpu.tracer
@@ -111,7 +117,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/hello/bin/mips/linux/hello
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello
gid=100
input=cin
max_stack_size=67108864
@@ -125,9 +131,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
index a69535826..e05997c32 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
+++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
@@ -10,13 +10,14 @@ time_sync_spin_threshold=100000
[system]
type=System
-children=clk_domain cpu physmem ruby sys_port_proxy voltage_domain
+children=clk_domain cpu dvfs_handler physmem ruby sys_port_proxy voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
load_offset=0
mem_mode=timing
@@ -37,7 +38,9 @@ system_port=system.sys_port_proxy.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -76,7 +79,9 @@ icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
[system.cpu.clk_domain]
type=SrcClockDomain
clock=1
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu.dtb]
@@ -124,6 +129,14 @@ simpoint=0
system=system
uid=100
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000
+
[system.physmem]
type=SimpleMemory
bandwidth=0.000000
@@ -153,7 +166,9 @@ randomization=false
[system.ruby.clk_domain]
type=SrcClockDomain
clock=1
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.ruby.dir_cntrl0]
@@ -172,6 +187,11 @@ recycle_latency=10
ruby_system=system.ruby
transitions_per_cycle=4
version=0
+dmaRequestToDir=system.ruby.network.master[3]
+dmaResponseFromDir=system.ruby.network.slave[3]
+forwardFromDir=system.ruby.network.slave[4]
+requestToDir=system.ruby.network.master[2]
+responseFromDir=system.ruby.network.slave[2]
[system.ruby.dir_cntrl0.directory]
type=RubyDirectoryMemory
@@ -211,7 +231,7 @@ children=cacheMemory sequencer
buffer_size=0
cacheMemory=system.ruby.l1_cntrl0.cacheMemory
cache_response_latency=12
-clk_domain=system.ruby.clk_domain
+clk_domain=system.cpu.clk_domain
cluster_id=0
eventq_index=0
issue_latency=2
@@ -223,6 +243,10 @@ send_evictions=false
sequencer=system.ruby.l1_cntrl0.sequencer
transitions_per_cycle=4
version=0
+forwardToCache=system.ruby.network.master[0]
+requestFromCache=system.ruby.network.slave[0]
+responseFromCache=system.ruby.network.slave[1]
+responseToCache=system.ruby.network.master[1]
[system.ruby.l1_cntrl0.cacheMemory]
type=RubyCache
@@ -242,7 +266,7 @@ tagArrayBanks=1
[system.ruby.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
-clk_domain=system.ruby.clk_domain
+clk_domain=system.cpu.clk_domain
dcache=system.ruby.l1_cntrl0.cacheMemory
deadlock_threshold=500000
eventq_index=0
@@ -279,6 +303,8 @@ number_of_virtual_networks=10
routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2
ruby_system=system.ruby
topology=Crossbar
+master=system.ruby.l1_cntrl0.forwardToCache system.ruby.l1_cntrl0.responseToCache system.ruby.dir_cntrl0.requestToDir system.ruby.dir_cntrl0.dmaRequestToDir
+slave=system.ruby.l1_cntrl0.requestFromCache system.ruby.l1_cntrl0.responseFromCache system.ruby.dir_cntrl0.responseFromDir system.ruby.dir_cntrl0.dmaResponseFromDir system.ruby.dir_cntrl0.forwardFromDir
[system.ruby.network.ext_links0]
type=SimpleExtLink
diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini
index 943508ee9..1ce9455cf 100644
--- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini
@@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000
[system]
type=System
-children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
+children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
+kernel_addr_check=true
load_addr_mask=1099511627775
+load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
@@ -36,12 +38,15 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
[system.cpu]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
+branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
@@ -63,6 +68,7 @@ numThreads=1
profile=0
progress_interval=0
simpoint_start_insts=
+socket_id=0
switched_out=false
system=system
tracer=system.cpu.tracer
@@ -220,7 +226,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/hello/bin/mips/linux/hello
+executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello
gid=100
input=cin
max_stack_size=67108864
@@ -234,9 +240,19 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+domain_id=-1
eventq_index=0
+init_perf_level=0
voltage_domain=system.voltage_domain
+[system.dvfs_handler]
+type=DVFSHandler
+domains=
+enable=false
+eventq_index=0
+sys_clk_domain=system.clk_domain
+transition_latency=100000000
+
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain