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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt | |
parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt')
-rw-r--r-- | tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt index 9bd3a3844..bf93774ff 100644 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000018 # Nu sim_ticks 18469500 # Number of ticks simulated final_tick 18469500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 100626 # Simulator instruction rate (inst/s) -host_op_rate 100602 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 320728752 # Simulator tick rate (ticks/s) -host_mem_usage 223260 # Number of bytes of host memory used -host_seconds 0.06 # Real time elapsed on the host +host_inst_rate 33738 # Simulator instruction rate (inst/s) +host_op_rate 33735 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 107564291 # Simulator tick rate (ticks/s) +host_mem_usage 225768 # Number of bytes of host memory used +host_seconds 0.17 # Real time elapsed on the host sim_insts 5792 # Number of instructions simulated sim_ops 5792 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 22080 # Number of bytes read from this memory @@ -285,8 +285,8 @@ system.cpu.rename.IQFullEvents 4 # Nu system.cpu.rename.LSQFullEvents 226 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 9701 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 18192 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 18137 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 55 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 18166 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 26 # Number of floating rename lookups system.cpu.rename.CommittedMaps 4998 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 4703 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 27 # count of serializing insts renamed |