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authorNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
committerNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
commit4a644767c58754339965cecc5d85853255652a30 (patch)
treee435caa3b1ba7f5e395c58ca0fdfdfa91804d2dd /tests/quick/se/00.hello/ref/power/linux/simple-atomic
parent55411f7f713a42f67552a9621051fae8f7869648 (diff)
downloadgem5-4a644767c58754339965cecc5d85853255652a30.tar.xz
stats: update stats for no_value -> nan
Lots of accumulated older changes too.
Diffstat (limited to 'tests/quick/se/00.hello/ref/power/linux/simple-atomic')
-rw-r--r--tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini17
-rwxr-xr-xtests/quick/se/00.hello/ref/power/linux/simple-atomic/simout8
-rw-r--r--tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt8
3 files changed, 18 insertions, 15 deletions
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
index 252e46831..0a48b581e 100644
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
+++ b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
mem_mode=atomic
memories=system.physmem
num_work_ids=16
-physmem=system.physmem
readfile=
symbolfile=
work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
[system.cpu]
type=AtomicSimpleCPU
@@ -40,6 +39,7 @@ do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
+fastmem=false
function_trace=false
function_trace_start=0
interrupts=system.cpu.interrupts
@@ -58,8 +58,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
-dcache_port=system.membus.port[3]
-icache_port=system.membus.port[2]
+dcache_port=system.membus.slave[2]
+icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=PowerTLB
@@ -102,15 +102,18 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+master=system.physmem.port[0]
+slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[1]
+port=system.membus.master[0]
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
index 2b3bb9fb6..4ba999389 100755
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
+++ b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 11 2012 13:07:55
-gem5 started Feb 11 2012 13:55:02
-gem5 executing on zizzer
-command line: build/POWER/gem5.fast -d build/POWER/tests/fast/quick/se/00.hello/power/linux/simple-atomic -re tests/run.py build/POWER/tests/fast/quick/se/00.hello/power/linux/simple-atomic
+gem5 compiled May 8 2012 15:03:54
+gem5 started May 8 2012 15:36:50
+gem5 executing on piton
+command line: build/POWER/gem5.opt -d build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic -re tests/run.py build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Hello world!
diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
index 5d83b2bac..87b1b3e66 100644
--- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
@@ -4,10 +4,10 @@ sim_seconds 0.000003 # Nu
sim_ticks 2900000 # Number of ticks simulated
final_tick 2900000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 430782 # Simulator instruction rate (inst/s)
-host_op_rate 430227 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 214814147 # Simulator tick rate (ticks/s)
-host_mem_usage 197864 # Number of bytes of host memory used
+host_inst_rate 413372 # Simulator instruction rate (inst/s)
+host_op_rate 412979 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 206267825 # Simulator tick rate (ticks/s)
+host_mem_usage 201744 # Number of bytes of host memory used
host_seconds 0.01 # Real time elapsed on the host
sim_insts 5801 # Number of instructions simulated
sim_ops 5801 # Number of ops (including micro ops) simulated