stats: Cumulative stats update

This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.

The main reason for bundling them up is to minimise the changeset
size.

1 files changed, 47 insertions, 46 deletions

diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
index 50311c18c..9bd3a3844 100644
--- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000018                       # Nu
 sim_ticks                                    18469500                       # Number of ticks simulated
 final_tick                                   18469500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                  54927                       # Simulator instruction rate (inst/s)
-host_op_rate                                    54916                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              175080000                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 224296                       # Number of bytes of host memory used
-host_seconds                                     0.11                       # Real time elapsed on the host
+host_inst_rate                                 100626                       # Simulator instruction rate (inst/s)
+host_op_rate                                   100602                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              320728752                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 223260                       # Number of bytes of host memory used
+host_seconds                                     0.06                       # Real time elapsed on the host
 sim_insts                                        5792                       # Number of instructions simulated
 sim_ops                                          5792                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             22080                       # Number of bytes read from this memory
@@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total         1195484447                       # In
 system.physmem.bw_total::cpu.inst          1195484447                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data           349982403                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total             1545466851                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs                           446                       # Total number of read requests seen
-system.physmem.writeReqs                            0                       # Total number of write requests seen
-system.physmem.cpureqs                            446                       # Reqs generatd by CPU via cache - shady
+system.physmem.readReqs                           446                       # Total number of read requests accepted by DRAM controller
+system.physmem.writeReqs                            0                       # Total number of write requests accepted by DRAM controller
+system.physmem.readBursts                         446                       # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
+system.physmem.writeBursts                          0                       # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
 system.physmem.bytesRead                        28544                       # Total number of bytes read from memory
 system.physmem.bytesWritten                         0                       # Total number of bytes written to memory
 system.physmem.bytesConsumedRd                  28544                       # bytesRead derated as per pkt->getSize()
 system.physmem.bytesConsumedWr                      0                       # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ                        0                       # Number of read reqs serviced by write Q
+system.physmem.servicedByWrQ                        0                       # Number of DRAM read bursts serviced by write Q
 system.physmem.neitherReadNorWrite                  0                       # Reqs where no action is needed
 system.physmem.perBankRdReqs::0                    70                       # Track reads on a per bank basis
 system.physmem.perBankRdReqs::1                    42                       # Track reads on a per bank basis
@@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq                 399                       # Tr
 system.membus.trans_dist::ReadResp                399                       # Transaction distribution
 system.membus.trans_dist::ReadExReq                47                       # Transaction distribution
 system.membus.trans_dist::ReadExResp               47                       # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side          892                       # Packet count per connected master and slave (bytes)
-system.membus.pkt_count                           892                       # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side        28544                       # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size                      28544                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port          892                       # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total                    892                       # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port        28544                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total               28544                       # Cumulative packet size per connected master and slave (bytes)
 system.membus.data_through_bus                  28544                       # Total data (bytes)
 system.membus.snoop_data_through_bus                0                       # Total snoop data (bytes)
 system.membus.reqLayer0.occupancy              565000                       # Layer occupancy (ticks)
@@ -493,12 +494,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq            406                       # Tr
 system.cpu.toL2Bus.trans_dist::ReadResp           406                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::ReadExReq           47                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::ReadExResp           47                       # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side          702                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side          204                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count                      906                       # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side        22464                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side         6528                       # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size                 28992                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side          702                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side          204                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total               906                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        22464                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         6528                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total          28992                       # Cumulative packet size per connected master and slave (bytes)
 system.cpu.toL2Bus.data_through_bus             28992                       # Total data (bytes)
 system.cpu.toL2Bus.snoop_data_through_bus            0                       # Total snoop data (bytes)
 system.cpu.toL2Bus.reqLayer0.occupancy         226500                       # Layer occupancy (ticks)
@@ -507,15 +508,15 @@ system.cpu.toL2Bus.respLayer0.occupancy        590750                       # La
 system.cpu.toL2Bus.respLayer0.utilization          3.2                       # Layer utilization (%)
 system.cpu.toL2Bus.respLayer1.occupancy        163000                       # Layer occupancy (ticks)
 system.cpu.toL2Bus.respLayer1.utilization          0.9                       # Layer utilization (%)
-system.cpu.icache.tags.replacements                      0                       # number of replacements
-system.cpu.icache.tags.tagsinuse                167.253035                       # Cycle average of tags in use
-system.cpu.icache.tags.total_refs                     1372                       # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs                    351                       # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs                   3.908832                       # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst     167.253035                       # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst      0.081667                       # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total         0.081667                       # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements                 0                       # number of replacements
+system.cpu.icache.tags.tagsinuse           167.253035                       # Cycle average of tags in use
+system.cpu.icache.tags.total_refs                1372                       # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs               351                       # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs              3.908832                       # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst   167.253035                       # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst     0.081667                       # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total     0.081667                       # Average percentage of cache occupancy
 system.cpu.icache.ReadReq_hits::cpu.inst         1372                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total            1372                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst          1372                       # number of demand (read+write) hits
@@ -591,17 +592,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 66831.196581
 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 66831.196581                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::total 66831.196581                       # average overall mshr miss latency
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements                     0                       # number of replacements
-system.cpu.l2cache.tags.tagsinuse               197.401673                       # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs                       7                       # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs                   399                       # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs                  0.017544                       # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle                     0                       # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::cpu.inst    166.141608                       # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data     31.260065                       # Average occupied blocks per requestor
+system.cpu.l2cache.tags.replacements                0                       # number of replacements
+system.cpu.l2cache.tags.tagsinuse          197.401673                       # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs                  7                       # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs              399                       # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs             0.017544                       # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle                0                       # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst   166.141608                       # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data    31.260065                       # Average occupied blocks per requestor
 system.cpu.l2cache.tags.occ_percent::cpu.inst     0.005070                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::cpu.data     0.000954                       # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total        0.006024                       # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total     0.006024                       # Average percentage of cache occupancy
 system.cpu.l2cache.ReadReq_hits::cpu.inst            6                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.data            1                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::total              7                       # number of ReadReq hits
@@ -719,15 +720,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54186.231884
 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64608.910891                       # average overall mshr miss latency
 system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56546.524664                       # average overall mshr miss latency
 system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements                      0                       # number of replacements
-system.cpu.dcache.tags.tagsinuse                 63.117277                       # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs                     2192                       # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs                    102                       # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs                  21.490196                       # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data      63.117277                       # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data      0.015409                       # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total         0.015409                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements                 0                       # number of replacements
+system.cpu.dcache.tags.tagsinuse            63.117277                       # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs                2192                       # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs               102                       # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs             21.490196                       # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle                 0                       # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data    63.117277                       # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data     0.015409                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total     0.015409                       # Average percentage of cache occupancy
 system.cpu.dcache.ReadReq_hits::cpu.data         1473                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total            1473                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data          719                       # number of WriteReq hits