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authorAndreas Hansson <andreas.hansson@arm.com>2012-09-10 11:57:47 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-09-10 11:57:47 -0400
commit0b1108c7a3a71bc994e9af00b992c2c693c65e97 (patch)
treeeead52c8d8c5bc2db64033ef63760a073077bf35 /tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
parent9e0edbcea8d14446487f13f56b65c669ba580673 (diff)
downloadgem5-0b1108c7a3a71bc994e9af00b992c2c693c65e97.tar.xz
Ruby: Bump the stats after recent memory controller changes
This patch simply bumps the stats to avoid having failing regressions. Someone with more insight in the changes should verify that these differences all make sense.
Diffstat (limited to 'tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt')
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt40
1 files changed, 20 insertions, 20 deletions
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
index 4125da946..59ceed6d6 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
@@ -1,14 +1,14 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.000253 # Number of seconds simulated
-sim_ticks 253364 # Number of ticks simulated
-final_tick 253364 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.000108 # Number of seconds simulated
+sim_ticks 107952 # Number of ticks simulated
+final_tick 107952 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 38246 # Simulator instruction rate (inst/s)
-host_op_rate 38242 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1818652 # Simulator tick rate (ticks/s)
-host_mem_usage 240496 # Number of bytes of host memory used
-host_seconds 0.14 # Real time elapsed on the host
+host_inst_rate 10153 # Simulator instruction rate (inst/s)
+host_op_rate 10153 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 205737 # Simulator tick rate (ticks/s)
+host_mem_usage 240612 # Number of bytes of host memory used
+host_seconds 0.52 # Real time elapsed on the host
sim_insts 5327 # Number of instructions simulated
sim_ops 5327 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 21480 # Number of bytes read from this memory
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data 715 # Nu
system.physmem.num_reads::total 6085 # Number of read requests responded to by this memory
system.physmem.num_writes::cpu.data 673 # Number of write requests responded to by this memory
system.physmem.num_writes::total 673 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst 84779211 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 18163591 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 102942802 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 84779211 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 84779211 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data 19991001 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 19991001 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 84779211 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 38154592 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 122933803 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst 198977323 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 42630058 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 241607381 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 198977323 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 198977323 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data 46919001 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 46919001 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 198977323 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 89549059 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 288526382 # Total bandwidth to/from this memory (bytes/s)
system.l1_cntrl0.cacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl0.cacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl0.cacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -40,7 +40,7 @@ system.l1_cntrl0.cacheMemory.num_tag_array_writes 0
system.l1_cntrl0.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.cpu.workload.num_syscalls 11 # Number of system calls
-system.cpu.numCycles 253364 # number of cpu cycles simulated
+system.cpu.numCycles 107952 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 5327 # Number of instructions committed
@@ -59,7 +59,7 @@ system.cpu.num_mem_refs 1401 # nu
system.cpu.num_load_insts 723 # Number of load instructions
system.cpu.num_store_insts 678 # Number of store instructions
system.cpu.num_idle_cycles 0 # Number of idle cycles
-system.cpu.num_busy_cycles 253364 # Number of busy cycles
+system.cpu.num_busy_cycles 107952 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles