stats: Update the stats to reflect bus and memory changes

This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.

1 files changed, 39 insertions, 5 deletions

diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
index 4cc5c5030..404dd533e 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000028                       # Nu
 sim_ticks                                    27800000                       # Number of ticks simulated
 final_tick                                   27800000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 116604                       # Simulator instruction rate (inst/s)
-host_op_rate                                   116555                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              608021957                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 277492                       # Number of bytes of host memory used
-host_seconds                                     0.05                       # Real time elapsed on the host
+host_inst_rate                                 413138                       # Simulator instruction rate (inst/s)
+host_op_rate                                   412367                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             2148212772                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 231400                       # Number of bytes of host memory used
+host_seconds                                     0.01                       # Real time elapsed on the host
 sim_insts                                        5327                       # Number of instructions simulated
 sim_ops                                          5327                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             16320                       # Number of bytes read from this memory
@@ -27,6 +27,21 @@ system.physmem.bw_inst_read::total          587050360                       # In
 system.physmem.bw_total::cpu.inst           587050360                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data           308489209                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total              895539568                       # Total bandwidth to/from this memory (bytes/s)
+system.membus.throughput                    895539568                       # Throughput (bytes/s)
+system.membus.trans_dist::ReadReq                 308                       # Transaction distribution
+system.membus.trans_dist::ReadResp                308                       # Transaction distribution
+system.membus.trans_dist::ReadExReq                81                       # Transaction distribution
+system.membus.trans_dist::ReadExResp               81                       # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side          778                       # Packet count per connected master and slave (bytes)
+system.membus.pkt_count                           778                       # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side        24896                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size                      24896                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.data_through_bus                  24896                       # Total data (bytes)
+system.membus.snoop_data_through_bus                0                       # Total snoop data (bytes)
+system.membus.reqLayer0.occupancy              389000                       # Layer occupancy (ticks)
+system.membus.reqLayer0.utilization               1.4                       # Layer utilization (%)
+system.membus.respLayer1.occupancy            3501000                       # Layer occupancy (ticks)
+system.membus.respLayer1.utilization             12.6                       # Layer utilization (%)
 system.cpu.workload.num_syscalls                   11                       # Number of system calls
 system.cpu.numCycles                            55600                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
@@ -354,5 +369,24 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::total 52688.888889
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 52688.888889                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 52688.888889                       # average overall mshr miss latency
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
+system.cpu.toL2Bus.throughput               902446043                       # Throughput (bytes/s)
+system.cpu.toL2Bus.trans_dist::ReadReq            311                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp           311                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExReq           81                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExResp           81                       # Transaction distribution
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side          514                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side          270                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count                      784                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side        16448                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side         8640                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size                 25088                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.data_through_bus             25088                       # Total data (bytes)
+system.cpu.toL2Bus.snoop_data_through_bus            0                       # Total snoop data (bytes)
+system.cpu.toL2Bus.reqLayer0.occupancy         196000                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.reqLayer0.utilization          0.7                       # Layer utilization (%)
+system.cpu.toL2Bus.respLayer0.occupancy        385500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.utilization          1.4                       # Layer utilization (%)
+system.cpu.toL2Bus.respLayer1.occupancy        202500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.utilization          0.7                       # Layer utilization (%)
 
 ---------- End Simulation Statistics   ----------