stats: Add power stats to test references

Change-Id: Ic827213134b199446822f128b81d4a480e777fee

3 files changed, 40 insertions, 13 deletions

diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
index 0889a55c9..5963e613d 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.000003                       # Nu
 sim_ticks                                     2694500                       # Number of ticks simulated
 final_tick                                    2694500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 633206                       # Simulator instruction rate (inst/s)
-host_op_rate                                   631372                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              318532177                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 236156                       # Number of bytes of host memory used
+host_inst_rate                                 770174                       # Simulator instruction rate (inst/s)
+host_op_rate                                   769174                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              388618840                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 281084                       # Number of bytes of host memory used
 host_seconds                                     0.01                       # Real time elapsed on the host
 sim_insts                                        5327                       # Number of instructions simulated
 sim_ops                                          5327                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED      2694500                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst             21480                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data              4602                       # Number of bytes read from this memory
 system.physmem.bytes_read::total                26082                       # Number of bytes read from this memory
@@ -35,8 +36,10 @@ system.physmem.bw_write::total             1879755057                       # Wr
 system.physmem.bw_total::cpu.inst          7971794396                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data          3587678605                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total            11559473001                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED      2694500                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.workload.num_syscalls                   11                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON         2694500                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                             5390                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -95,6 +98,7 @@ system.cpu.op_class::MemWrite                     678     12.63%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                       5370                       # Class of executed instruction
+system.membus.pwrStateResidencyTicks::UNDEFINED      2694500                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadReq                6085                       # Transaction distribution
 system.membus.trans_dist::ReadResp               6085                       # Transaction distribution
 system.membus.trans_dist::WriteReq                673                       # Transaction distribution
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
index 3a583092f..3b20a8d52 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.000082                       # Nu
 sim_ticks                                       81703                       # Number of ticks simulated
 final_tick                                      81703                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  79389                       # Simulator instruction rate (inst/s)
-host_op_rate                                    79372                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1217125                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 409468                       # Number of bytes of host memory used
-host_seconds                                     0.07                       # Real time elapsed on the host
+host_inst_rate                                 107011                       # Simulator instruction rate (inst/s)
+host_op_rate                                   106993                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                1640735                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 456212                       # Number of bytes of host memory used
+host_seconds                                     0.05                       # Real time elapsed on the host
 sim_insts                                        5327                       # Number of instructions simulated
 sim_ops                                          5327                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                             1                       # Clock period in ticks
+system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.mem_ctrls.bytes_read::ruby.dir_cntrl0        82496                       # Number of bytes read from this memory
 system.mem_ctrls.bytes_read::total              82496                       # Number of bytes read from this memory
 system.mem_ctrls.bytes_written::ruby.dir_cntrl0        82240                       # Number of bytes written to this memory
@@ -268,8 +269,10 @@ system.mem_ctrls_1.memoryStateTime::REF          2600                       # Ti
 system.mem_ctrls_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
 system.mem_ctrls_1.memoryStateTime::ACT         64875                       # Time in different power states
 system.mem_ctrls_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.cpu.clk_domain.clock                         1                       # Clock period in ticks
 system.cpu.workload.num_syscalls                   11                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON           81703                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                            81703                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -329,6 +332,7 @@ system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Cl
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                       5370                       # Class of executed instruction
 system.ruby.clk_domain.clock                        1                       # Clock period in ticks
+system.ruby.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.delayHist::bucket_size                  1                       # delay histogram for all message
 system.ruby.delayHist::max_bucket                   9                       # delay histogram for all message
 system.ruby.delayHist::samples                   2574                       # delay histogram for all message
@@ -365,10 +369,14 @@ system.ruby.miss_latency_hist_seqr::stdev    32.275754
 system.ruby.miss_latency_hist_seqr       |        1082     83.94%     83.94% |         169     13.11%     97.05% |          28      2.17%     99.22% |           2      0.16%     99.38% |           5      0.39%     99.77% |           2      0.16%     99.92% |           1      0.08%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00% |           0      0.00%    100.00%
 system.ruby.miss_latency_hist_seqr::total         1289                      
 system.ruby.Directory.incomplete_times_seqr         1288                      
+system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.l1_cntrl0.cacheMemory.demand_hits         5469                       # Number of cache demand hits
 system.ruby.l1_cntrl0.cacheMemory.demand_misses         1289                       # Number of cache demand misses
 system.ruby.l1_cntrl0.cacheMemory.demand_accesses         6758                       # Number of cache demand accesses
+system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
+system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.memctrl_clk_domain.clock                3                       # Clock period in ticks
+system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.network.routers0.percent_links_utilized     7.876088                      
 system.ruby.network.routers0.msg_count.Control::2         1289                      
 system.ruby.network.routers0.msg_count.Data::2         1285                      
@@ -378,6 +386,7 @@ system.ruby.network.routers0.msg_bytes.Control::2        10312
 system.ruby.network.routers0.msg_bytes.Data::2        92520                      
 system.ruby.network.routers0.msg_bytes.Response_Data::4        92808                      
 system.ruby.network.routers0.msg_bytes.Writeback_Control::3        10280                      
+system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.network.routers1.percent_links_utilized     7.876088                      
 system.ruby.network.routers1.msg_count.Control::2         1289                      
 system.ruby.network.routers1.msg_count.Data::2         1285                      
@@ -387,6 +396,7 @@ system.ruby.network.routers1.msg_bytes.Control::2        10312
 system.ruby.network.routers1.msg_bytes.Data::2        92520                      
 system.ruby.network.routers1.msg_bytes.Response_Data::4        92808                      
 system.ruby.network.routers1.msg_bytes.Writeback_Control::3        10280                      
+system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.network.routers2.percent_links_utilized     7.876088                      
 system.ruby.network.routers2.msg_count.Control::2         1289                      
 system.ruby.network.routers2.msg_count.Data::2         1285                      
@@ -396,6 +406,7 @@ system.ruby.network.routers2.msg_bytes.Control::2        10312
 system.ruby.network.routers2.msg_bytes.Data::2        92520                      
 system.ruby.network.routers2.msg_bytes.Response_Data::4        92808                      
 system.ruby.network.routers2.msg_bytes.Writeback_Control::3        10280                      
+system.ruby.network.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.network.msg_count.Control            3867                      
 system.ruby.network.msg_count.Data               3855                      
 system.ruby.network.msg_count.Response_Data         3867                      
@@ -404,6 +415,7 @@ system.ruby.network.msg_byte.Control            30936
 system.ruby.network.msg_byte.Data              277560                      
 system.ruby.network.msg_byte.Response_Data       278424                      
 system.ruby.network.msg_byte.Writeback_Control        30840                      
+system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED        81703                       # Cumulative time (in ticks) in various power states
 system.ruby.network.routers0.throttle0.link_utilization     7.885879                      
 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4         1289                      
 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3         1285                      
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
index ad6f58618..77136ce08 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.000031                       # Nu
 sim_ticks                                    30526500                       # Number of ticks simulated
 final_tick                                   30526500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 398653                       # Simulator instruction rate (inst/s)
-host_op_rate                                   397863                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             2276293986                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 245124                       # Number of bytes of host memory used
+host_inst_rate                                 412582                       # Simulator instruction rate (inst/s)
+host_op_rate                                   412293                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             2361216779                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 290052                       # Number of bytes of host memory used
 host_seconds                                     0.01                       # Real time elapsed on the host
 sim_insts                                        5327                       # Number of instructions simulated
 sim_ops                                          5327                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst             16320                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data              8576                       # Number of bytes read from this memory
 system.physmem.bytes_read::total                24896                       # Number of bytes read from this memory
@@ -29,8 +30,10 @@ system.physmem.bw_inst_read::total          534617464                       # In
 system.physmem.bw_total::cpu.inst           534617464                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data           280936236                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total              815553699                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.workload.num_syscalls                   11                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON        30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                            61053                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -89,6 +92,7 @@ system.cpu.op_class::MemWrite                     678     12.63%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                       5370                       # Class of executed instruction
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.tags.replacements                 0                       # number of replacements
 system.cpu.dcache.tags.tagsinuse            81.961543                       # Cycle average of tags in use
 system.cpu.dcache.tags.total_refs                1253                       # Total number of references to valid blocks.
@@ -104,6 +108,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::1          107
 system.cpu.dcache.tags.occ_task_id_percent::1024     0.032959                       # Percentage of cache occupancy per task id
 system.cpu.dcache.tags.tag_accesses              2911                       # Number of tag accesses
 system.cpu.dcache.tags.data_accesses             2911                       # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.ReadReq_hits::cpu.data          661                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total             661                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data          592                       # number of WriteReq hits
@@ -190,6 +195,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 60644.444444
 system.cpu.dcache.demand_avg_mshr_miss_latency::total 60644.444444                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 60644.444444                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 60644.444444                       # average overall mshr miss latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.tags.replacements                 0                       # number of replacements
 system.cpu.icache.tags.tagsinuse           116.865384                       # Cycle average of tags in use
 system.cpu.icache.tags.total_refs                5114                       # Total number of references to valid blocks.
@@ -205,6 +211,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::1          158
 system.cpu.icache.tags.occ_task_id_percent::1024     0.125488                       # Percentage of cache occupancy per task id
 system.cpu.icache.tags.tag_accesses             10999                       # Number of tag accesses
 system.cpu.icache.tags.data_accesses            10999                       # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.ReadReq_hits::cpu.inst         5114                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total            5114                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst          5114                       # number of demand (read+write) hits
@@ -271,6 +278,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 60628.404669
 system.cpu.icache.demand_avg_mshr_miss_latency::total 60628.404669                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 60628.404669                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::total 60628.404669                       # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.tags.replacements                0                       # number of replacements
 system.cpu.l2cache.tags.tagsinuse          141.950442                       # Cycle average of tags in use
 system.cpu.l2cache.tags.total_refs                  3                       # Total number of references to valid blocks.
@@ -288,6 +296,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::1          190
 system.cpu.l2cache.tags.occ_task_id_percent::1024     0.009399                       # Percentage of cache occupancy per task id
 system.cpu.l2cache.tags.tag_accesses             3525                       # Number of tag accesses
 system.cpu.l2cache.tags.data_accesses            3525                       # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.ReadCleanReq_hits::cpu.inst            2                       # number of ReadCleanReq hits
 system.cpu.l2cache.ReadCleanReq_hits::total            2                       # number of ReadCleanReq hits
 system.cpu.l2cache.ReadSharedReq_hits::cpu.data            1                       # number of ReadSharedReq hits
@@ -418,6 +427,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0
 system.cpu.toL2Bus.snoop_filter.tot_snoops            0                       # Total number of snoops made to the snoop filter.
 system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
 system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.cpu.toL2Bus.trans_dist::ReadResp           311                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::ReadExReq           81                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::ReadExResp           81                       # Transaction distribution
@@ -447,6 +457,7 @@ system.cpu.toL2Bus.respLayer0.occupancy        385500                       # La
 system.cpu.toL2Bus.respLayer0.utilization          1.3                       # Layer utilization (%)
 system.cpu.toL2Bus.respLayer1.occupancy        202500                       # Layer occupancy (ticks)
 system.cpu.toL2Bus.respLayer1.utilization          0.7                       # Layer utilization (%)
+system.membus.pwrStateResidencyTicks::UNDEFINED     30526500                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadResp                308                       # Transaction distribution
 system.membus.trans_dist::ReadExReq                81                       # Transaction distribution
 system.membus.trans_dist::ReadExResp               81                       # Transaction distribution