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authorGabe Black <gabeblack@google.com>2017-03-29 16:14:05 -0700
committerGabe Black <gabeblack@google.com>2017-04-05 18:40:59 +0000
commitf7ddc4672a17ee4fab3011bb1b570cc7c17dff28 (patch)
tree1b09ee7160f513160fdbd766af3afed63f053e1d /tests/quick/se/00.hello/ref/sparc/linux
parent8ebc3834651857ae5e2ea755844f263d9a8c34ae (diff)
downloadgem5-f7ddc4672a17ee4fab3011bb1b570cc7c17dff28.tar.xz
stats: Update some stats after simulated program exit behavior was changed.
The following CL delayed program exit and changed the stats for many if not most of the SE mode regressions. commit 2c1286865fc2542a0586ca4ff40b00765d17b348 Author: Brandon Potter <Brandon.Potter@amd.com> Date: Wed Mar 1 14:52:23 2017 -0600 syscall-emul: Rewrite system call exit code Change-Id: Id241f2b7d5374947597c715ee44febe1acc5ea16 Reviewed-on: https://gem5-review.googlesource.com/2656 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'tests/quick/se/00.hello/ref/sparc/linux')
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini23
-rwxr-xr-xtests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr1
-rwxr-xr-xtests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout11
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt262
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini11
-rwxr-xr-xtests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr1
-rwxr-xr-xtests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout11
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt836
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini47
-rwxr-xr-xtests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr1
-rwxr-xr-xtests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout11
-rw-r--r--tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt986
12 files changed, 1116 insertions, 1085 deletions
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini
index c79232133..90a496871 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini
@@ -88,6 +88,7 @@ simulate_data_stalls=false
simulate_inst_stalls=false
socket_id=0
switched_out=false
+syscallRetryLatency=10000
system=system
tracer=system.cpu.tracer
width=1
@@ -118,7 +119,7 @@ type=ExeTracer
eventq_index=0
[system.cpu.workload]
-type=LiveProcess
+type=Process
cmd=hello
cwd=
drivers=
@@ -127,14 +128,15 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/sparc/linux/hello
+executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello
gid=100
input=cin
kvmInSE=false
-max_stack_size=67108864
+maxStackSize=67108864
output=cout
+pgid=100
pid=100
-ppid=99
+ppid=0
simpoint=0
system=system
uid=100
@@ -158,6 +160,7 @@ transition_latency=100000000
[system.membus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
default_p_state=UNDEFINED
eventq_index=0
@@ -169,7 +172,7 @@ p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
response_latency=2
-snoop_filter=Null
+snoop_filter=system.membus.snoop_filter
snoop_response_latency=4
system=system
use_default_range=false
@@ -177,6 +180,13 @@ width=16
master=system.physmem.port
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
+[system.membus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=1
+max_capacity=8388608
+system=system
+
[system.physmem]
type=SimpleMemory
bandwidth=73.000000
@@ -185,6 +195,7 @@ conf_table_reported=true
default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
+kvm_map=true
latency=30000
latency_var=0
null=false
@@ -192,7 +203,7 @@ p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
-range=0:134217727
+range=0:134217727:0:0:0:0
port=system.membus.master[0]
[system.voltage_domain]
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr
index aadc3d011..c0b55d123 100755
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr
@@ -1,2 +1,3 @@
warn: Sockets disabled, not accepting gdb connections
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
+info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout
index 0783a6d90..cac26c8a8 100755
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout
@@ -3,11 +3,10 @@ Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 21 2016 14:30:06
-gem5 started Jul 21 2016 14:30:36
-gem5 executing on e108600-lin, pid 38676
-command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-atomic
+gem5 compiled Apr 3 2017 18:41:19
+gem5 started Apr 3 2017 18:41:40
+gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64886
+command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-Hello World!Exiting @ tick 2694500 because target called exit()
+Hello World!Exiting @ tick 2694500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
index 22810bda7..6ce9e512f 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
@@ -1,135 +1,135 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.000003 # Number of seconds simulated
-sim_ticks 2694500 # Number of ticks simulated
-final_tick 2694500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 818529 # Simulator instruction rate (inst/s)
-host_op_rate 815458 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 411063520 # Simulator tick rate (ticks/s)
-host_mem_usage 239556 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
-sim_insts 5327 # Number of instructions simulated
-sim_ops 5327 # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage 1 # Voltage in Volts
-system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.pwrStateResidencyTicks::UNDEFINED 2694500 # Cumulative time (in ticks) in various power states
-system.physmem.bytes_read::cpu.inst 21480 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 4602 # Number of bytes read from this memory
-system.physmem.bytes_read::total 26082 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 21480 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 21480 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::cpu.data 5065 # Number of bytes written to this memory
-system.physmem.bytes_written::total 5065 # Number of bytes written to this memory
-system.physmem.num_reads::cpu.inst 5370 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 715 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 6085 # Number of read requests responded to by this memory
-system.physmem.num_writes::cpu.data 673 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 673 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst 7971794396 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 1707923548 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 9679717944 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 7971794396 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 7971794396 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data 1879755057 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 1879755057 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 7971794396 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 3587678605 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 11559473001 # Total bandwidth to/from this memory (bytes/s)
-system.pwrStateResidencyTicks::UNDEFINED 2694500 # Cumulative time (in ticks) in various power states
-system.cpu_clk_domain.clock 500 # Clock period in ticks
-system.cpu.workload.numSyscalls 11 # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON 2694500 # Cumulative time (in ticks) in various power states
-system.cpu.numCycles 5390 # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 5327 # Number of instructions committed
-system.cpu.committedOps 5327 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
-system.cpu.num_func_calls 146 # number of times a function call or return occured
-system.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls
-system.cpu.num_int_insts 4505 # number of integer instructions
-system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 10598 # number of times the integer registers were read
-system.cpu.num_int_register_writes 4846 # number of times the integer registers were written
-system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
-system.cpu.num_mem_refs 1401 # number of memory refs
-system.cpu.num_load_insts 723 # Number of load instructions
-system.cpu.num_store_insts 678 # Number of store instructions
-system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
-system.cpu.num_busy_cycles 5389.998000 # Number of busy cycles
-system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
-system.cpu.Branches 1121 # Number of branches fetched
-system.cpu.op_class::No_OpClass 173 3.22% 3.22% # Class of executed instruction
-system.cpu.op_class::IntAlu 3796 70.69% 73.91% # Class of executed instruction
-system.cpu.op_class::IntMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::IntDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAlu 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdShift 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::MemRead 723 13.46% 87.37% # Class of executed instruction
-system.cpu.op_class::MemWrite 678 12.63% 100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 5370 # Class of executed instruction
-system.membus.snoop_filter.tot_requests 0 # Total number of requests made to the snoop filter.
-system.membus.snoop_filter.hit_single_requests 0 # Number of requests hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_requests 0 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
-system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
-system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
-system.membus.pwrStateResidencyTicks::UNDEFINED 2694500 # Cumulative time (in ticks) in various power states
-system.membus.trans_dist::ReadReq 6085 # Transaction distribution
-system.membus.trans_dist::ReadResp 6085 # Transaction distribution
-system.membus.trans_dist::WriteReq 673 # Transaction distribution
-system.membus.trans_dist::WriteResp 673 # Transaction distribution
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 10740 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 2776 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 13516 # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 21480 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 9667 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 31147 # Cumulative packet size per connected master and slave (bytes)
-system.membus.snoops 0 # Total snoops (count)
-system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
-system.membus.snoop_fanout::samples 6758 # Request fanout histogram
-system.membus.snoop_fanout::mean 0 # Request fanout histogram
-system.membus.snoop_fanout::stdev 0 # Request fanout histogram
-system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::0 6758 100.00% 100.00% # Request fanout histogram
-system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
-system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
-system.membus.snoop_fanout::min_value 0 # Request fanout histogram
-system.membus.snoop_fanout::max_value 0 # Request fanout histogram
-system.membus.snoop_fanout::total 6758 # Request fanout histogram
+sim_seconds 0.000003
+sim_ticks 2694500
+final_tick 2694500
+sim_freq 1000000000000
+host_inst_rate 549051
+host_op_rate 547755
+host_tick_rate 276495662
+host_mem_usage 251832
+host_seconds 0.01
+sim_insts 5327
+sim_ops 5327
+system.voltage_domain.voltage 1
+system.clk_domain.clock 1000
+system.physmem.pwrStateResidencyTicks::UNDEFINED 2694500
+system.physmem.bytes_read::cpu.inst 21480
+system.physmem.bytes_read::cpu.data 4602
+system.physmem.bytes_read::total 26082
+system.physmem.bytes_inst_read::cpu.inst 21480
+system.physmem.bytes_inst_read::total 21480
+system.physmem.bytes_written::cpu.data 5065
+system.physmem.bytes_written::total 5065
+system.physmem.num_reads::cpu.inst 5370
+system.physmem.num_reads::cpu.data 715
+system.physmem.num_reads::total 6085
+system.physmem.num_writes::cpu.data 673
+system.physmem.num_writes::total 673
+system.physmem.bw_read::cpu.inst 7971794396
+system.physmem.bw_read::cpu.data 1707923548
+system.physmem.bw_read::total 9679717944
+system.physmem.bw_inst_read::cpu.inst 7971794396
+system.physmem.bw_inst_read::total 7971794396
+system.physmem.bw_write::cpu.data 1879755057
+system.physmem.bw_write::total 1879755057
+system.physmem.bw_total::cpu.inst 7971794396
+system.physmem.bw_total::cpu.data 3587678605
+system.physmem.bw_total::total 11559473001
+system.pwrStateResidencyTicks::UNDEFINED 2694500
+system.cpu_clk_domain.clock 500
+system.cpu.workload.numSyscalls 11
+system.cpu.pwrStateResidencyTicks::ON 2694500
+system.cpu.numCycles 5390
+system.cpu.numWorkItemsStarted 0
+system.cpu.numWorkItemsCompleted 0
+system.cpu.committedInsts 5327
+system.cpu.committedOps 5327
+system.cpu.num_int_alu_accesses 4505
+system.cpu.num_fp_alu_accesses 0
+system.cpu.num_func_calls 146
+system.cpu.num_conditional_control_insts 773
+system.cpu.num_int_insts 4505
+system.cpu.num_fp_insts 0
+system.cpu.num_int_register_reads 10598
+system.cpu.num_int_register_writes 4846
+system.cpu.num_fp_register_reads 0
+system.cpu.num_fp_register_writes 0
+system.cpu.num_mem_refs 1401
+system.cpu.num_load_insts 723
+system.cpu.num_store_insts 678
+system.cpu.num_idle_cycles 0
+system.cpu.num_busy_cycles 5390
+system.cpu.not_idle_fraction 1
+system.cpu.idle_fraction 0
+system.cpu.Branches 1121
+system.cpu.op_class::No_OpClass 173 3.22% 3.22%
+system.cpu.op_class::IntAlu 3796 70.69% 73.91%
+system.cpu.op_class::IntMult 0 0.00% 73.91%
+system.cpu.op_class::IntDiv 0 0.00% 73.91%
+system.cpu.op_class::FloatAdd 0 0.00% 73.91%
+system.cpu.op_class::FloatCmp 0 0.00% 73.91%
+system.cpu.op_class::FloatCvt 0 0.00% 73.91%
+system.cpu.op_class::FloatMult 0 0.00% 73.91%
+system.cpu.op_class::FloatMultAcc 0 0.00% 73.91%
+system.cpu.op_class::FloatDiv 0 0.00% 73.91%
+system.cpu.op_class::FloatMisc 0 0.00% 73.91%
+system.cpu.op_class::FloatSqrt 0 0.00% 73.91%
+system.cpu.op_class::SimdAdd 0 0.00% 73.91%
+system.cpu.op_class::SimdAddAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdAlu 0 0.00% 73.91%
+system.cpu.op_class::SimdCmp 0 0.00% 73.91%
+system.cpu.op_class::SimdCvt 0 0.00% 73.91%
+system.cpu.op_class::SimdMisc 0 0.00% 73.91%
+system.cpu.op_class::SimdMult 0 0.00% 73.91%
+system.cpu.op_class::SimdMultAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdShift 0 0.00% 73.91%
+system.cpu.op_class::SimdShiftAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdSqrt 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatAdd 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatAlu 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatCmp 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatCvt 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatDiv 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatMisc 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatMult 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91%
+system.cpu.op_class::MemRead 723 13.46% 87.37%
+system.cpu.op_class::MemWrite 678 12.63% 100.00%
+system.cpu.op_class::FloatMemRead 0 0.00% 100.00%
+system.cpu.op_class::FloatMemWrite 0 0.00% 100.00%
+system.cpu.op_class::IprAccess 0 0.00% 100.00%
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
+system.cpu.op_class::total 5370
+system.membus.snoop_filter.tot_requests 0
+system.membus.snoop_filter.hit_single_requests 0
+system.membus.snoop_filter.hit_multi_requests 0
+system.membus.snoop_filter.tot_snoops 0
+system.membus.snoop_filter.hit_single_snoops 0
+system.membus.snoop_filter.hit_multi_snoops 0
+system.membus.pwrStateResidencyTicks::UNDEFINED 2694500
+system.membus.trans_dist::ReadReq 6085
+system.membus.trans_dist::ReadResp 6085
+system.membus.trans_dist::WriteReq 673
+system.membus.trans_dist::WriteResp 673
+system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 10740
+system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 2776
+system.membus.pkt_count::total 13516
+system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 21480
+system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 9667
+system.membus.pkt_size::total 31147
+system.membus.snoops 0
+system.membus.snoopTraffic 0
+system.membus.snoop_fanout::samples 6758
+system.membus.snoop_fanout::mean 0
+system.membus.snoop_fanout::stdev 0
+system.membus.snoop_fanout::underflows 0 0.00% 0.00%
+system.membus.snoop_fanout::0 6758 100.00% 100.00%
+system.membus.snoop_fanout::1 0 0.00% 100.00%
+system.membus.snoop_fanout::overflows 0 0.00% 100.00%
+system.membus.snoop_fanout::min_value 0
+system.membus.snoop_fanout::max_value 0
+system.membus.snoop_fanout::total 6758
---------- End Simulation Statistics ----------
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini
index 7609bf228..74133b340 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini
@@ -85,6 +85,7 @@ progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
+syscallRetryLatency=10000
system=system
tracer=system.cpu.tracer
workload=system.cpu.workload
@@ -122,7 +123,7 @@ type=ExeTracer
eventq_index=0
[system.cpu.workload]
-type=LiveProcess
+type=Process
cmd=hello
cwd=
drivers=
@@ -131,14 +132,15 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/sparc/linux/hello
+executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello
gid=100
input=cin
kvmInSE=false
-max_stack_size=67108864
+maxStackSize=67108864
output=cout
+pgid=100
pid=100
-ppid=99
+ppid=0
simpoint=0
system=system
uid=100
@@ -297,6 +299,7 @@ type=RubyDirectoryMemory
eventq_index=0
numa_high_bit=5
size=268435456
+system=system
version=0
[system.ruby.dir_cntrl0.dmaRequestToDir]
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr
index f6f6f15a5..95500d55b 100755
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr
@@ -7,4 +7,5 @@ warn: rounding error > tolerance
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
warn: Sockets disabled, not accepting gdb connections
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
+info: Entering event queue @ 0. Starting simulation...
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout
index 36ed80c84..8d604768a 100755
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout
@@ -3,11 +3,10 @@ Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 13 2016 20:43:27
-gem5 started Oct 13 2016 20:46:33
-gem5 executing on e108600-lin, pid 17405
-command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-timing-ruby
+gem5 compiled Apr 3 2017 18:41:19
+gem5 started Apr 3 2017 18:41:37
+gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64825
+command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-timing-ruby
Global frequency set at 1000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-Hello World!Exiting @ tick 86746 because target called exit()
+Hello World!Exiting @ tick 86746 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
index 05934eae0..83a3d1ad4 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
@@ -1,355 +1,355 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.000087 # Number of seconds simulated
-sim_ticks 86746 # Number of ticks simulated
-final_tick 86746 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 122857 # Simulator instruction rate (inst/s)
-host_op_rate 122829 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1999767 # Simulator tick rate (ticks/s)
-host_mem_usage 415460 # Number of bytes of host memory used
-host_seconds 0.04 # Real time elapsed on the host
-sim_insts 5327 # Number of instructions simulated
-sim_ops 5327 # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage 1 # Voltage in Volts
-system.clk_domain.clock 1 # Clock period in ticks
-system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
-system.mem_ctrls.bytes_read::ruby.dir_cntrl0 82496 # Number of bytes read from this memory
-system.mem_ctrls.bytes_read::total 82496 # Number of bytes read from this memory
-system.mem_ctrls.bytes_written::ruby.dir_cntrl0 82240 # Number of bytes written to this memory
-system.mem_ctrls.bytes_written::total 82240 # Number of bytes written to this memory
-system.mem_ctrls.num_reads::ruby.dir_cntrl0 1289 # Number of read requests responded to by this memory
-system.mem_ctrls.num_reads::total 1289 # Number of read requests responded to by this memory
-system.mem_ctrls.num_writes::ruby.dir_cntrl0 1285 # Number of write requests responded to by this memory
-system.mem_ctrls.num_writes::total 1285 # Number of write requests responded to by this memory
-system.mem_ctrls.bw_read::ruby.dir_cntrl0 951006386 # Total read bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_read::total 951006386 # Total read bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_write::ruby.dir_cntrl0 948055242 # Write bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_write::total 948055242 # Write bandwidth from this memory (bytes/s)
-system.mem_ctrls.bw_total::ruby.dir_cntrl0 1899061628 # Total bandwidth to/from this memory (bytes/s)
-system.mem_ctrls.bw_total::total 1899061628 # Total bandwidth to/from this memory (bytes/s)
-system.mem_ctrls.readReqs 1289 # Number of read requests accepted
-system.mem_ctrls.writeReqs 1285 # Number of write requests accepted
-system.mem_ctrls.readBursts 1289 # Number of DRAM read bursts, including those serviced by the write queue
-system.mem_ctrls.writeBursts 1285 # Number of DRAM write bursts, including those merged in the write queue
-system.mem_ctrls.bytesReadDRAM 44800 # Total number of bytes read from DRAM
-system.mem_ctrls.bytesReadWrQ 37696 # Total number of bytes read from write queue
-system.mem_ctrls.bytesWritten 45504 # Total number of bytes written to DRAM
-system.mem_ctrls.bytesReadSys 82496 # Total read bytes from the system interface side
-system.mem_ctrls.bytesWrittenSys 82240 # Total written bytes from the system interface side
-system.mem_ctrls.servicedByWrQ 589 # Number of DRAM read bursts serviced by the write queue
-system.mem_ctrls.mergedWrBursts 555 # Number of DRAM write bursts merged with an existing one
-system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
-system.mem_ctrls.perBankRdBursts::0 28 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::1 17 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::2 1 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::3 8 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::4 0 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::5 119 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::6 121 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::7 141 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::8 55 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::9 31 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::10 13 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::11 62 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::12 21 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::13 61 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::14 14 # Per bank write bursts
-system.mem_ctrls.perBankRdBursts::15 8 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::0 28 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::1 18 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::2 1 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::3 8 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::5 118 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::6 114 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::7 141 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::8 61 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::9 35 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::10 14 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::11 62 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::12 23 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::13 64 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::14 16 # Per bank write bursts
-system.mem_ctrls.perBankWrBursts::15 8 # Per bank write bursts
-system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
-system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
-system.mem_ctrls.totGap 86680 # Total gap between requests
-system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
-system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
-system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
-system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
-system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
-system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
-system.mem_ctrls.readPktSize::6 1289 # Read request sizes (log2)
-system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
-system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
-system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
-system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
-system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
-system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
-system.mem_ctrls.writePktSize::6 1285 # Write request sizes (log2)
-system.mem_ctrls.rdQLenPdf::0 700 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
-system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::15 3 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::16 3 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::17 35 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::18 45 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::19 45 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::20 49 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::21 49 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::22 46 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::23 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::24 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::25 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::26 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::27 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::28 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::29 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::30 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::31 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::32 44 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
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-system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
-system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
-system.mem_ctrls.bytesPerActivate::samples 247 # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::mean 359.384615 # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::gmean 236.451062 # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::stdev 319.751749 # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::0-127 54 21.86% 21.86% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::128-255 65 26.32% 48.18% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::256-383 38 15.38% 63.56% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::384-511 27 10.93% 74.49% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::512-639 8 3.24% 77.73% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::640-767 10 4.05% 81.78% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::768-895 11 4.45% 86.23% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::896-1023 9 3.64% 89.88% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::1024-1151 25 10.12% 100.00% # Bytes accessed per row activation
-system.mem_ctrls.bytesPerActivate::total 247 # Bytes accessed per row activation
-system.mem_ctrls.rdPerTurnAround::samples 44 # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::mean 15.840909 # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::gmean 15.640724 # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::stdev 3.183849 # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::12-13 2 4.55% 4.55% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::14-15 21 47.73% 52.27% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::16-17 18 40.91% 93.18% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::18-19 2 4.55% 97.73% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::34-35 1 2.27% 100.00% # Reads before turning the bus around for writes
-system.mem_ctrls.rdPerTurnAround::total 44 # Reads before turning the bus around for writes
-system.mem_ctrls.wrPerTurnAround::samples 44 # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::mean 16.159091 # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::gmean 16.147705 # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::stdev 0.644951 # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::16 41 93.18% 93.18% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::17 1 2.27% 95.45% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::19 2 4.55% 100.00% # Writes before turning the bus around for reads
-system.mem_ctrls.wrPerTurnAround::total 44 # Writes before turning the bus around for reads
-system.mem_ctrls.totQLat 12987 # Total ticks spent queuing
-system.mem_ctrls.totMemAccLat 26287 # Total ticks spent from burst creation until serviced by the DRAM
-system.mem_ctrls.totBusLat 3500 # Total ticks spent in databus transfers
-system.mem_ctrls.avgQLat 18.55 # Average queueing delay per DRAM burst
-system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
-system.mem_ctrls.avgMemAccLat 37.55 # Average memory access latency per DRAM burst
-system.mem_ctrls.avgRdBW 516.45 # Average DRAM read bandwidth in MiByte/s
-system.mem_ctrls.avgWrBW 524.57 # Average achieved write bandwidth in MiByte/s
-system.mem_ctrls.avgRdBWSys 951.01 # Average system read bandwidth in MiByte/s
-system.mem_ctrls.avgWrBWSys 948.06 # Average system write bandwidth in MiByte/s
-system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
-system.mem_ctrls.busUtil 8.13 # Data bus utilization in percentage
-system.mem_ctrls.busUtilRead 4.03 # Data bus utilization in percentage for reads
-system.mem_ctrls.busUtilWrite 4.10 # Data bus utilization in percentage for writes
-system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
-system.mem_ctrls.avgWrQLen 25.18 # Average write queue length when enqueuing
-system.mem_ctrls.readRowHits 508 # Number of row buffer hits during reads
-system.mem_ctrls.writeRowHits 652 # Number of row buffer hits during writes
-system.mem_ctrls.readRowHitRate 72.57 # Row buffer hit rate for reads
-system.mem_ctrls.writeRowHitRate 89.32 # Row buffer hit rate for writes
-system.mem_ctrls.avgGap 33.68 # Average gap between requests
-system.mem_ctrls.pageHitRate 81.12 # Row buffer hit rate, read and write combined
-system.mem_ctrls_0.actEnergy 1099560 # Energy for activate commands per rank (pJ)
-system.mem_ctrls_0.preEnergy 587328 # Energy for precharge commands per rank (pJ)
-system.mem_ctrls_0.readEnergy 4969440 # Energy for read commands per rank (pJ)
-system.mem_ctrls_0.writeEnergy 3574656 # Energy for write commands per rank (pJ)
-system.mem_ctrls_0.refreshEnergy 6761040.000000 # Energy for refresh commands per rank (pJ)
-system.mem_ctrls_0.actBackEnergy 10338432 # Energy for active background per rank (pJ)
-system.mem_ctrls_0.preBackEnergy 148224 # Energy for precharge background per rank (pJ)
-system.mem_ctrls_0.actPowerDownEnergy 27605784 # Energy for active power-down per rank (pJ)
-system.mem_ctrls_0.prePowerDownEnergy 1209216 # Energy for precharge power-down per rank (pJ)
-system.mem_ctrls_0.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
-system.mem_ctrls_0.totalEnergy 56293680 # Total energy per rank (pJ)
-system.mem_ctrls_0.averagePower 648.948424 # Core power per rank (mW)
-system.mem_ctrls_0.totalIdleTime 63519 # Total Idle time Per DRAM Rank
-system.mem_ctrls_0.memoryStateTime::IDLE 64 # Time in different power states
-system.mem_ctrls_0.memoryStateTime::REF 2860 # Time in different power states
-system.mem_ctrls_0.memoryStateTime::SREF 0 # Time in different power states
-system.mem_ctrls_0.memoryStateTime::PRE_PDN 3149 # Time in different power states
-system.mem_ctrls_0.memoryStateTime::ACT 20134 # Time in different power states
-system.mem_ctrls_0.memoryStateTime::ACT_PDN 60539 # Time in different power states
-system.mem_ctrls_1.actEnergy 692580 # Energy for activate commands per rank (pJ)
-system.mem_ctrls_1.preEnergy 367080 # Energy for precharge commands per rank (pJ)
-system.mem_ctrls_1.readEnergy 3027360 # Energy for read commands per rank (pJ)
-system.mem_ctrls_1.writeEnergy 2363616 # Energy for write commands per rank (pJ)
-system.mem_ctrls_1.refreshEnergy 6761040.000000 # Energy for refresh commands per rank (pJ)
-system.mem_ctrls_1.actBackEnergy 9621600 # Energy for active background per rank (pJ)
-system.mem_ctrls_1.preBackEnergy 296448 # Energy for precharge background per rank (pJ)
-system.mem_ctrls_1.actPowerDownEnergy 26302992 # Energy for active power-down per rank (pJ)
-system.mem_ctrls_1.prePowerDownEnergy 2761728 # Energy for precharge power-down per rank (pJ)
-system.mem_ctrls_1.selfRefreshEnergy 0 # Energy for self refresh per rank (pJ)
-system.mem_ctrls_1.totalEnergy 52194444 # Total energy per rank (pJ)
-system.mem_ctrls_1.averagePower 601.692804 # Core power per rank (mW)
-system.mem_ctrls_1.totalIdleTime 64843 # Total Idle time Per DRAM Rank
-system.mem_ctrls_1.memoryStateTime::IDLE 422 # Time in different power states
-system.mem_ctrls_1.memoryStateTime::REF 2860 # Time in different power states
-system.mem_ctrls_1.memoryStateTime::SREF 0 # Time in different power states
-system.mem_ctrls_1.memoryStateTime::PRE_PDN 7192 # Time in different power states
-system.mem_ctrls_1.memoryStateTime::ACT 18590 # Time in different power states
-system.mem_ctrls_1.memoryStateTime::ACT_PDN 57682 # Time in different power states
-system.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
-system.cpu.clk_domain.clock 1 # Clock period in ticks
-system.cpu.workload.numSyscalls 11 # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON 86746 # Cumulative time (in ticks) in various power states
-system.cpu.numCycles 86746 # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 5327 # Number of instructions committed
-system.cpu.committedOps 5327 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
-system.cpu.num_func_calls 146 # number of times a function call or return occured
-system.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls
-system.cpu.num_int_insts 4505 # number of integer instructions
-system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 10598 # number of times the integer registers were read
-system.cpu.num_int_register_writes 4845 # number of times the integer registers were written
-system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
-system.cpu.num_mem_refs 1401 # number of memory refs
-system.cpu.num_load_insts 723 # Number of load instructions
-system.cpu.num_store_insts 678 # Number of store instructions
-system.cpu.num_idle_cycles 0.999988 # Number of idle cycles
-system.cpu.num_busy_cycles 86745.000012 # Number of busy cycles
-system.cpu.not_idle_fraction 0.999988 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0.000012 # Percentage of idle cycles
-system.cpu.Branches 1121 # Number of branches fetched
-system.cpu.op_class::No_OpClass 173 3.22% 3.22% # Class of executed instruction
-system.cpu.op_class::IntAlu 3796 70.69% 73.91% # Class of executed instruction
-system.cpu.op_class::IntMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::IntDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAlu 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdShift 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::MemRead 723 13.46% 87.37% # Class of executed instruction
-system.cpu.op_class::MemWrite 678 12.63% 100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 5370 # Class of executed instruction
-system.ruby.clk_domain.clock 1 # Clock period in ticks
-system.ruby.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
-system.ruby.delayHist::bucket_size 1 # delay histogram for all message
-system.ruby.delayHist::max_bucket 9 # delay histogram for all message
-system.ruby.delayHist::samples 2574 # delay histogram for all message
-system.ruby.delayHist | 2574 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
-system.ruby.delayHist::total 2574 # delay histogram for all message
+sim_seconds 0.000087
+sim_ticks 86746
+final_tick 86746
+sim_freq 1000000000
+host_inst_rate 50496
+host_op_rate 50484
+host_tick_rate 821944
+host_mem_usage 426428
+host_seconds 0.11
+sim_insts 5327
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+system.voltage_domain.voltage 1
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+system.mem_ctrls.bytes_read::ruby.dir_cntrl0 82496
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+system.mem_ctrls.bytes_written::ruby.dir_cntrl0 82240
+system.mem_ctrls.bytes_written::total 82240
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+system.mem_ctrls.num_writes::total 1285
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+system.mem_ctrls.bytesWrittenSys 82240
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+system.mem_ctrls.bytesPerActivate::mean 359.384615
+system.mem_ctrls.bytesPerActivate::gmean 236.451062
+system.mem_ctrls.bytesPerActivate::stdev 319.751749
+system.mem_ctrls.bytesPerActivate::0-127 54 21.86% 21.86%
+system.mem_ctrls.bytesPerActivate::128-255 65 26.32% 48.18%
+system.mem_ctrls.bytesPerActivate::256-383 38 15.38% 63.56%
+system.mem_ctrls.bytesPerActivate::384-511 27 10.93% 74.49%
+system.mem_ctrls.bytesPerActivate::512-639 8 3.24% 77.73%
+system.mem_ctrls.bytesPerActivate::640-767 10 4.05% 81.78%
+system.mem_ctrls.bytesPerActivate::768-895 11 4.45% 86.23%
+system.mem_ctrls.bytesPerActivate::896-1023 9 3.64% 89.88%
+system.mem_ctrls.bytesPerActivate::1024-1151 25 10.12% 100.00%
+system.mem_ctrls.bytesPerActivate::total 247
+system.mem_ctrls.rdPerTurnAround::samples 44
+system.mem_ctrls.rdPerTurnAround::mean 15.840909
+system.mem_ctrls.rdPerTurnAround::gmean 15.640724
+system.mem_ctrls.rdPerTurnAround::stdev 3.183849
+system.mem_ctrls.rdPerTurnAround::12-13 2 4.55% 4.55%
+system.mem_ctrls.rdPerTurnAround::14-15 21 47.73% 52.27%
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+system.mem_ctrls.rdPerTurnAround::18-19 2 4.55% 97.73%
+system.mem_ctrls.rdPerTurnAround::34-35 1 2.27% 100.00%
+system.mem_ctrls.rdPerTurnAround::total 44
+system.mem_ctrls.wrPerTurnAround::samples 44
+system.mem_ctrls.wrPerTurnAround::mean 16.159091
+system.mem_ctrls.wrPerTurnAround::gmean 16.147705
+system.mem_ctrls.wrPerTurnAround::stdev 0.644951
+system.mem_ctrls.wrPerTurnAround::16 41 93.18% 93.18%
+system.mem_ctrls.wrPerTurnAround::17 1 2.27% 95.45%
+system.mem_ctrls.wrPerTurnAround::19 2 4.55% 100.00%
+system.mem_ctrls.wrPerTurnAround::total 44
+system.mem_ctrls.totQLat 12987
+system.mem_ctrls.totMemAccLat 26287
+system.mem_ctrls.totBusLat 3500
+system.mem_ctrls.avgQLat 18.55
+system.mem_ctrls.avgBusLat 5.00
+system.mem_ctrls.avgMemAccLat 37.55
+system.mem_ctrls.avgRdBW 516.45
+system.mem_ctrls.avgWrBW 524.57
+system.mem_ctrls.avgRdBWSys 951.01
+system.mem_ctrls.avgWrBWSys 948.06
+system.mem_ctrls.peakBW 12800.00
+system.mem_ctrls.busUtil 8.13
+system.mem_ctrls.busUtilRead 4.03
+system.mem_ctrls.busUtilWrite 4.10
+system.mem_ctrls.avgRdQLen 1.00
+system.mem_ctrls.avgWrQLen 25.18
+system.mem_ctrls.readRowHits 508
+system.mem_ctrls.writeRowHits 652
+system.mem_ctrls.readRowHitRate 72.57
+system.mem_ctrls.writeRowHitRate 89.32
+system.mem_ctrls.avgGap 33.68
+system.mem_ctrls.pageHitRate 81.12
+system.mem_ctrls_0.actEnergy 1099560
+system.mem_ctrls_0.preEnergy 587328
+system.mem_ctrls_0.readEnergy 4969440
+system.mem_ctrls_0.writeEnergy 3574656
+system.mem_ctrls_0.refreshEnergy 6761040.000000
+system.mem_ctrls_0.actBackEnergy 10338432
+system.mem_ctrls_0.preBackEnergy 148224
+system.mem_ctrls_0.actPowerDownEnergy 27605784
+system.mem_ctrls_0.prePowerDownEnergy 1209216
+system.mem_ctrls_0.selfRefreshEnergy 0
+system.mem_ctrls_0.totalEnergy 56293680
+system.mem_ctrls_0.averagePower 648.948424
+system.mem_ctrls_0.totalIdleTime 63519
+system.mem_ctrls_0.memoryStateTime::IDLE 64
+system.mem_ctrls_0.memoryStateTime::REF 2860
+system.mem_ctrls_0.memoryStateTime::SREF 0
+system.mem_ctrls_0.memoryStateTime::PRE_PDN 3149
+system.mem_ctrls_0.memoryStateTime::ACT 20134
+system.mem_ctrls_0.memoryStateTime::ACT_PDN 60539
+system.mem_ctrls_1.actEnergy 692580
+system.mem_ctrls_1.preEnergy 367080
+system.mem_ctrls_1.readEnergy 3027360
+system.mem_ctrls_1.writeEnergy 2363616
+system.mem_ctrls_1.refreshEnergy 6761040.000000
+system.mem_ctrls_1.actBackEnergy 9621600
+system.mem_ctrls_1.preBackEnergy 296448
+system.mem_ctrls_1.actPowerDownEnergy 26302992
+system.mem_ctrls_1.prePowerDownEnergy 2761728
+system.mem_ctrls_1.selfRefreshEnergy 0
+system.mem_ctrls_1.totalEnergy 52194444
+system.mem_ctrls_1.averagePower 601.692804
+system.mem_ctrls_1.totalIdleTime 64843
+system.mem_ctrls_1.memoryStateTime::IDLE 422
+system.mem_ctrls_1.memoryStateTime::REF 2860
+system.mem_ctrls_1.memoryStateTime::SREF 0
+system.mem_ctrls_1.memoryStateTime::PRE_PDN 7192
+system.mem_ctrls_1.memoryStateTime::ACT 18590
+system.mem_ctrls_1.memoryStateTime::ACT_PDN 57682
+system.pwrStateResidencyTicks::UNDEFINED 86746
+system.cpu.clk_domain.clock 1
+system.cpu.workload.numSyscalls 11
+system.cpu.pwrStateResidencyTicks::ON 86746
+system.cpu.numCycles 86746
+system.cpu.numWorkItemsStarted 0
+system.cpu.numWorkItemsCompleted 0
+system.cpu.committedInsts 5327
+system.cpu.committedOps 5327
+system.cpu.num_int_alu_accesses 4505
+system.cpu.num_fp_alu_accesses 0
+system.cpu.num_func_calls 146
+system.cpu.num_conditional_control_insts 773
+system.cpu.num_int_insts 4505
+system.cpu.num_fp_insts 0
+system.cpu.num_int_register_reads 10598
+system.cpu.num_int_register_writes 4845
+system.cpu.num_fp_register_reads 0
+system.cpu.num_fp_register_writes 0
+system.cpu.num_mem_refs 1401
+system.cpu.num_load_insts 723
+system.cpu.num_store_insts 678
+system.cpu.num_idle_cycles 0
+system.cpu.num_busy_cycles 86746
+system.cpu.not_idle_fraction 1
+system.cpu.idle_fraction 0
+system.cpu.Branches 1121
+system.cpu.op_class::No_OpClass 173 3.22% 3.22%
+system.cpu.op_class::IntAlu 3796 70.69% 73.91%
+system.cpu.op_class::IntMult 0 0.00% 73.91%
+system.cpu.op_class::IntDiv 0 0.00% 73.91%
+system.cpu.op_class::FloatAdd 0 0.00% 73.91%
+system.cpu.op_class::FloatCmp 0 0.00% 73.91%
+system.cpu.op_class::FloatCvt 0 0.00% 73.91%
+system.cpu.op_class::FloatMult 0 0.00% 73.91%
+system.cpu.op_class::FloatMultAcc 0 0.00% 73.91%
+system.cpu.op_class::FloatDiv 0 0.00% 73.91%
+system.cpu.op_class::FloatMisc 0 0.00% 73.91%
+system.cpu.op_class::FloatSqrt 0 0.00% 73.91%
+system.cpu.op_class::SimdAdd 0 0.00% 73.91%
+system.cpu.op_class::SimdAddAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdAlu 0 0.00% 73.91%
+system.cpu.op_class::SimdCmp 0 0.00% 73.91%
+system.cpu.op_class::SimdCvt 0 0.00% 73.91%
+system.cpu.op_class::SimdMisc 0 0.00% 73.91%
+system.cpu.op_class::SimdMult 0 0.00% 73.91%
+system.cpu.op_class::SimdMultAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdShift 0 0.00% 73.91%
+system.cpu.op_class::SimdShiftAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdSqrt 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatAdd 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatAlu 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatCmp 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatCvt 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatDiv 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatMisc 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatMult 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91%
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91%
+system.cpu.op_class::MemRead 723 13.46% 87.37%
+system.cpu.op_class::MemWrite 678 12.63% 100.00%
+system.cpu.op_class::FloatMemRead 0 0.00% 100.00%
+system.cpu.op_class::FloatMemWrite 0 0.00% 100.00%
+system.cpu.op_class::IprAccess 0 0.00% 100.00%
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00%
+system.cpu.op_class::total 5370
+system.ruby.clk_domain.clock 1
+system.ruby.pwrStateResidencyTicks::UNDEFINED 86746
+system.ruby.delayHist::bucket_size 1
+system.ruby.delayHist::max_bucket 9
+system.ruby.delayHist::samples 2574
+system.ruby.delayHist | 2574 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.delayHist::total 2574
system.ruby.outstanding_req_hist_seqr::bucket_size 1
system.ruby.outstanding_req_hist_seqr::max_bucket 9
system.ruby.outstanding_req_hist_seqr::samples 6759
@@ -381,36 +381,36 @@ system.ruby.miss_latency_hist_seqr::stdev 35.397665
system.ruby.miss_latency_hist_seqr | 610 47.32% 47.32% | 633 49.11% 96.43% | 36 2.79% 99.22% | 1 0.08% 99.30% | 6 0.47% 99.77% | 2 0.16% 99.92% | 0 0.00% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.miss_latency_hist_seqr::total 1289
system.ruby.Directory.incomplete_times_seqr 1288
-system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time 0.995735 # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs 0.029672 # Average number of messages in buffer
-system.ruby.dir_cntrl0.requestToDir.avg_stall_time 11.745697 # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.dir_cntrl0.responseFromDir.avg_stall_time 0.999205 # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs 0.029672 # Average number of messages in buffer
-system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time 0.999216 # Average number of cycles messages are stalled in this MB
-system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
-system.ruby.l1_cntrl0.cacheMemory.demand_hits 5469 # Number of cache demand hits
-system.ruby.l1_cntrl0.cacheMemory.demand_misses 1289 # Number of cache demand misses
-system.ruby.l1_cntrl0.cacheMemory.demand_accesses 6758 # Number of cache demand accesses
-system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.l1_cntrl0.forwardToCache.avg_stall_time 6.969659 # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs 0.077916 # Average number of messages in buffer
-system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time 0.999988 # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs 0.059345 # Average number of messages in buffer
-system.ruby.l1_cntrl0.requestFromCache.avg_stall_time 1.999931 # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.l1_cntrl0.responseToCache.avg_stall_time 6.993948 # Average number of cycles messages are stalled in this MB
-system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
-system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
-system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
-system.ruby.network.routers0.port_buffers03.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.network.routers0.port_buffers03.avg_stall_time 5.974063 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers0.port_buffers04.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.network.routers0.port_buffers04.avg_stall_time 5.994882 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers0.port_buffers07.avg_buf_msgs 0.088925 # Average number of messages in buffer
-system.ruby.network.routers0.port_buffers07.avg_stall_time 6.746619 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
+system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs 0.014813
+system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time 0.995735
+system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs 0.029672
+system.ruby.dir_cntrl0.requestToDir.avg_stall_time 11.745697
+system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs 0.014859
+system.ruby.dir_cntrl0.responseFromDir.avg_stall_time 0.999205
+system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs 0.029672
+system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time 0.999216
+system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 86746
+system.ruby.l1_cntrl0.cacheMemory.demand_hits 5469
+system.ruby.l1_cntrl0.cacheMemory.demand_misses 1289
+system.ruby.l1_cntrl0.cacheMemory.demand_accesses 6758
+system.ruby.l1_cntrl0.forwardToCache.avg_buf_msgs 0.014813
+system.ruby.l1_cntrl0.forwardToCache.avg_stall_time 6.969659
+system.ruby.l1_cntrl0.mandatoryQueue.avg_buf_msgs 0.077916
+system.ruby.l1_cntrl0.mandatoryQueue.avg_stall_time 0.999988
+system.ruby.l1_cntrl0.requestFromCache.avg_buf_msgs 0.059345
+system.ruby.l1_cntrl0.requestFromCache.avg_stall_time 1.999931
+system.ruby.l1_cntrl0.responseToCache.avg_buf_msgs 0.014859
+system.ruby.l1_cntrl0.responseToCache.avg_stall_time 6.993948
+system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 86746
+system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 86746
+system.ruby.memctrl_clk_domain.clock 3
+system.ruby.network.routers0.port_buffers03.avg_buf_msgs 0.014813
+system.ruby.network.routers0.port_buffers03.avg_stall_time 5.974063
+system.ruby.network.routers0.port_buffers04.avg_buf_msgs 0.014859
+system.ruby.network.routers0.port_buffers04.avg_stall_time 5.994882
+system.ruby.network.routers0.port_buffers07.avg_buf_msgs 0.088925
+system.ruby.network.routers0.port_buffers07.avg_stall_time 6.746619
+system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 86746
system.ruby.network.routers0.percent_links_utilized 7.418209
system.ruby.network.routers0.msg_count.Control::2 1289
system.ruby.network.routers0.msg_count.Data::2 1285
@@ -420,13 +420,13 @@ system.ruby.network.routers0.msg_bytes.Control::2 10312
system.ruby.network.routers0.msg_bytes.Data::2 92520
system.ruby.network.routers0.msg_bytes.Response_Data::4 92808
system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10280
-system.ruby.network.routers1.port_buffers02.avg_buf_msgs 0.029672 # Average number of messages in buffer
-system.ruby.network.routers1.port_buffers02.avg_stall_time 10.745928 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers1.port_buffers06.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.network.routers1.port_buffers06.avg_stall_time 1.991446 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers1.port_buffers07.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.network.routers1.port_buffers07.avg_stall_time 1.998386 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
+system.ruby.network.routers1.port_buffers02.avg_buf_msgs 0.029672
+system.ruby.network.routers1.port_buffers02.avg_stall_time 10.745928
+system.ruby.network.routers1.port_buffers06.avg_buf_msgs 0.014813
+system.ruby.network.routers1.port_buffers06.avg_stall_time 1.991446
+system.ruby.network.routers1.port_buffers07.avg_buf_msgs 0.014859
+system.ruby.network.routers1.port_buffers07.avg_stall_time 1.998386
+system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 86746
system.ruby.network.routers1.percent_links_utilized 7.418209
system.ruby.network.routers1.msg_count.Control::2 1289
system.ruby.network.routers1.msg_count.Data::2 1285
@@ -436,25 +436,25 @@ system.ruby.network.routers1.msg_bytes.Control::2 10312
system.ruby.network.routers1.msg_bytes.Data::2 92520
system.ruby.network.routers1.msg_bytes.Response_Data::4 92808
system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10280
-system.ruby.network.int_link_buffers02.avg_buf_msgs 0.029672 # Average number of messages in buffer
-system.ruby.network.int_link_buffers02.avg_stall_time 7.746481 # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers08.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.network.int_link_buffers08.avg_stall_time 2.987135 # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers09.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.network.int_link_buffers09.avg_stall_time 2.997545 # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers13.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.network.int_link_buffers13.avg_stall_time 4.978443 # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers14.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.network.int_link_buffers14.avg_stall_time 4.995792 # Average number of cycles messages are stalled in this MB
-system.ruby.network.int_link_buffers17.avg_buf_msgs 0.029672 # Average number of messages in buffer
-system.ruby.network.int_link_buffers17.avg_stall_time 9.746135 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.port_buffers03.avg_buf_msgs 0.014813 # Average number of messages in buffer
-system.ruby.network.routers2.port_buffers03.avg_stall_time 3.982801 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.port_buffers04.avg_buf_msgs 0.014859 # Average number of messages in buffer
-system.ruby.network.routers2.port_buffers04.avg_stall_time 3.996680 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.port_buffers07.avg_buf_msgs 0.029672 # Average number of messages in buffer
-system.ruby.network.routers2.port_buffers07.avg_stall_time 8.746320 # Average number of cycles messages are stalled in this MB
-system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
+system.ruby.network.int_link_buffers02.avg_buf_msgs 0.029672
+system.ruby.network.int_link_buffers02.avg_stall_time 7.746481
+system.ruby.network.int_link_buffers08.avg_buf_msgs 0.014813
+system.ruby.network.int_link_buffers08.avg_stall_time 2.987135
+system.ruby.network.int_link_buffers09.avg_buf_msgs 0.014859
+system.ruby.network.int_link_buffers09.avg_stall_time 2.997545
+system.ruby.network.int_link_buffers13.avg_buf_msgs 0.014813
+system.ruby.network.int_link_buffers13.avg_stall_time 4.978443
+system.ruby.network.int_link_buffers14.avg_buf_msgs 0.014859
+system.ruby.network.int_link_buffers14.avg_stall_time 4.995792
+system.ruby.network.int_link_buffers17.avg_buf_msgs 0.029672
+system.ruby.network.int_link_buffers17.avg_stall_time 9.746135
+system.ruby.network.routers2.port_buffers03.avg_buf_msgs 0.014813
+system.ruby.network.routers2.port_buffers03.avg_stall_time 3.982801
+system.ruby.network.routers2.port_buffers04.avg_buf_msgs 0.014859
+system.ruby.network.routers2.port_buffers04.avg_stall_time 3.996680
+system.ruby.network.routers2.port_buffers07.avg_buf_msgs 0.029672
+system.ruby.network.routers2.port_buffers07.avg_stall_time 8.746320
+system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 86746
system.ruby.network.routers2.percent_links_utilized 7.418209
system.ruby.network.routers2.msg_count.Control::2 1289
system.ruby.network.routers2.msg_count.Data::2 1285
@@ -464,7 +464,7 @@ system.ruby.network.routers2.msg_bytes.Control::2 10312
system.ruby.network.routers2.msg_bytes.Data::2 92520
system.ruby.network.routers2.msg_bytes.Response_Data::4 92808
system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10280
-system.ruby.network.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
+system.ruby.network.pwrStateResidencyTicks::UNDEFINED 86746
system.ruby.network.msg_count.Control 3867
system.ruby.network.msg_count.Data 3855
system.ruby.network.msg_count.Response_Data 3867
@@ -473,7 +473,7 @@ system.ruby.network.msg_byte.Control 30936
system.ruby.network.msg_byte.Data 277560
system.ruby.network.msg_byte.Response_Data 278424
system.ruby.network.msg_byte.Writeback_Control 30840
-system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 86746 # Cumulative time (in ticks) in various power states
+system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 86746
system.ruby.network.routers0.throttle0.link_utilization 7.427432
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1289
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1285
@@ -504,16 +504,16 @@ system.ruby.network.routers2.throttle1.msg_count.Control::2 1289
system.ruby.network.routers2.throttle1.msg_count.Data::2 1285
system.ruby.network.routers2.throttle1.msg_bytes.Control::2 10312
system.ruby.network.routers2.throttle1.msg_bytes.Data::2 92520
-system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1::samples 1289 # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1 | 1289 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_1::total 1289 # delay histogram for vnet_1
-system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2::samples 1285 # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2 | 1285 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
-system.ruby.delayVCHist.vnet_2::total 1285 # delay histogram for vnet_2
+system.ruby.delayVCHist.vnet_1::bucket_size 1
+system.ruby.delayVCHist.vnet_1::max_bucket 9
+system.ruby.delayVCHist.vnet_1::samples 1289
+system.ruby.delayVCHist.vnet_1 | 1289 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.delayVCHist.vnet_1::total 1289
+system.ruby.delayVCHist.vnet_2::bucket_size 1
+system.ruby.delayVCHist.vnet_2::max_bucket 9
+system.ruby.delayVCHist.vnet_2::samples 1285
+system.ruby.delayVCHist.vnet_2 | 1285 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
+system.ruby.delayVCHist.vnet_2::total 1285
system.ruby.LD.latency_hist_seqr::bucket_size 64
system.ruby.LD.latency_hist_seqr::max_bucket 639
system.ruby.LD.latency_hist_seqr::samples 715
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini
index 467bc0996..48a2ce7b0 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini
@@ -85,6 +85,7 @@ progress_interval=0
simpoint_start_insts=
socket_id=0
switched_out=false
+syscallRetryLatency=10000
system=system
tracer=system.cpu.tracer
workload=system.cpu.workload
@@ -94,14 +95,14 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=Cache
children=tags
-addr_ranges=0:18446744073709551615
+addr_ranges=0:18446744073709551615:0:0:0:0
assoc=2
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
@@ -115,6 +116,7 @@ response_latency=2
sequential_access=false
size=262144
system=system
+tag_latency=2
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
@@ -127,15 +129,16 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+data_latency=2
default_p_state=UNDEFINED
eventq_index=0
-hit_latency=2
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=262144
+tag_latency=2
[system.cpu.dtb]
type=SparcTLB
@@ -145,14 +148,14 @@ size=64
[system.cpu.icache]
type=Cache
children=tags
-addr_ranges=0:18446744073709551615
+addr_ranges=0:18446744073709551615:0:0:0:0
assoc=2
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+data_latency=2
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-hit_latency=2
is_read_only=true
max_miss_count=0
mshrs=4
@@ -166,6 +169,7 @@ response_latency=2
sequential_access=false
size=131072
system=system
+tag_latency=2
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
@@ -178,15 +182,16 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+data_latency=2
default_p_state=UNDEFINED
eventq_index=0
-hit_latency=2
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=131072
+tag_latency=2
[system.cpu.interrupts]
type=SparcInterrupts
@@ -204,14 +209,14 @@ size=64
[system.cpu.l2cache]
type=Cache
children=tags
-addr_ranges=0:18446744073709551615
+addr_ranges=0:18446744073709551615:0:0:0:0
assoc=8
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+data_latency=20
default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-hit_latency=20
is_read_only=false
max_miss_count=0
mshrs=20
@@ -225,6 +230,7 @@ response_latency=20
sequential_access=false
size=2097152
system=system
+tag_latency=20
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
@@ -237,15 +243,16 @@ type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
+data_latency=20
default_p_state=UNDEFINED
eventq_index=0
-hit_latency=20
p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
sequential_access=false
size=2097152
+tag_latency=20
[system.cpu.toL2Bus]
type=CoherentXBar
@@ -281,7 +288,7 @@ type=ExeTracer
eventq_index=0
[system.cpu.workload]
-type=LiveProcess
+type=Process
cmd=hello
cwd=
drivers=
@@ -290,14 +297,15 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/arm/projectscratch/randd/systems/dist/test-progs/hello/bin/sparc/linux/hello
+executable=/usr/local/google/home/gabeblack/gem5/dist/m5/regression/test-progs/hello/bin/sparc/linux/hello
gid=100
input=cin
kvmInSE=false
-max_stack_size=67108864
+maxStackSize=67108864
output=cout
+pgid=100
pid=100
-ppid=99
+ppid=0
simpoint=0
system=system
uid=100
@@ -321,6 +329,7 @@ transition_latency=100000000
[system.membus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.clk_domain
default_p_state=UNDEFINED
eventq_index=0
@@ -332,7 +341,7 @@ p_state_clk_gate_min=1000
point_of_coherency=true
power_model=Null
response_latency=2
-snoop_filter=Null
+snoop_filter=system.membus.snoop_filter
snoop_response_latency=4
system=system
use_default_range=false
@@ -340,6 +349,13 @@ width=16
master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
+[system.membus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=1
+max_capacity=8388608
+system=system
+
[system.physmem]
type=SimpleMemory
bandwidth=73.000000
@@ -348,6 +364,7 @@ conf_table_reported=true
default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
+kvm_map=true
latency=30000
latency_var=0
null=false
@@ -355,7 +372,7 @@ p_state_clk_gate_bins=20
p_state_clk_gate_max=1000000000000
p_state_clk_gate_min=1000
power_model=Null
-range=0:134217727
+range=0:134217727:0:0:0:0
port=system.membus.master[0]
[system.voltage_domain]
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr
index aadc3d011..c0b55d123 100755
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr
@@ -1,2 +1,3 @@
warn: Sockets disabled, not accepting gdb connections
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
+info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout
index a65457027..55314358f 100755
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout
@@ -3,11 +3,10 @@ Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 21 2016 14:30:06
-gem5 started Jul 21 2016 14:30:36
-gem5 executing on e108600-lin, pid 38670
-command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-timing
+gem5 compiled Apr 3 2017 18:41:19
+gem5 started Apr 3 2017 18:41:41
+gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64913
+command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/00.hello/sparc/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
-info: Entering event queue @ 0. Starting simulation...
-Hello World!Exiting @ tick 30526500 because target called exit()
+Hello World!Exiting @ tick 30915500 because exiting with last active thread context
diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
index 7d03d8b84..058393673 100644
--- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
@@ -1,497 +1,497 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.000031 # Number of seconds simulated
-sim_ticks 30915500 # Number of ticks simulated
-final_tick 30915500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
-sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 536275 # Simulator instruction rate (inst/s)
-host_op_rate 534981 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3098223884 # Simulator tick rate (ticks/s)
-host_mem_usage 250312 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
-sim_insts 5327 # Number of instructions simulated
-sim_ops 5327 # Number of ops (including micro ops) simulated
-system.voltage_domain.voltage 1 # Voltage in Volts
-system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.pwrStateResidencyTicks::UNDEFINED 30915500 # Cumulative time (in ticks) in various power states
-system.physmem.bytes_read::cpu.inst 16320 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 8576 # Number of bytes read from this memory
-system.physmem.bytes_read::total 24896 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 16320 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 16320 # Number of instructions bytes read from this memory
-system.physmem.num_reads::cpu.inst 255 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 134 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 389 # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu.inst 527890540 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 277401304 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 805291844 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 527890540 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 527890540 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 527890540 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 277401304 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 805291844 # Total bandwidth to/from this memory (bytes/s)
-system.pwrStateResidencyTicks::UNDEFINED 30915500 # Cumulative time (in ticks) in various power states
-system.cpu_clk_domain.clock 500 # Clock period in ticks
-system.cpu.workload.numSyscalls 11 # Number of system calls
-system.cpu.pwrStateResidencyTicks::ON 30915500 # Cumulative time (in ticks) in various power states
-system.cpu.numCycles 61831 # number of cpu cycles simulated
-system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 5327 # Number of instructions committed
-system.cpu.committedOps 5327 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 4505 # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
-system.cpu.num_func_calls 146 # number of times a function call or return occured
-system.cpu.num_conditional_control_insts 773 # number of instructions that are conditional controls
-system.cpu.num_int_insts 4505 # number of integer instructions
-system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 10598 # number of times the integer registers were read
-system.cpu.num_int_register_writes 4845 # number of times the integer registers were written
-system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
-system.cpu.num_mem_refs 1401 # number of memory refs
-system.cpu.num_load_insts 723 # Number of load instructions
-system.cpu.num_store_insts 678 # Number of store instructions
-system.cpu.num_idle_cycles 0.002000 # Number of idle cycles
-system.cpu.num_busy_cycles 61830.998000 # Number of busy cycles
-system.cpu.not_idle_fraction 1.000000 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0.000000 # Percentage of idle cycles
-system.cpu.Branches 1121 # Number of branches fetched
-system.cpu.op_class::No_OpClass 173 3.22% 3.22% # Class of executed instruction
-system.cpu.op_class::IntAlu 3796 70.69% 73.91% # Class of executed instruction
-system.cpu.op_class::IntMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::IntDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::FloatSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdAlu 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdShift 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 73.91% # Class of executed instruction
-system.cpu.op_class::MemRead 723 13.46% 87.37% # Class of executed instruction
-system.cpu.op_class::MemWrite 678 12.63% 100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 5370 # Class of executed instruction
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 30915500 # Cumulative time (in ticks) in various power states
-system.cpu.dcache.tags.replacements 0 # number of replacements
-system.cpu.dcache.tags.tagsinuse 81.942328 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 1253 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 135 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 9.281481 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 81.942328 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.020005 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.020005 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_task_id_blocks::1024 135 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::0 28 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::1 107 # Occupied blocks per task id
-system.cpu.dcache.tags.occ_task_id_percent::1024 0.032959 # Percentage of cache occupancy per task id
-system.cpu.dcache.tags.tag_accesses 2911 # Number of tag accesses
-system.cpu.dcache.tags.data_accesses 2911 # Number of data accesses
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 30915500 # Cumulative time (in ticks) in various power states
-system.cpu.dcache.ReadReq_hits::cpu.data 661 # number of ReadReq hits
-system.cpu.dcache.ReadReq_hits::total 661 # number of ReadReq hits
-system.cpu.dcache.WriteReq_hits::cpu.data 592 # number of WriteReq hits
-system.cpu.dcache.WriteReq_hits::total 592 # number of WriteReq hits
-system.cpu.dcache.demand_hits::cpu.data 1253 # number of demand (read+write) hits
-system.cpu.dcache.demand_hits::total 1253 # number of demand (read+write) hits
-system.cpu.dcache.overall_hits::cpu.data 1253 # number of overall hits
-system.cpu.dcache.overall_hits::total 1253 # number of overall hits
-system.cpu.dcache.ReadReq_misses::cpu.data 54 # number of ReadReq misses
-system.cpu.dcache.ReadReq_misses::total 54 # number of ReadReq misses
-system.cpu.dcache.WriteReq_misses::cpu.data 81 # number of WriteReq misses
-system.cpu.dcache.WriteReq_misses::total 81 # number of WriteReq misses
-system.cpu.dcache.demand_misses::cpu.data 135 # number of demand (read+write) misses
-system.cpu.dcache.demand_misses::total 135 # number of demand (read+write) misses
-system.cpu.dcache.overall_misses::cpu.data 135 # number of overall misses
-system.cpu.dcache.overall_misses::total 135 # number of overall misses
-system.cpu.dcache.ReadReq_miss_latency::cpu.data 3353000 # number of ReadReq miss cycles
-system.cpu.dcache.ReadReq_miss_latency::total 3353000 # number of ReadReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::cpu.data 5103000 # number of WriteReq miss cycles
-system.cpu.dcache.WriteReq_miss_latency::total 5103000 # number of WriteReq miss cycles
-system.cpu.dcache.demand_miss_latency::cpu.data 8456000 # number of demand (read+write) miss cycles
-system.cpu.dcache.demand_miss_latency::total 8456000 # number of demand (read+write) miss cycles
-system.cpu.dcache.overall_miss_latency::cpu.data 8456000 # number of overall miss cycles
-system.cpu.dcache.overall_miss_latency::total 8456000 # number of overall miss cycles
-system.cpu.dcache.ReadReq_accesses::cpu.data 715 # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.ReadReq_accesses::total 715 # number of ReadReq accesses(hits+misses)
-system.cpu.dcache.WriteReq_accesses::cpu.data 673 # number of WriteReq accesses(hits+misses)
-system.cpu.dcache.WriteReq_accesses::total 673 # number of WriteReq accesses(hits+misses)
-system.cpu.dcache.demand_accesses::cpu.data 1388 # number of demand (read+write) accesses
-system.cpu.dcache.demand_accesses::total 1388 # number of demand (read+write) accesses
-system.cpu.dcache.overall_accesses::cpu.data 1388 # number of overall (read+write) accesses
-system.cpu.dcache.overall_accesses::total 1388 # number of overall (read+write) accesses
-system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.075524 # miss rate for ReadReq accesses
-system.cpu.dcache.ReadReq_miss_rate::total 0.075524 # miss rate for ReadReq accesses
-system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.120357 # miss rate for WriteReq accesses
-system.cpu.dcache.WriteReq_miss_rate::total 0.120357 # miss rate for WriteReq accesses
-system.cpu.dcache.demand_miss_rate::cpu.data 0.097262 # miss rate for demand accesses
-system.cpu.dcache.demand_miss_rate::total 0.097262 # miss rate for demand accesses
-system.cpu.dcache.overall_miss_rate::cpu.data 0.097262 # miss rate for overall accesses
-system.cpu.dcache.overall_miss_rate::total 0.097262 # miss rate for overall accesses
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 62092.592593 # average ReadReq miss latency
-system.cpu.dcache.ReadReq_avg_miss_latency::total 62092.592593 # average ReadReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000 # average WriteReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::total 63000 # average WriteReq miss latency
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 62637.037037 # average overall miss latency
-system.cpu.dcache.demand_avg_miss_latency::total 62637.037037 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 62637.037037 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::total 62637.037037 # average overall miss latency
-system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
-system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
-system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
-system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data 54 # number of ReadReq MSHR misses
-system.cpu.dcache.ReadReq_mshr_misses::total 54 # number of ReadReq MSHR misses
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data 81 # number of WriteReq MSHR misses
-system.cpu.dcache.WriteReq_mshr_misses::total 81 # number of WriteReq MSHR misses
-system.cpu.dcache.demand_mshr_misses::cpu.data 135 # number of demand (read+write) MSHR misses
-system.cpu.dcache.demand_mshr_misses::total 135 # number of demand (read+write) MSHR misses
-system.cpu.dcache.overall_mshr_misses::cpu.data 135 # number of overall MSHR misses
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-system.cpu.toL2Bus.snoops 0 # Total snoops (count)
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-system.cpu.toL2Bus.snoop_fanout::mean 0.007653 # Request fanout histogram
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-system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
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---------- End Simulation Statistics ----------