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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-10 12:44:03 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-10 12:44:03 -0500 |
| commit | 5cdf221d8ce3f5b983672f26346aefc21b37a752 (patch) | |
| tree | ac039244b78f69bee1d0dea82e48827fba97fe3c /tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout | |
| parent | c5bf1390aa129fefa7102e2de2998c0e6b09b5b0 (diff) | |
| download | gem5-5cdf221d8ce3f5b983672f26346aefc21b37a752.tar.xz | |
Regression: Updates due to changes to Ruby memory controller
Diffstat (limited to 'tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout')
| -rwxr-xr-x | tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout index f0077f0d5..290b12614 100755 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout @@ -1,11 +1,13 @@ +Redirecting stdout to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simout +Redirecting stderr to build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 13 2012 17:08:22 -gem5 started Aug 13 2012 18:23:02 -gem5 executing on zizzer +gem5 compiled Sep 9 2012 13:51:17 +gem5 started Sep 9 2012 13:51:25 +gem5 executing on ribera.cs.wisc.edu command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Hello world! -Exiting @ tick 276484 because target called exit() +Exiting @ tick 121759 because target called exit() |