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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-05-21 11:41:27 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-05-21 11:41:27 -0500 |
| commit | af2e83c7f13098b66ceb6ba69599f1959da44ea1 (patch) | |
| tree | a634f32d705cb32d614dcd43d819d8e3e26dd547 /tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt | |
| parent | 22b60c57e697289baa205f11b164f356363c2bee (diff) | |
| download | gem5-af2e83c7f13098b66ceb6ba69599f1959da44ea1.tar.xz | |
x86, regressions: updates stats
This is due to op class, function call, walker patches.
Diffstat (limited to 'tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt')
| -rw-r--r-- | tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt index 8f40b774d..db0163c4d 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000122 # Nu sim_ticks 121759 # Number of ticks simulated final_tick 121759 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 7080 # Simulator instruction rate (inst/s) -host_op_rate 12826 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 160202 # Simulator tick rate (ticks/s) +host_inst_rate 32232 # Simulator instruction rate (inst/s) +host_op_rate 58383 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 729156 # Simulator tick rate (ticks/s) host_mem_usage 170120 # Number of bytes of host memory used -host_seconds 0.76 # Real time elapsed on the host +host_seconds 0.17 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits @@ -22,7 +22,7 @@ system.cpu.committedInsts 5381 # Nu system.cpu.committedOps 9748 # Number of ops (including micro ops) committed system.cpu.num_int_alu_accesses 9655 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu.num_func_calls 0 # number of times a function call or return occured +system.cpu.num_func_calls 209 # number of times a function call or return occured system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls system.cpu.num_int_insts 9655 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions |