diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2016-10-19 06:20:04 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-10-19 06:20:04 -0400 |
| commit | 607c2772915628c2c67c1c5bfdefaa33ae66a06e (patch) | |
| tree | f8f23fd4012f9a0053d65ac91792a7dc61d6baff /tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby | |
| parent | 71c982ff708cc3adc7c0eccf536fea34c20cc5f0 (diff) | |
| download | gem5-607c2772915628c2c67c1c5bfdefaa33ae66a06e.tar.xz | |
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding
reads/writes.
Diffstat (limited to 'tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby')
| -rw-r--r-- | tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt index 61c4aeeab..c59c92e77 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000092 # Nu sim_ticks 91859 # Number of ticks simulated final_tick 91859 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 42401 # Simulator instruction rate (inst/s) -host_op_rate 76797 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 723555 # Simulator tick rate (ticks/s) -host_mem_usage 431840 # Number of bytes of host memory used -host_seconds 0.13 # Real time elapsed on the host +host_inst_rate 91408 # Simulator instruction rate (inst/s) +host_op_rate 165563 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1559913 # Simulator tick rate (ticks/s) +host_mem_usage 432272 # Number of bytes of host memory used +host_seconds 0.06 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -319,7 +319,9 @@ system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Cl system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatMultAcc 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction +system.cpu.op_class::FloatMisc 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction @@ -343,6 +345,8 @@ system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Cl system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction +system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 9748 # Class of executed instruction |