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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-05-22 11:38:04 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-05-22 11:38:04 -0500 |
| commit | 0bff8eb210fedd89baed36ecab3608bb259ff520 (patch) | |
| tree | dc4a9c3ec0a1ab297a69a3fec3111d7e431b09cd /tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt | |
| parent | 1031fe7b6f6e29e3367750c3029b4dc850e062f5 (diff) | |
| download | gem5-0bff8eb210fedd89baed36ecab3608bb259ff520.tar.xz | |
X86 Regression: update stats due to cc register split
Diffstat (limited to 'tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt index bb825e929..2734be727 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt @@ -4,10 +4,10 @@ sim_seconds 0.000029 # Nu sim_ticks 28768000 # Number of ticks simulated final_tick 28768000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 193646 # Simulator instruction rate (inst/s) -host_op_rate 350298 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1026195488 # Simulator tick rate (ticks/s) -host_mem_usage 221892 # Number of bytes of host memory used +host_inst_rate 209143 # Simulator instruction rate (inst/s) +host_op_rate 378428 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1108849830 # Simulator tick rate (ticks/s) +host_mem_usage 269844 # Number of bytes of host memory used host_seconds 0.03 # Real time elapsed on the host sim_insts 5417 # Number of instructions simulated sim_ops 9810 # Number of ops (including micro ops) simulated @@ -32,8 +32,8 @@ system.cpu.num_func_calls 0 # nu system.cpu.num_conditional_control_insts 904 # number of instructions that are conditional controls system.cpu.num_int_insts 9715 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions -system.cpu.num_int_register_reads 21313 # number of times the integer registers were read -system.cpu.num_int_register_writes 9368 # number of times the integer registers were written +system.cpu.num_int_register_reads 29928 # number of times the integer registers were read +system.cpu.num_int_register_writes 14707 # number of times the integer registers were written system.cpu.num_fp_register_reads 0 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written system.cpu.num_mem_refs 1990 # number of memory refs |