stats: update stats for no_value -> nan

Lots of accumulated older changes too.

13 files changed, 139 insertions, 123 deletions

diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini
index 7b5ea1d59..1666732e2 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
 mem_mode=atomic
 memories=system.physmem
 num_work_ids=16
-physmem=system.physmem
 readfile=
 symbolfile=
 work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
 
 [system.cpu]
 type=DerivO3CPU
@@ -127,7 +126,7 @@ icache_port=system.cpu.icache.cpu_side
 
 [system.cpu.dcache]
 type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
 forward_snoops=true
@@ -148,7 +147,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.port[1]
+mem_side=system.cpu.toL2Bus.slave[1]
 
 [system.cpu.dtb]
 type=X86TLB
@@ -159,7 +158,7 @@ walker=system.cpu.dtb.walker
 [system.cpu.dtb.walker]
 type=X86PagetableWalker
 system=system
-port=system.cpu.toL2Bus.port[3]
+port=system.cpu.toL2Bus.slave[3]
 
 [system.cpu.fuPool]
 type=FUPool
@@ -426,7 +425,7 @@ opLat=3
 
 [system.cpu.icache]
 type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
 forward_snoops=true
@@ -447,7 +446,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.port[0]
+mem_side=system.cpu.toL2Bus.slave[0]
 
 [system.cpu.interrupts]
 type=X86LocalApic
@@ -455,8 +454,9 @@ int_latency=1000
 pio_addr=2305843009213693952
 pio_latency=1000
 system=system
-int_port=system.membus.port[4]
-pio=system.membus.port[3]
+int_master=system.membus.slave[2]
+int_slave=system.membus.master[2]
+pio=system.membus.master[1]
 
 [system.cpu.itb]
 type=X86TLB
@@ -467,11 +467,11 @@ walker=system.cpu.itb.walker
 [system.cpu.itb.walker]
 type=X86PagetableWalker
 system=system
-port=system.cpu.toL2Bus.port[2]
+port=system.cpu.toL2Bus.slave[2]
 
 [system.cpu.l2cache]
 type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
 forward_snoops=true
@@ -491,8 +491,8 @@ tgts_per_mshr=5
 trace_addr=0
 two_queue=false
 write_buffers=8
-cpu_side=system.cpu.toL2Bus.port[4]
-mem_side=system.membus.port[2]
+cpu_side=system.cpu.toL2Bus.master[0]
+mem_side=system.membus.slave[1]
 
 [system.cpu.toL2Bus]
 type=Bus
@@ -502,7 +502,8 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
+master=system.cpu.l2cache.cpu_side
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -534,15 +535,18 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side system.cpu.interrupts.pio system.cpu.interrupts.int_port
+master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave
+slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
 
 [system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
 file=
+in_addr_map=true
 latency=30000
 latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[1]
+port=system.membus.master[0]
 
diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout
index eda7f85a5..9c9739cf4 100755
--- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout
+++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout
@@ -1,10 +1,10 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Feb 12 2012 17:18:12
-gem5 started Feb 12 2012 18:26:23
-gem5 executing on zizzer
-command line: build/X86/gem5.fast -d build/X86/tests/fast/quick/se/00.hello/x86/linux/o3-timing -re tests/run.py build/X86/tests/fast/quick/se/00.hello/x86/linux/o3-timing
+gem5 compiled May  8 2012 15:05:30
+gem5 started May  8 2012 15:49:56
+gem5 executing on piton
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Hello world!
diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
index 475f993c2..cb09e3c8e 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000012                       # Nu
 sim_ticks                                    12299500                       # Number of ticks simulated
 final_tick                                   12299500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                  59298                       # Simulator instruction rate (inst/s)
-host_op_rate                                   107375                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              134612595                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 218308                       # Number of bytes of host memory used
-host_seconds                                     0.09                       # Real time elapsed on the host
+host_inst_rate                                  24245                       # Simulator instruction rate (inst/s)
+host_op_rate                                    43905                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                               55046151                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 223460                       # Number of bytes of host memory used
+host_seconds                                     0.22                       # Real time elapsed on the host
 sim_insts                                        5416                       # Number of instructions simulated
 sim_ops                                          9809                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read                       28864                       # Number of bytes read from this memory
@@ -329,8 +329,8 @@ system.cpu.icache.blocked_cycles::no_mshrs            0                       #
 system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
 system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs     no_value                       # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets     no_value                       # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.cache_copies                      0                       # number of cache copies performed
 system.cpu.icache.ReadReq_mshr_hits::cpu.inst           88                       # number of ReadReq MSHR hits
@@ -411,8 +411,8 @@ system.cpu.dcache.blocked_cycles::no_mshrs            0                       #
 system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
 system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs     no_value                       # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets     no_value                       # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.cache_copies                      0                       # number of cache copies performed
 system.cpu.dcache.ReadReq_mshr_hits::cpu.data           44                       # number of ReadReq MSHR hits
@@ -514,8 +514,8 @@ system.cpu.l2cache.blocked_cycles::no_mshrs            0                       #
 system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
 system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs     no_value                       # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets     no_value                       # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
 system.cpu.l2cache.cache_copies                     0                       # number of cache copies performed
 system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst          302                       # number of ReadReq MSHR misses
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini
index 8e464f4fc..c00e48a14 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
 mem_mode=atomic
 memories=system.physmem
 num_work_ids=16
-physmem=system.physmem
 readfile=
 symbolfile=
 work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
 
 [system.cpu]
 type=AtomicSimpleCPU
@@ -39,6 +38,7 @@ do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
 dtb=system.cpu.dtb
+fastmem=false
 function_trace=false
 function_trace_start=0
 interrupts=system.cpu.interrupts
@@ -57,8 +57,8 @@ system=system
 tracer=system.cpu.tracer
 width=1
 workload=system.cpu.workload
-dcache_port=system.membus.port[3]
-icache_port=system.membus.port[2]
+dcache_port=system.membus.slave[2]
+icache_port=system.membus.slave[1]
 
 [system.cpu.dtb]
 type=X86TLB
@@ -69,7 +69,7 @@ walker=system.cpu.dtb.walker
 [system.cpu.dtb.walker]
 type=X86PagetableWalker
 system=system
-port=system.membus.port[5]
+port=system.membus.slave[4]
 
 [system.cpu.interrupts]
 type=X86LocalApic
@@ -77,8 +77,9 @@ int_latency=1000
 pio_addr=2305843009213693952
 pio_latency=1000
 system=system
-int_port=system.membus.port[7]
-pio=system.membus.port[6]
+int_master=system.membus.slave[5]
+int_slave=system.membus.master[2]
+pio=system.membus.master[1]
 
 [system.cpu.itb]
 type=X86TLB
@@ -89,7 +90,7 @@ walker=system.cpu.itb.walker
 [system.cpu.itb.walker]
 type=X86PagetableWalker
 system=system
-port=system.membus.port[4]
+port=system.membus.slave[3]
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -121,15 +122,18 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.pio system.cpu.interrupts.int_port
+master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave
+slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
 
 [system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
 file=
+in_addr_map=true
 latency=30000
 latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[1]
+port=system.membus.master[0]
 
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout
index 51c6cbf48..972a98347 100755
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout
@@ -1,10 +1,10 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Feb 11 2012 13:08:53
-gem5 started Feb 11 2012 14:04:16
-gem5 executing on zizzer
-command line: build/X86/gem5.fast -d build/X86/tests/fast/quick/se/00.hello/x86/linux/simple-atomic -re tests/run.py build/X86/tests/fast/quick/se/00.hello/x86/linux/simple-atomic
+gem5 compiled May  8 2012 15:05:30
+gem5 started May  8 2012 15:49:56
+gem5 executing on piton
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Hello world!
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt
index d15c91451..0f9f946d6 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt
@@ -4,10 +4,10 @@ sim_seconds                                  0.000006                       # Nu
 sim_ticks                                     5651000                       # Number of ticks simulated
 final_tick                                    5651000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 364793                       # Simulator instruction rate (inst/s)
-host_op_rate                                   659825                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              379660541                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 207748                       # Number of bytes of host memory used
+host_inst_rate                                 330960                       # Simulator instruction rate (inst/s)
+host_op_rate                                   598371                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              344132346                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 213012                       # Number of bytes of host memory used
 host_seconds                                     0.02                       # Real time elapsed on the host
 sim_insts                                        5417                       # Number of instructions simulated
 sim_ops                                          9810                       # Number of ops (including micro ops) simulated
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
index 95be41a11..e879347ff 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
 mem_mode=timing
 memories=system.physmem
 num_work_ids=16
-physmem=system.physmem
 readfile=
 symbolfile=
 work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
-system_port=system.sys_port_proxy.port[0]
+system_port=system.sys_port_proxy.slave[0]
 
 [system.cpu]
 type=TimingSimpleCPU
@@ -54,8 +53,8 @@ progress_interval=0
 system=system
 tracer=system.cpu.tracer
 workload=system.cpu.workload
-dcache_port=system.l1_cntrl0.sequencer.port[1]
-icache_port=system.l1_cntrl0.sequencer.port[0]
+dcache_port=system.l1_cntrl0.sequencer.slave[1]
+icache_port=system.l1_cntrl0.sequencer.slave[0]
 
 [system.cpu.dtb]
 type=X86TLB
@@ -66,7 +65,7 @@ walker=system.cpu.dtb.walker
 [system.cpu.dtb.walker]
 type=X86PagetableWalker
 system=system
-port=system.l1_cntrl0.sequencer.port[3]
+port=system.l1_cntrl0.sequencer.slave[3]
 
 [system.cpu.interrupts]
 type=X86LocalApic
@@ -74,8 +73,9 @@ int_latency=1
 pio_addr=2305843009213693952
 pio_latency=1
 system=system
-int_port=system.l1_cntrl0.sequencer.port[5]
-pio=system.l1_cntrl0.sequencer.port[4]
+int_master=system.l1_cntrl0.sequencer.slave[4]
+int_slave=system.l1_cntrl0.sequencer.master[1]
+pio=system.l1_cntrl0.sequencer.master[0]
 
 [system.cpu.itb]
 type=X86TLB
@@ -86,7 +86,7 @@ walker=system.cpu.itb.walker
 [system.cpu.itb.walker]
 type=X86PagetableWalker
 system=system
-port=system.l1_cntrl0.sequencer.port[2]
+port=system.l1_cntrl0.sequencer.slave[2]
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -185,23 +185,26 @@ dcache=system.l1_cntrl0.cacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.cacheMemory
 max_outstanding_requests=16
-physmem=system.physmem
 ruby_system=system.ruby
+support_data_reqs=true
+support_inst_reqs=true
+system=system
 using_network_tester=false
 using_ruby_tester=false
 version=0
-physMemPort=system.physmem.port[0]
-port=system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.pio system.cpu.interrupts.int_port
+master=system.cpu.interrupts.pio system.cpu.interrupts.int_slave
+slave=system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
 
 [system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
 file=
+in_addr_map=true
 latency=30
 latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.l1_cntrl0.sequencer.physMemPort system.sys_port_proxy.physMemPort
 
 [system.ruby]
 type=RubySystem
@@ -292,11 +295,12 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
-physmem=system.physmem
 ruby_system=system.ruby
+support_data_reqs=true
+support_inst_reqs=true
+system=system
 using_network_tester=false
 using_ruby_tester=false
 version=0
-physMemPort=system.physmem.port[1]
-port=system.system_port
+slave=system.system_port
 
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
index 33342e3e3..442d60f8b 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
@@ -34,27 +34,27 @@ periodic_stats_period: 1000000
 ================ End RubySystem Configuration Print ================
 
 
-Real time: Jan/23/2012 04:24:44
+Real time: May/08/2012 15:50:07
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 1
-Elapsed_time_in_minutes: 0.0166667
-Elapsed_time_in_hours: 0.000277778
-Elapsed_time_in_days: 1.15741e-05
+Elapsed_time_in_seconds: 0
+Elapsed_time_in_minutes: 0
+Elapsed_time_in_hours: 0
+Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.27
-Virtual_time_in_minutes: 0.0045
-Virtual_time_in_hours:   7.5e-05
-Virtual_time_in_days:    3.125e-06
+Virtual_time_in_seconds: 0.37
+Virtual_time_in_minutes: 0.00616667
+Virtual_time_in_hours:   0.000102778
+Virtual_time_in_days:    4.28241e-06
 
 Ruby_current_time: 276484
 Ruby_start_time: 0
 Ruby_cycles: 276484
 
-mbytes_resident: 46.1367
-mbytes_total: 218.203
-resident_ratio: 0.211439
+mbytes_resident: 52
+mbytes_total: 227.848
+resident_ratio: 0.228223
 
 ruby_cycles_executed: [ 276485 ]
 
@@ -125,10 +125,10 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 12102
-page_faults: 2
+page_reclaims: 13872
+page_faults: 0
 swaps: 0
-block_inputs: 144
+block_inputs: 0
 block_outputs: 88
 
 Network Stats
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout
index f8a22f9ca..15a51cba3 100755
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout
@@ -1,10 +1,10 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Feb 11 2012 13:08:53
-gem5 started Feb 11 2012 14:04:37
-gem5 executing on zizzer
-command line: build/X86/gem5.fast -d build/X86/tests/fast/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/fast/quick/se/00.hello/x86/linux/simple-timing-ruby
+gem5 compiled May  8 2012 15:05:30
+gem5 started May  8 2012 15:50:07
+gem5 executing on piton
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Hello world!
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
index 31a5db86e..3c66f2b85 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000276                       # Nu
 sim_ticks                                      276484                       # Number of ticks simulated
 final_tick                                     276484                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  47191                       # Simulator instruction rate (inst/s)
-host_op_rate                                    85448                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                2407911                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 228676                       # Number of bytes of host memory used
-host_seconds                                     0.11                       # Real time elapsed on the host
+host_inst_rate                                  46315                       # Simulator instruction rate (inst/s)
+host_op_rate                                    83864                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                2363372                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 233320                       # Number of bytes of host memory used
+host_seconds                                     0.12                       # Real time elapsed on the host
 sim_insts                                        5417                       # Number of instructions simulated
 sim_ops                                          9810                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read                       62348                       # Number of bytes read from this memory
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini
index 7bd202ff4..b01f0f148 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
 mem_mode=atomic
 memories=system.physmem
 num_work_ids=16
-physmem=system.physmem
 readfile=
 symbolfile=
 work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
 
 [system.cpu]
 type=TimingSimpleCPU
@@ -59,7 +58,7 @@ icache_port=system.cpu.icache.cpu_side
 
 [system.cpu.dcache]
 type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
 forward_snoops=true
@@ -80,7 +79,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.port[1]
+mem_side=system.cpu.toL2Bus.slave[1]
 
 [system.cpu.dtb]
 type=X86TLB
@@ -91,11 +90,11 @@ walker=system.cpu.dtb.walker
 [system.cpu.dtb.walker]
 type=X86PagetableWalker
 system=system
-port=system.cpu.toL2Bus.port[3]
+port=system.cpu.toL2Bus.slave[3]
 
 [system.cpu.icache]
 type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
 forward_snoops=true
@@ -116,7 +115,7 @@ trace_addr=0
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.port[0]
+mem_side=system.cpu.toL2Bus.slave[0]
 
 [system.cpu.interrupts]
 type=X86LocalApic
@@ -124,8 +123,9 @@ int_latency=1000
 pio_addr=2305843009213693952
 pio_latency=1000
 system=system
-int_port=system.membus.port[4]
-pio=system.membus.port[3]
+int_master=system.membus.slave[2]
+int_slave=system.membus.master[2]
+pio=system.membus.master[1]
 
 [system.cpu.itb]
 type=X86TLB
@@ -136,11 +136,11 @@ walker=system.cpu.itb.walker
 [system.cpu.itb.walker]
 type=X86PagetableWalker
 system=system
-port=system.cpu.toL2Bus.port[2]
+port=system.cpu.toL2Bus.slave[2]
 
 [system.cpu.l2cache]
 type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
 forward_snoops=true
@@ -160,8 +160,8 @@ tgts_per_mshr=5
 trace_addr=0
 two_queue=false
 write_buffers=8
-cpu_side=system.cpu.toL2Bus.port[4]
-mem_side=system.membus.port[2]
+cpu_side=system.cpu.toL2Bus.master[0]
+mem_side=system.membus.slave[1]
 
 [system.cpu.toL2Bus]
 type=Bus
@@ -171,7 +171,8 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
+master=system.cpu.l2cache.cpu_side
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 
 [system.cpu.tracer]
 type=ExeTracer
@@ -203,15 +204,18 @@ clock=1000
 header_cycles=1
 use_default_range=false
 width=64
-port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side system.cpu.interrupts.pio system.cpu.interrupts.int_port
+master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave
+slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
 
 [system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
 file=
+in_addr_map=true
 latency=30000
 latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.membus.port[1]
+port=system.membus.master[0]
 
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout
index 89203c6bc..f6aa045a2 100755
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout
@@ -1,10 +1,10 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Feb 11 2012 13:08:53
-gem5 started Feb 11 2012 14:04:26
-gem5 executing on zizzer
-command line: build/X86/gem5.fast -d build/X86/tests/fast/quick/se/00.hello/x86/linux/simple-timing -re tests/run.py build/X86/tests/fast/quick/se/00.hello/x86/linux/simple-timing
+gem5 compiled May  8 2012 15:05:30
+gem5 started May  8 2012 15:50:07
+gem5 executing on piton
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Hello world!
diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt
index c2e4355d3..bb825e929 100644
--- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000029                       # Nu
 sim_ticks                                    28768000                       # Number of ticks simulated
 final_tick                                   28768000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 265683                       # Simulator instruction rate (inst/s)
-host_op_rate                                   480724                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1408532008                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 216996                       # Number of bytes of host memory used
-host_seconds                                     0.02                       # Real time elapsed on the host
+host_inst_rate                                 193646                       # Simulator instruction rate (inst/s)
+host_op_rate                                   350298                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             1026195488                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 221892                       # Number of bytes of host memory used
+host_seconds                                     0.03                       # Real time elapsed on the host
 sim_insts                                        5417                       # Number of instructions simulated
 sim_ops                                          9810                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read                       23104                       # Number of bytes read from this memory
@@ -86,8 +86,8 @@ system.cpu.icache.blocked_cycles::no_mshrs            0                       #
 system.cpu.icache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.cpu.icache.blocked::no_mshrs                 0                       # number of cycles access was blocked
 system.cpu.icache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs     no_value                       # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets     no_value                       # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.cache_copies                      0                       # number of cache copies performed
 system.cpu.icache.ReadReq_mshr_misses::cpu.inst          228                       # number of ReadReq MSHR misses
@@ -162,8 +162,8 @@ system.cpu.dcache.blocked_cycles::no_mshrs            0                       #
 system.cpu.dcache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.cpu.dcache.blocked::no_mshrs                 0                       # number of cycles access was blocked
 system.cpu.dcache.blocked::no_targets               0                       # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs     no_value                       # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets     no_value                       # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.cache_copies                      0                       # number of cache copies performed
 system.cpu.dcache.ReadReq_mshr_misses::cpu.data           55                       # number of ReadReq MSHR misses
@@ -259,8 +259,8 @@ system.cpu.l2cache.blocked_cycles::no_mshrs            0                       #
 system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
 system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs     no_value                       # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets     no_value                       # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
 system.cpu.l2cache.cache_copies                     0                       # number of cache copies performed
 system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst          227                       # number of ReadReq MSHR misses