diff options
| author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-03-09 09:39:09 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-03-09 09:39:09 -0500 |
| commit | 99fb8f81407efa54008ddf443718e492f583b142 (patch) | |
| tree | 48e79a13dc012864045058f6ca3aadc3b9a767a8 /tests/quick/se/00.hello/ref | |
| parent | 0c8e025c3bd208e516f1c4247fdf3af7aebb2300 (diff) | |
| download | gem5-99fb8f81407efa54008ddf443718e492f583b142.tar.xz | |
stats: changes to due to recent set of patches
Diffstat (limited to 'tests/quick/se/00.hello/ref')
44 files changed, 386 insertions, 150 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/minor-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/minor-timing/config.ini index 0f651c9f7..8776aa226 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/minor-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/minor-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -638,8 +639,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -693,11 +697,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -728,7 +735,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini index 9165579c2..2212e87d6 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -587,8 +588,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -642,11 +646,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +684,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt index edf4ba710..d3a56e05c 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt @@ -569,7 +569,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 6389 # Class of committed instruction system.cpu.commit.bw_lim_events 190 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 25491 # The number of ROB reads system.cpu.rob.rob_writes 27316 # The number of ROB writes system.cpu.timesIdled 260 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini index 50fa51df7..f5748224b 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -107,6 +108,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -115,6 +117,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -144,11 +147,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.icache_port system.cpu.dcache_port diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini index 8f9379027..566450d05 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -336,7 +340,6 @@ unit_filter=8 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -506,7 +509,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini index f8cc14345..c453da7e6 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -321,7 +325,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -490,7 +493,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini index e68e0eb6b..c97f7f381 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -338,7 +342,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -510,7 +513,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini index 8473e2239..df9dcb459 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -360,7 +364,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -464,7 +467,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini index 791e6db74..a0fdb76c4 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -305,7 +309,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.cacheMemory deadlock_threshold=500000 @@ -409,7 +412,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini index 8332a7a3a..4f89807d5 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -207,8 +208,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -262,11 +266,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini index 66098146a..b89f21c49 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -638,8 +639,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -693,11 +697,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -728,7 +735,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini index 19ac3530d..78a45bd07 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -587,8 +588,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -642,11 +646,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +684,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt index 165a7d5f5..9e6af9059 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt @@ -569,7 +569,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 2576 # Class of committed instruction system.cpu.commit.bw_lim_events 69 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 11659 # The number of ROB reads system.cpu.rob.rob_writes 10686 # The number of ROB writes system.cpu.timesIdled 151 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini index f69c898cb..b1961bd8d 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -107,6 +108,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -115,6 +117,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -144,11 +147,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.icache_port system.cpu.dcache_port diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini index cfffbc558..58df6e402 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -336,7 +340,6 @@ unit_filter=8 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -506,7 +509,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini index 0dadccb22..7737f4b73 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -321,7 +325,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -490,7 +493,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini index e1272a9ad..5ec342cb1 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -338,7 +342,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -510,7 +513,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini index aaffdb113..8f4fa29a5 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -360,7 +364,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -464,7 +467,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini index 7b61f2363..a20d94574 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -111,6 +112,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -119,6 +121,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -163,7 +166,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -216,6 +219,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -305,7 +309,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.cacheMemory deadlock_threshold=500000 @@ -409,7 +412,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini index 402442761..ea66af4ee 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -82,6 +83,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -122,6 +124,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -171,6 +174,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -204,8 +208,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -220,6 +227,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -228,6 +236,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -257,11 +266,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side diff --git a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini index c7a245793..3d022001c 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/minor-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -167,6 +168,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -184,7 +186,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -661,6 +662,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -678,7 +680,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -737,13 +738,16 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -792,11 +796,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -827,7 +834,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini index 78a71faf3..c26f32538 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -191,6 +192,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.dtb [system.cpu.checker.dstage2_mmu.stage2_tlb] @@ -208,7 +210,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[9] [system.cpu.checker.dtb] type=ArmTLB @@ -225,7 +226,7 @@ eventq_index=0 is_stage2=false num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[7] +port=system.cpu.toL2Bus.slave[5] [system.cpu.checker.isa] type=ArmISA @@ -254,6 +255,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.checker.istage2_mmu] @@ -261,6 +263,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.itb [system.cpu.checker.istage2_mmu.stage2_tlb] @@ -278,7 +281,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[8] [system.cpu.checker.itb] type=ArmTLB @@ -295,7 +297,7 @@ eventq_index=0 is_stage2=false num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[6] +port=system.cpu.toL2Bus.slave[4] [system.cpu.checker.tracer] type=ExeTracer @@ -307,6 +309,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -341,6 +344,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -358,7 +362,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -690,6 +693,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -750,6 +754,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -757,6 +762,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -774,7 +780,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -799,6 +804,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -832,13 +838,16 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port system.cpu.checker.istage2_mmu.stage2_tlb.walker.port system.cpu.checker.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -848,6 +857,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -856,6 +866,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -885,11 +896,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -920,7 +934,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -929,6 +943,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt index eb7b98cb0..086544e33 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt @@ -773,7 +773,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 5377 # Class of committed instruction system.cpu.commit.bw_lim_events 113 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 22770 # The number of ROB reads system.cpu.rob.rob_writes 21679 # The number of ROB writes system.cpu.timesIdled 199 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini index a1b6a8304..8f050d759 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -157,6 +158,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -191,6 +193,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -208,7 +211,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -498,6 +500,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=1 @@ -558,6 +561,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -565,6 +569,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -582,7 +587,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -607,6 +611,7 @@ children=prefetcher tags addr_ranges=0:18446744073709551615 assoc=16 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=12 @@ -628,19 +633,27 @@ mem_side=system.membus.slave[1] [system.cpu.l2cache.prefetcher] type=StridePrefetcher +cache_snoop=false clk_domain=system.cpu_clk_domain -cross_pages=false -data_accesses_only=false degree=8 eventq_index=0 -inst_tagged=true latency=1 -on_miss_only=false -on_prefetch=true -on_read_only=false -serial_squash=false -size=100 +max_conf=7 +min_conf=0 +on_data=true +on_inst=true +on_miss=false +on_read=true +on_write=true +queue_filter=true +queue_size=32 +queue_squash=true +start_conf=4 sys=system +table_assoc=4 +table_sets=16 +tag_prefetch=true +thresh_conf=4 use_master_id=true [system.cpu.l2cache.tags] @@ -657,13 +670,16 @@ size=1048576 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -673,6 +689,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -681,6 +698,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -710,11 +728,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -745,7 +766,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -754,6 +775,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt index 9add0d45b..1162c6d13 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt @@ -655,7 +655,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 5377 # Class of committed instruction system.cpu.commit.bw_lim_events 44 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 22696 # The number of ROB reads system.cpu.rob.rob_writes 16433 # The number of ROB writes system.cpu.timesIdled 211 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini index 91da4c557..af3e16c1f 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic-dummychecker/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -122,6 +123,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.dtb [system.cpu.checker.dstage2_mmu.stage2_tlb] @@ -183,6 +185,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.checker.istage2_mmu] @@ -190,6 +193,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.checker.itb [system.cpu.checker.istage2_mmu.stage2_tlb] @@ -233,6 +237,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -250,7 +255,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.membus.slave[6] [system.cpu.dtb] type=ArmTLB @@ -300,6 +304,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -307,6 +312,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -324,7 +330,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.membus.slave[5] [system.cpu.itb] type=ArmTLB @@ -351,6 +356,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -359,6 +365,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -388,13 +395,16 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port -slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.physmem] type=SimpleMemory diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini index 2e24c6545..8f14d69f7 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -87,6 +88,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -104,7 +106,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.membus.slave[6] [system.cpu.dtb] type=ArmTLB @@ -154,6 +155,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -161,6 +163,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -178,7 +181,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.membus.slave[5] [system.cpu.itb] type=ArmTLB @@ -205,6 +207,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -213,6 +216,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -242,13 +246,16 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port -slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.physmem] type=SimpleMemory diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini index 54668155a..5fb17fcaa 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -84,6 +85,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -118,6 +120,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb +sys=system tlb=system.cpu.dtb [system.cpu.dstage2_mmu.stage2_tlb] @@ -135,7 +138,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[5] [system.cpu.dtb] type=ArmTLB @@ -160,6 +162,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -220,6 +223,7 @@ id_mmfr3=34611729 id_pfr0=49 id_pfr1=4113 midr=1091551472 +pmu=Null system=system [system.cpu.istage2_mmu] @@ -227,6 +231,7 @@ type=ArmStage2MMU children=stage2_tlb eventq_index=0 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb +sys=system tlb=system.cpu.itb [system.cpu.istage2_mmu.stage2_tlb] @@ -244,7 +249,6 @@ eventq_index=0 is_stage2=true num_squash_per_cycle=2 sys=system -port=system.cpu.toL2Bus.slave[4] [system.cpu.itb] type=ArmTLB @@ -269,6 +273,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -302,13 +307,16 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side -slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port [system.cpu.tracer] type=ExeTracer @@ -318,6 +326,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -326,6 +335,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -355,11 +365,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini index 946ab8388..e8f178a23 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -155,6 +156,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -502,6 +504,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -553,6 +556,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -586,8 +590,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -602,6 +609,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -610,6 +618,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -639,11 +648,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -674,7 +686,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -683,6 +695,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt index f65d4ed09..74a03945e 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt @@ -555,7 +555,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 5623 # Class of committed instruction system.cpu.commit.bw_lim_events 103 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 23990 # The number of ROB reads system.cpu.rob.rob_writes 21831 # The number of ROB writes system.cpu.timesIdled 267 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini index 4e242dacc..3d063a0b8 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -109,6 +110,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -117,6 +119,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -146,11 +149,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.icache_port system.cpu.dcache_port diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini index 8604f5de4..68740c2e9 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -113,6 +114,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -121,6 +123,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -165,7 +168,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -218,6 +221,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -307,7 +311,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.cacheMemory deadlock_threshold=500000 @@ -411,7 +414,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini index e0e01d26c..01cbbe08b 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -82,6 +83,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -122,6 +124,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -173,6 +176,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -206,8 +210,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -222,6 +229,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -230,6 +238,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/mips/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -259,11 +268,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini index 709f4f73b..e1985510b 100644 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -156,6 +157,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -503,6 +505,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -551,6 +554,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -584,8 +588,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -600,6 +607,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -608,6 +616,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/power/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -637,11 +646,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -672,7 +684,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -681,6 +693,7 @@ clk_domain=system.clk_domain conf_table_reported=true device_bus_width=8 device_rowbuffer_size=1024 +device_size=536870912 devices_per_rank=8 dll=true eventq_index=0 diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt index c9ca56107..5e6b95b13 100644 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt @@ -556,7 +556,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 5792 # Class of committed instruction system.cpu.commit.bw_lim_events 110 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 22278 # The number of ROB reads system.cpu.rob.rob_writes 21482 # The number of ROB writes system.cpu.timesIdled 230 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini index 00428c3e1..3bfe108d2 100644 --- a/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -107,6 +108,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -115,6 +117,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/power/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -144,11 +147,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.icache_port system.cpu.dcache_port diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini index 10cf57bb4..4603bc218 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -106,6 +107,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -114,6 +116,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/sparc/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -143,11 +146,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.icache_port system.cpu.dcache_port diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini index 8d6cf097f..2cde94243 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -110,6 +111,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -118,6 +120,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/sparc/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -162,7 +165,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -215,6 +218,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -304,7 +308,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.cacheMemory deadlock_threshold=500000 @@ -408,7 +411,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini index e38847653..60f2b3295 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -82,6 +83,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -122,6 +124,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 @@ -170,6 +173,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 @@ -203,8 +207,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -219,6 +226,7 @@ eventq_index=0 type=LiveProcess cmd=hello cwd= +drivers= egid=100 env= errout=cerr @@ -227,6 +235,7 @@ eventq_index=0 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/sparc/linux/hello gid=100 input=cin +kvmInSE=false max_stack_size=67108864 output=cout pid=100 @@ -256,11 +265,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini index 64e1a1f99..3a8953fb2 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -620,8 +621,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -675,11 +679,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master @@ -710,7 +717,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt index 8ea066b3b..7e789d2c1 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt @@ -536,7 +536,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 9747 # Class of committed instruction system.cpu.commit.bw_lim_events 259 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 43058 # The number of ROB reads system.cpu.rob.rob_writes 44876 # The number of ROB writes system.cpu.timesIdled 157 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini index 9ee52b54f..938ee4ed9 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -179,11 +180,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini index 9bc617783..5d12ba5c2 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:268435455 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -198,7 +199,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -251,6 +252,7 @@ port=system.ruby.dir_cntrl0.memory [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -340,7 +342,6 @@ tagArrayBanks=1 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu.clk_domain dcache=system.ruby.l1_cntrl0.cacheMemory deadlock_threshold=500000 @@ -445,7 +446,6 @@ virt_nets=10 [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini index 916d9b36b..001f21930 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -240,8 +241,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -295,11 +299,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master |