diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
| commit | b63631536d974f31cf99ee280271dc0f7b4c746f (patch) | |
| tree | ff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/quick/se/00.hello/ref | |
| parent | 646c4a23ca44aab5468c896034288151c89be782 (diff) | |
| download | gem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz | |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.
The main reason for bundling them up is to minimise the changeset
size.
Diffstat (limited to 'tests/quick/se/00.hello/ref')
16 files changed, 712 insertions, 706 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt index 9728f1e09..dde2aed4b 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000025 # Nu sim_ticks 25046000 # Number of ticks simulated final_tick 25046000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 25238 # Simulator instruction rate (inst/s) -host_op_rate 25236 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 98905790 # Simulator tick rate (ticks/s) -host_mem_usage 225424 # Number of bytes of host memory used -host_seconds 0.25 # Real time elapsed on the host +host_inst_rate 22373 # Simulator instruction rate (inst/s) +host_op_rate 22372 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 87684145 # Simulator tick rate (ticks/s) +host_mem_usage 225308 # Number of bytes of host memory used +host_seconds 0.29 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 19200 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 766589475 # In system.physmem.bw_total::cpu.inst 766589475 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 429290106 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1195879582 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 469 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 469 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 469 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 469 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 29952 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 29952 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 65 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 29 # Track reads on a per bank basis @@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq 396 # Tr system.membus.trans_dist::ReadResp 395 # Transaction distribution system.membus.trans_dist::ReadExReq 73 # Transaction distribution system.membus.trans_dist::ReadExResp 73 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 937 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 937 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 29952 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 29952 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 937 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 937 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 29952 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 29952 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 29952 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 559000 # Layer occupancy (ticks) @@ -307,15 +308,15 @@ system.cpu.stage3.utilization 2.663047 # Pe system.cpu.stage4.idleCycles 45635 # Number of cycles 0 instructions are processed. system.cpu.stage4.runCycles 4458 # Number of cycles 1+ instructions are processed. system.cpu.stage4.utilization 8.899447 # Percentage of cycles stage was utilized (processing insts). -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 141.294375 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 560 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 301 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 1.860465 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 141.294375 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.068991 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.068991 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 141.294375 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 560 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 301 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 1.860465 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 141.294375 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.068991 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.068991 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 560 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 560 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 560 # number of demand (read+write) hits @@ -396,12 +397,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 397 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 396 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 603 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 336 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 939 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 19264 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 10752 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 30016 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 603 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 336 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 939 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 19264 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10752 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 30016 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 30016 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 235000 # Layer occupancy (ticks) @@ -410,17 +411,17 @@ system.cpu.toL2Bus.respLayer0.occupancy 512750 # La system.cpu.toL2Bus.respLayer0.utilization 2.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 278750 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%) -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 197.784355 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 395 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.002532 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 141.343624 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 56.440731 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 197.784355 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 395 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.002532 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 141.343624 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 56.440731 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004313 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001722 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.006036 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.006036 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits @@ -535,15 +536,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 55479.235880 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 58120.535714 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56425.373134 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 103.103023 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1601 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 9.529762 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 103.103023 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.025172 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.025172 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 103.103023 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1601 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 9.529762 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 103.103023 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.025172 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.025172 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1086 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1086 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 515 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt index 38483afa5..60f469d0d 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000021 # Nu sim_ticks 20671000 # Number of ticks simulated final_tick 20671000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 25591 # Simulator instruction rate (inst/s) -host_op_rate 25589 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 83008053 # Simulator tick rate (ticks/s) -host_mem_usage 227468 # Number of bytes of host memory used -host_seconds 0.25 # Real time elapsed on the host +host_inst_rate 24570 # Simulator instruction rate (inst/s) +host_op_rate 24568 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 79697022 # Simulator tick rate (ticks/s) +host_mem_usage 227340 # Number of bytes of host memory used +host_seconds 0.26 # Real time elapsed on the host sim_insts 6372 # Number of instructions simulated sim_ops 6372 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 20032 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 969087127 # In system.physmem.bw_total::cpu.inst 969087127 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 538725751 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1507812878 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 488 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 488 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 488 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 488 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 31168 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 31168 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 69 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 34 # Track reads on a per bank basis @@ -194,10 +195,10 @@ system.membus.trans_dist::ReadReq 415 # Tr system.membus.trans_dist::ReadResp 414 # Transaction distribution system.membus.trans_dist::ReadExReq 73 # Transaction distribution system.membus.trans_dist::ReadExResp 73 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 975 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 975 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 31168 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 31168 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 975 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 975 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 31168 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 31168 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 31168 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 619500 # Layer occupancy (ticks) @@ -511,12 +512,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 416 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 415 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 629 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 348 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 977 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 20096 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 11136 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 31232 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 629 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 348 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 977 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 20096 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 11136 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 31232 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 31232 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 244500 # Layer occupancy (ticks) @@ -525,15 +526,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 531250 # La system.cpu.toL2Bus.respLayer0.utilization 2.6 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 281250 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%) -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 159.268512 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1898 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 314 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 6.044586 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 159.268512 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.077768 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.077768 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 159.268512 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1898 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 314 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 6.044586 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 159.268512 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.077768 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.077768 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1898 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1898 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1898 # number of demand (read+write) hits @@ -609,17 +610,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 67819.841270 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 67819.841270 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 67819.841270 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 218.982908 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 414 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.002415 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 159.353389 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 59.629519 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 218.982908 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 414 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.002415 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 159.353389 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 59.629519 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004863 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001820 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.006683 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.006683 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits @@ -734,15 +735,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54395.700637 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 62693.965517 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 57354.508197 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 106.762654 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 2236 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 174 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 12.850575 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 106.762654 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.026065 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.026065 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 106.762654 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 2236 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 174 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 12.850575 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 106.762654 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.026065 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.026065 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1730 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1730 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 506 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt index 2ce4c669d..6038d0a3c 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000033 # Nu sim_ticks 32544000 # Number of ticks simulated final_tick 32544000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 19861 # Simulator instruction rate (inst/s) -host_op_rate 19860 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 101141711 # Simulator tick rate (ticks/s) -host_mem_usage 224276 # Number of bytes of host memory used -host_seconds 0.32 # Real time elapsed on the host +host_inst_rate 27670 # Simulator instruction rate (inst/s) +host_op_rate 27667 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 140894748 # Simulator tick rate (ticks/s) +host_mem_usage 224272 # Number of bytes of host memory used +host_seconds 0.23 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17792 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 373 # Tr system.membus.trans_dist::ReadResp 373 # Transaction distribution system.membus.trans_dist::ReadExReq 73 # Transaction distribution system.membus.trans_dist::ReadExResp 73 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 892 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 892 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 28544 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 28544 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 892 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 892 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28544 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 28544 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 28544 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 446000 # Layer occupancy (ticks) @@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 65088 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 127.998991 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 6122 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 279 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 21.942652 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 127.998991 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.062500 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.062500 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 127.998991 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 6122 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 279 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 21.942652 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 127.998991 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.062500 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.062500 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 6122 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 6122 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 6122 # number of demand (read+write) hits @@ -175,17 +175,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 52849.462366 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52849.462366 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 52849.462366 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 184.497210 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 373 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.002681 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 128.017765 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 56.479444 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 184.497210 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 373 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.002681 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 128.017765 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 56.479444 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003907 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001724 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.005630 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.005630 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits @@ -300,15 +300,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 103.762109 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1880 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 11.190476 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 103.762109 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.025333 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.025333 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 103.762109 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1880 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 168 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 11.190476 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 103.762109 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.025333 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.025333 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1088 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1088 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 792 # number of WriteReq hits @@ -403,12 +403,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 374 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 374 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 73 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 73 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 558 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 336 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 894 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 17856 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 10752 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 28608 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 558 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 336 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 894 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 17856 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 10752 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 28608 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 28608 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 223500 # Layer occupancy (ticks) diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt index 07e82d1ad..746096984 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000012 # Nu sim_ticks 11933500 # Number of ticks simulated final_tick 11933500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 492 # Simulator instruction rate (inst/s) -host_op_rate 492 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2461163 # Simulator tick rate (ticks/s) -host_mem_usage 226156 # Number of bytes of host memory used -host_seconds 4.85 # Real time elapsed on the host +host_inst_rate 64 # Simulator instruction rate (inst/s) +host_op_rate 64 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 321705 # Simulator tick rate (ticks/s) +host_mem_usage 226036 # Number of bytes of host memory used +host_seconds 37.09 # Real time elapsed on the host sim_insts 2387 # Number of instructions simulated sim_ops 2387 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 12032 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1008254075 # In system.physmem.bw_total::cpu.inst 1008254075 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 455859555 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1464113630 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 273 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 273 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 273 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 273 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 17472 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 17472 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 1 # Track reads on a per bank basis @@ -190,10 +191,10 @@ system.membus.trans_dist::ReadReq 249 # Tr system.membus.trans_dist::ReadResp 249 # Transaction distribution system.membus.trans_dist::ReadExReq 24 # Transaction distribution system.membus.trans_dist::ReadExResp 24 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 546 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 546 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 17472 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 17472 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 546 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 546 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17472 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 17472 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 17472 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 344000 # Layer occupancy (ticks) @@ -507,12 +508,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 249 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 249 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 24 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 24 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 376 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 170 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 546 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 12032 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 5440 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 17472 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 376 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 170 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 546 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 12032 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5440 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 17472 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 17472 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 136500 # Layer occupancy (ticks) @@ -521,15 +522,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 318000 # La system.cpu.toL2Bus.respLayer0.utilization 2.7 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 135500 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%) -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 91.523450 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 816 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 188 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 4.340426 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 91.523450 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.044689 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.044689 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 91.523450 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 816 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 188 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 4.340426 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 91.523450 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.044689 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.044689 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 816 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 816 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 816 # number of demand (read+write) hits @@ -605,17 +606,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 68062.494681 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 68062.494681 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 68062.494681 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 119.912589 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 249 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 91.722261 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 28.190328 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 119.912589 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 249 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 91.722261 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 28.190328 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.002799 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000860 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.003659 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.003659 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_misses::cpu.inst 188 # number of ReadReq misses system.cpu.l2cache.ReadReq_misses::cpu.data 61 # number of ReadReq misses system.cpu.l2cache.ReadReq_misses::total 249 # number of ReadReq misses @@ -724,15 +725,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54438.829787 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 61447.058824 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56620.879121 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 44.879167 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 758 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 85 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 8.917647 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 44.879167 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.010957 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.010957 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 44.879167 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 758 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 85 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 8.917647 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 44.879167 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.010957 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.010957 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 545 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 545 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 213 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt index 034aea3e9..0eefef01d 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000017 # Nu sim_ticks 16524000 # Number of ticks simulated final_tick 16524000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 252355 # Simulator instruction rate (inst/s) -host_op_rate 251860 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1611932908 # Simulator tick rate (ticks/s) -host_mem_usage 223992 # Number of bytes of host memory used -host_seconds 0.01 # Real time elapsed on the host +host_inst_rate 70 # Simulator instruction rate (inst/s) +host_op_rate 70 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 446596 # Simulator tick rate (ticks/s) +host_mem_usage 222964 # Number of bytes of host memory used +host_seconds 37.00 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 10432 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 218 # Tr system.membus.trans_dist::ReadResp 218 # Transaction distribution system.membus.trans_dist::ReadExReq 27 # Transaction distribution system.membus.trans_dist::ReadExResp 27 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 490 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 490 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15680 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 15680 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 490 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 490 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15680 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 15680 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 15680 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 245000 # Layer occupancy (ticks) @@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 33048 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 80.050296 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 163 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 14.865031 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 80.050296 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.039087 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.039087 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 80.050296 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 163 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 14.865031 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 80.050296 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.039087 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.039087 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 2423 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 2423 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 2423 # number of demand (read+write) hits @@ -175,17 +175,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 53000 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 53000 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 107.162861 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 218 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 80.168669 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 26.994192 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 107.162861 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 218 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 80.168669 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 26.994192 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.002447 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000824 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.003270 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.003270 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_misses::cpu.inst 163 # number of ReadReq misses system.cpu.l2cache.ReadReq_misses::cpu.data 55 # number of ReadReq misses system.cpu.l2cache.ReadReq_misses::total 218 # number of ReadReq misses @@ -294,15 +294,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 47.437790 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 627 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 82 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 7.646341 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 47.437790 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.011581 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.011581 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 47.437790 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 627 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 82 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 7.646341 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 47.437790 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.011581 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.011581 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 360 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 360 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 267 # number of WriteReq hits @@ -397,12 +397,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 218 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 218 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 27 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 27 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 326 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 164 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 490 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 10432 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 5248 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 15680 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 326 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 164 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 490 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 10432 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5248 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 15680 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 15680 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 122500 # Layer occupancy (ticks) diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt index 22dbcae6d..81f115ce9 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000016 # Nu sim_ticks 16494000 # Number of ticks simulated final_tick 16494000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 31208 # Simulator instruction rate (inst/s) -host_op_rate 38937 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 112083077 # Simulator tick rate (ticks/s) -host_mem_usage 244336 # Number of bytes of host memory used -host_seconds 0.15 # Real time elapsed on the host +host_inst_rate 32065 # Simulator instruction rate (inst/s) +host_op_rate 40006 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 115159682 # Simulator tick rate (ticks/s) +host_mem_usage 240696 # Number of bytes of host memory used +host_seconds 0.14 # Real time elapsed on the host sim_insts 4591 # Number of instructions simulated sim_ops 5729 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17344 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1051533891 # In system.physmem.bw_total::cpu.inst 1051533891 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 473384261 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1524918152 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 393 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 393 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 393 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 393 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 25152 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 25152 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 86 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 46 # Track reads on a per bank basis @@ -194,10 +195,10 @@ system.membus.trans_dist::ReadReq 352 # Tr system.membus.trans_dist::ReadResp 352 # Transaction distribution system.membus.trans_dist::ReadExReq 41 # Transaction distribution system.membus.trans_dist::ReadExResp 41 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 786 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 786 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 25152 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 25152 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 786 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 786 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 25152 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 25152 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 25152 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 487500 # Layer occupancy (ticks) @@ -563,12 +564,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 397 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 396 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 41 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 41 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 582 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 293 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 875 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 18624 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 9344 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 27968 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 582 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 293 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 875 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 18624 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9344 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 27968 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 27968 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 219000 # Layer occupancy (ticks) @@ -577,15 +578,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 485250 # La system.cpu.toL2Bus.respLayer0.utilization 2.9 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 231495 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%) -system.cpu.icache.tags.replacements 4 # number of replacements -system.cpu.icache.tags.tagsinuse 145.483199 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1583 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 291 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 5.439863 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 145.483199 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.071037 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.071037 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 4 # number of replacements +system.cpu.icache.tags.tagsinuse 145.483199 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1583 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 291 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 5.439863 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 145.483199 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.071037 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.071037 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1583 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1583 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1583 # number of demand (read+write) hits @@ -661,17 +662,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 64263.745704 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 64263.745704 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 64263.745704 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 183.328645 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 40 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 352 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.113636 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 136.957008 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 46.371637 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 183.328645 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 40 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 352 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.113636 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 136.957008 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 46.371637 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004180 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001415 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.005595 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.005595 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 20 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 20 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 40 # number of ReadReq hits @@ -795,15 +796,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54591.328413 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 60643.442623 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56470.101781 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 85.893510 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 2390 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 146 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 16.369863 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 85.893510 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.020970 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.020970 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 85.893510 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 2390 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 146 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 16.369863 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 85.893510 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.020970 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.020970 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1763 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1763 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 606 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt index 3ccfc050f..ace16d792 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000016 # Nu sim_ticks 16494000 # Number of ticks simulated final_tick 16494000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 66928 # Simulator instruction rate (inst/s) -host_op_rate 83502 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 240363471 # Simulator tick rate (ticks/s) -host_mem_usage 244336 # Number of bytes of host memory used -host_seconds 0.07 # Real time elapsed on the host +host_inst_rate 36590 # Simulator instruction rate (inst/s) +host_op_rate 45651 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 131406771 # Simulator tick rate (ticks/s) +host_mem_usage 240696 # Number of bytes of host memory used +host_seconds 0.13 # Real time elapsed on the host sim_insts 4591 # Number of instructions simulated sim_ops 5729 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17344 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1051533891 # In system.physmem.bw_total::cpu.inst 1051533891 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 473384261 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1524918152 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 393 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 393 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 393 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 393 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 25152 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 25152 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 86 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 46 # Track reads on a per bank basis @@ -194,10 +195,10 @@ system.membus.trans_dist::ReadReq 352 # Tr system.membus.trans_dist::ReadResp 352 # Transaction distribution system.membus.trans_dist::ReadExReq 41 # Transaction distribution system.membus.trans_dist::ReadExResp 41 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 786 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 786 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 25152 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 25152 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 786 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 786 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 25152 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 25152 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 25152 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 487500 # Layer occupancy (ticks) @@ -518,12 +519,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 397 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 396 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 41 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 41 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 582 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 293 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 875 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 18624 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 9344 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 27968 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 582 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 293 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 875 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 18624 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9344 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 27968 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 27968 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 219000 # Layer occupancy (ticks) @@ -532,15 +533,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 485250 # La system.cpu.toL2Bus.respLayer0.utilization 2.9 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 231495 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.4 # Layer utilization (%) -system.cpu.icache.tags.replacements 4 # number of replacements -system.cpu.icache.tags.tagsinuse 145.483199 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1583 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 291 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 5.439863 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 145.483199 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.071037 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.071037 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 4 # number of replacements +system.cpu.icache.tags.tagsinuse 145.483199 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1583 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 291 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 5.439863 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 145.483199 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.071037 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.071037 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1583 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1583 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1583 # number of demand (read+write) hits @@ -616,17 +617,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 64263.745704 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 64263.745704 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 64263.745704 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 183.328645 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 40 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 352 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.113636 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 136.957008 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 46.371637 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 183.328645 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 40 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 352 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.113636 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 136.957008 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 46.371637 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004180 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001415 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.005595 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.005595 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 20 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 20 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 40 # number of ReadReq hits @@ -750,15 +751,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54591.328413 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 60643.442623 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56470.101781 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 85.893510 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 2390 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 146 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 16.369863 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 85.893510 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.020970 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.020970 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 85.893510 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 2390 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 146 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 16.369863 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 85.893510 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.020970 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.020970 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1763 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1763 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 606 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt index 7a58b161f..13e2763d6 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt @@ -4,10 +4,10 @@ sim_seconds 0.000026 # Nu sim_ticks 25969000 # Number of ticks simulated final_tick 25969000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 220478 # Simulator instruction rate (inst/s) -host_op_rate 273604 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1251201624 # Simulator tick rate (ticks/s) -host_mem_usage 241012 # Number of bytes of host memory used +host_inst_rate 229244 # Simulator instruction rate (inst/s) +host_op_rate 284503 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1301168988 # Simulator tick rate (ticks/s) +host_mem_usage 238660 # Number of bytes of host memory used host_seconds 0.02 # Real time elapsed on the host sim_insts 4565 # Number of instructions simulated sim_ops 5672 # Number of ops (including micro ops) simulated @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 307 # Tr system.membus.trans_dist::ReadResp 307 # Transaction distribution system.membus.trans_dist::ReadExReq 43 # Transaction distribution system.membus.trans_dist::ReadExResp 43 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 700 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 700 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 22400 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 22400 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 700 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 700 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 22400 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 22400 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 22400 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 350000 # Layer occupancy (ticks) @@ -107,15 +107,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 51938 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 1 # number of replacements -system.cpu.icache.tags.tagsinuse 114.614391 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 4364 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 241 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 18.107884 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 114.614391 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.055964 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.055964 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 1 # number of replacements +system.cpu.icache.tags.tagsinuse 114.614391 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 4364 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 241 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 18.107884 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 114.614391 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.055964 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.055964 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 4364 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 4364 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 4364 # number of demand (read+write) hits @@ -185,17 +185,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 50211.618257 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 50211.618257 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 50211.618257 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 154.071129 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 32 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 307 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.104235 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 105.889758 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 48.181371 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 154.071129 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 32 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 307 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.104235 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 105.889758 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 48.181371 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003231 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001470 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.004702 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.004702 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 16 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 16 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 32 # number of ReadReq hits @@ -313,15 +313,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 83.000387 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1940 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 141 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 13.758865 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 83.000387 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.020264 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.020264 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 83.000387 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1940 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 141 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 13.758865 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 83.000387 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.020264 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.020264 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1048 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1048 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 870 # number of WriteReq hits @@ -424,12 +424,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 339 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 339 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 43 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 43 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 482 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 282 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 764 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 15424 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 9024 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 24448 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 482 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 282 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 764 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 15424 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9024 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 24448 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 24448 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 191000 # Layer occupancy (ticks) diff --git a/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt index b2a150376..aeb0e2e25 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000025 # Nu sim_ticks 24587000 # Number of ticks simulated final_tick 24587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 41260 # Simulator instruction rate (inst/s) -host_op_rate 41253 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 174426700 # Simulator tick rate (ticks/s) -host_mem_usage 226212 # Number of bytes of host memory used -host_seconds 0.14 # Real time elapsed on the host +host_inst_rate 52979 # Simulator instruction rate (inst/s) +host_op_rate 52966 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 223940501 # Simulator tick rate (ticks/s) +host_mem_usage 224928 # Number of bytes of host memory used +host_seconds 0.11 # Real time elapsed on the host sim_insts 5814 # Number of instructions simulated sim_ops 5814 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 20288 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 825151503 # In system.physmem.bw_total::cpu.inst 825151503 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 359214219 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1184365722 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 455 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 455 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 455 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 455 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 29120 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 29120 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 28 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis @@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq 404 # Tr system.membus.trans_dist::ReadResp 404 # Transaction distribution system.membus.trans_dist::ReadExReq 51 # Transaction distribution system.membus.trans_dist::ReadExResp 51 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 910 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 910 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 29120 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 29120 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 910 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 910 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 29120 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 29120 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 29120 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 551500 # Layer occupancy (ticks) @@ -293,15 +294,15 @@ system.cpu.stage3.utilization 2.517539 # Pe system.cpu.stage4.idleCycles 46285 # Number of cycles 0 instructions are processed. system.cpu.stage4.runCycles 2890 # Number of cycles 1+ instructions are processed. system.cpu.stage4.utilization 5.876970 # Percentage of cycles stage was utilized (processing insts). -system.cpu.icache.tags.replacements 13 # number of replacements -system.cpu.icache.tags.tagsinuse 150.350232 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 428 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 319 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 1.341693 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 150.350232 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.073413 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.073413 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 13 # number of replacements +system.cpu.icache.tags.tagsinuse 150.350232 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 428 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 319 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 1.341693 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 150.350232 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.073413 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.073413 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 428 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 428 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 428 # number of demand (read+write) hits @@ -382,12 +383,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 406 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 406 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 51 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 51 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 638 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 276 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 914 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 20416 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8832 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 29248 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 638 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 276 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 914 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 20416 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8832 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 29248 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 29248 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 228500 # Layer occupancy (ticks) @@ -396,17 +397,17 @@ system.cpu.toL2Bus.respLayer0.occupancy 543000 # La system.cpu.toL2Bus.respLayer0.utilization 2.2 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 228000 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%) -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 208.008874 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 404 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.004950 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 152.043119 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 55.965756 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 208.008874 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 404 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.004950 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 152.043119 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 55.965756 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004640 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001708 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.006348 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.006348 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 2 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 2 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 2 # number of demand (read+write) hits @@ -521,15 +522,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 57861.198738 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 62804.347826 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 59360.439560 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 89.984709 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1638 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 11.869565 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 89.984709 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.021969 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.021969 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 89.984709 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1638 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 11.869565 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 89.984709 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.021969 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.021969 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1066 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1066 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 572 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt index 6a930873f..f0a85d261 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000022 # Nu sim_ticks 21805500 # Number of ticks simulated final_tick 21805500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 79844 # Simulator instruction rate (inst/s) -host_op_rate 79828 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 337538221 # Simulator tick rate (ticks/s) -host_mem_usage 228256 # Number of bytes of host memory used -host_seconds 0.06 # Real time elapsed on the host +host_inst_rate 44396 # Simulator instruction rate (inst/s) +host_op_rate 44386 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 187676879 # Simulator tick rate (ticks/s) +host_mem_usage 228012 # Number of bytes of host memory used +host_seconds 0.12 # Real time elapsed on the host sim_insts 5156 # Number of instructions simulated sim_ops 5156 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 21440 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 983238174 # In system.physmem.bw_total::cpu.inst 983238174 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 416775584 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1400013758 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 477 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 477 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 477 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 477 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 30528 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 30528 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 30 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis @@ -194,10 +195,10 @@ system.membus.trans_dist::ReadReq 426 # Tr system.membus.trans_dist::ReadResp 426 # Transaction distribution system.membus.trans_dist::ReadExReq 51 # Transaction distribution system.membus.trans_dist::ReadExResp 51 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 954 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 954 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 30528 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 30528 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 954 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 954 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 30528 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 30528 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 30528 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 605000 # Layer occupancy (ticks) @@ -495,12 +496,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 429 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 429 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 51 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 51 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 676 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 284 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 960 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 21632 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 9088 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 30720 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 676 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 284 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 960 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 21632 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9088 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 30720 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 30720 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 240000 # Layer occupancy (ticks) @@ -509,15 +510,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 573500 # La system.cpu.toL2Bus.respLayer0.utilization 2.6 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 230000 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%) -system.cpu.icache.tags.replacements 17 # number of replacements -system.cpu.icache.tags.tagsinuse 160.845390 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1531 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 338 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 4.529586 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 160.845390 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.078538 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.078538 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 17 # number of replacements +system.cpu.icache.tags.tagsinuse 160.845390 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1531 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 338 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 4.529586 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 160.845390 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.078538 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.078538 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1531 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1531 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1531 # number of demand (read+write) hits @@ -593,17 +594,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 70585.798817 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 70585.798817 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 70585.798817 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 220.792115 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 426 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.007042 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 163.133804 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 57.658310 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 220.792115 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 426 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.007042 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 163.133804 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 57.658310 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004978 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001760 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.006738 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.006738 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 3 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 3 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 3 # number of demand (read+write) hits @@ -718,15 +719,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 57459.701493 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64862.676056 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 59663.522013 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 91.308892 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 2395 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 142 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 16.866197 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 91.308892 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.022292 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.022292 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 91.308892 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 2395 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 142 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 16.866197 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 91.308892 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.022292 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.022292 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1832 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1832 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 563 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt index bfb8470a6..d3256ea4d 100644 --- a/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000032 # Nu sim_ticks 31633000 # Number of ticks simulated final_tick 31633000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 482351 # Simulator instruction rate (inst/s) -host_op_rate 481309 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2613274672 # Simulator tick rate (ticks/s) -host_mem_usage 225064 # Number of bytes of host memory used -host_seconds 0.01 # Real time elapsed on the host +host_inst_rate 304637 # Simulator instruction rate (inst/s) +host_op_rate 304230 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1653175117 # Simulator tick rate (ticks/s) +host_mem_usage 224940 # Number of bytes of host memory used +host_seconds 0.02 # Real time elapsed on the host sim_insts 5814 # Number of instructions simulated sim_ops 5814 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 19264 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 388 # Tr system.membus.trans_dist::ReadResp 388 # Transaction distribution system.membus.trans_dist::ReadExReq 51 # Transaction distribution system.membus.trans_dist::ReadExResp 51 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 878 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 878 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 28096 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 28096 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 878 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 878 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28096 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 28096 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 28096 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 439000 # Layer occupancy (ticks) @@ -83,15 +83,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 63266 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 13 # number of replacements -system.cpu.icache.tags.tagsinuse 132.545353 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 5513 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 303 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 18.194719 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 132.545353 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.064719 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.064719 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 13 # number of replacements +system.cpu.icache.tags.tagsinuse 132.545353 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 5513 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 303 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 18.194719 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 132.545353 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.064719 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.064719 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 5513 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 5513 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 5513 # number of demand (read+write) hits @@ -161,17 +161,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 52722.772277 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52722.772277 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 52722.772277 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 188.114191 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 388 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.005155 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 133.890657 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 54.223533 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 188.114191 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 388 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.005155 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 133.890657 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 54.223533 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004086 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.001655 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.005741 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.005741 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 2 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 2 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 2 # number of demand (read+write) hits @@ -286,15 +286,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 87.492114 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1950 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 14.130435 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 87.492114 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.021360 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.021360 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 87.492114 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1950 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 138 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 14.130435 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 87.492114 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.021360 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.021360 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1076 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1076 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 874 # number of WriteReq hits @@ -389,12 +389,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 390 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 390 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 51 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 51 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 606 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 276 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 882 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 19392 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8832 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 28224 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 606 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 276 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 882 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 19392 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8832 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 28224 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 28224 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 220500 # Layer occupancy (ticks) diff --git a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt index 50311c18c..9bd3a3844 100644 --- a/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000018 # Nu sim_ticks 18469500 # Number of ticks simulated final_tick 18469500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 54927 # Simulator instruction rate (inst/s) -host_op_rate 54916 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 175080000 # Simulator tick rate (ticks/s) -host_mem_usage 224296 # Number of bytes of host memory used -host_seconds 0.11 # Real time elapsed on the host +host_inst_rate 100626 # Simulator instruction rate (inst/s) +host_op_rate 100602 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 320728752 # Simulator tick rate (ticks/s) +host_mem_usage 223260 # Number of bytes of host memory used +host_seconds 0.06 # Real time elapsed on the host sim_insts 5792 # Number of instructions simulated sim_ops 5792 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 22080 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 1195484447 # In system.physmem.bw_total::cpu.inst 1195484447 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 349982403 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1545466851 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 446 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 446 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 446 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 446 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 28544 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 28544 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 70 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 42 # Track reads on a per bank basis @@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq 399 # Tr system.membus.trans_dist::ReadResp 399 # Transaction distribution system.membus.trans_dist::ReadExReq 47 # Transaction distribution system.membus.trans_dist::ReadExResp 47 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 892 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 892 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 28544 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 28544 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 892 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 892 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 28544 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 28544 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 28544 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 565000 # Layer occupancy (ticks) @@ -493,12 +494,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 406 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 406 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 47 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 47 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 702 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 204 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 906 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 22464 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 6528 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 28992 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 702 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 204 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 906 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 22464 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6528 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 28992 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 28992 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 226500 # Layer occupancy (ticks) @@ -507,15 +508,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 590750 # La system.cpu.toL2Bus.respLayer0.utilization 3.2 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 163000 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%) -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 167.253035 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1372 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 351 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 3.908832 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 167.253035 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.081667 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.081667 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 167.253035 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1372 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 351 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 3.908832 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 167.253035 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.081667 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.081667 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1372 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1372 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1372 # number of demand (read+write) hits @@ -591,17 +592,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 66831.196581 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 66831.196581 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 66831.196581 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 197.401673 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 7 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 399 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.017544 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 166.141608 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 31.260065 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 197.401673 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 7 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 399 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.017544 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 166.141608 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 31.260065 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.005070 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000954 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.006024 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.006024 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 6 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 7 # number of ReadReq hits @@ -719,15 +720,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 54186.231884 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64608.910891 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56546.524664 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 63.117277 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 2192 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 102 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 21.490196 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 63.117277 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.015409 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.015409 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 63.117277 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 2192 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 102 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 21.490196 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 63.117277 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.015409 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.015409 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1473 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1473 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 719 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt index 6e991864c..68c96c714 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000021 # Nu sim_ticks 20802500 # Number of ticks simulated final_tick 20802500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 39959 # Simulator instruction rate (inst/s) -host_op_rate 39952 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 155990706 # Simulator tick rate (ticks/s) -host_mem_usage 232536 # Number of bytes of host memory used -host_seconds 0.13 # Real time elapsed on the host +host_inst_rate 86492 # Simulator instruction rate (inst/s) +host_op_rate 86452 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 337526822 # Simulator tick rate (ticks/s) +host_mem_usage 231936 # Number of bytes of host memory used +host_seconds 0.06 # Real time elapsed on the host sim_insts 5327 # Number of instructions simulated sim_ops 5327 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 18496 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 889123903 # In system.physmem.bw_total::cpu.inst 889123903 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 412258142 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1301382045 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 423 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 423 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 423 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 423 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 27072 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 27072 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 24 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 7 # Track reads on a per bank basis @@ -195,10 +196,10 @@ system.membus.trans_dist::ReadReq 342 # Tr system.membus.trans_dist::ReadResp 342 # Transaction distribution system.membus.trans_dist::ReadExReq 81 # Transaction distribution system.membus.trans_dist::ReadExResp 81 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 846 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 846 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 27072 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 27072 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 846 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 846 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 27072 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 27072 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 27072 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 502000 # Layer occupancy (ticks) @@ -275,15 +276,15 @@ system.cpu.stage3.utilization 2.343412 # Pe system.cpu.stage4.idleCycles 38449 # Number of cycles 0 instructions are processed. system.cpu.stage4.runCycles 3157 # Number of cycles 1+ instructions are processed. system.cpu.stage4.utilization 7.587848 # Percentage of cycles stage was utilized (processing insts). -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 142.145699 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 892 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 291 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 3.065292 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 142.145699 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.069407 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.069407 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 142.145699 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 892 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 291 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 3.065292 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 142.145699 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.069407 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.069407 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 892 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 892 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 892 # number of demand (read+write) hits @@ -364,12 +365,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 345 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 345 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 81 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 81 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 582 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 270 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 852 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 18624 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8640 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 27264 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 582 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 270 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 852 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 18624 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8640 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 27264 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 27264 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 213000 # Layer occupancy (ticks) @@ -378,17 +379,17 @@ system.cpu.toL2Bus.respLayer0.occupancy 489750 # La system.cpu.toL2Bus.respLayer0.utilization 2.4 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 219500 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.1 # Layer utilization (%) -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 168.511029 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 342 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.008772 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 141.570095 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 26.940934 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 168.511029 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 342 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.008772 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 141.570095 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 26.940934 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004320 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000822 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.005143 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.005143 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 2 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 3 # number of ReadReq hits @@ -506,15 +507,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 58848.615917 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 59138.059701 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 58940.307329 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 84.821490 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 914 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 135 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 6.770370 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 84.821490 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.020708 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.020708 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 84.821490 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 914 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 135 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 6.770370 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 84.821490 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.020708 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.020708 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 654 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 654 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 260 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt index c4b2117ab..b76f909df 100644 --- a/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt @@ -4,10 +4,10 @@ sim_seconds 0.000028 # Nu sim_ticks 27800000 # Number of ticks simulated final_tick 27800000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 413138 # Simulator instruction rate (inst/s) -host_op_rate 412367 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2148212772 # Simulator tick rate (ticks/s) -host_mem_usage 231400 # Number of bytes of host memory used +host_inst_rate 441877 # Simulator instruction rate (inst/s) +host_op_rate 441389 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2300957264 # Simulator tick rate (ticks/s) +host_mem_usage 230904 # Number of bytes of host memory used host_seconds 0.01 # Real time elapsed on the host sim_insts 5327 # Number of instructions simulated sim_ops 5327 # Number of ops (including micro ops) simulated @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 308 # Tr system.membus.trans_dist::ReadResp 308 # Transaction distribution system.membus.trans_dist::ReadExReq 81 # Transaction distribution system.membus.trans_dist::ReadExResp 81 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 778 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 778 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 24896 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 24896 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 778 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 778 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 24896 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 24896 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 24896 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 389000 # Layer occupancy (ticks) @@ -65,15 +65,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 55600 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 117.043638 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 5114 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 257 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 19.898833 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 117.043638 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.057150 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.057150 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 117.043638 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 5114 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 257 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 19.898833 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 117.043638 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.057150 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.057150 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 5114 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 5114 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 5114 # number of demand (read+write) hits @@ -143,17 +143,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 52673.151751 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52673.151751 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 52673.151751 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 142.183999 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 308 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.009740 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 116.519250 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 25.664749 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 142.183999 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 3 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 308 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.009740 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 116.519250 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 25.664749 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003556 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000783 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.004339 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.004339 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 2 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 3 # number of ReadReq hits @@ -271,15 +271,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 82.118455 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1253 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 135 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 9.281481 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 82.118455 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.020048 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.020048 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 82.118455 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1253 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 135 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 9.281481 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 82.118455 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.020048 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.020048 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 661 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 661 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 592 # number of WriteReq hits @@ -374,12 +374,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 311 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 311 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 81 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 81 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 514 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 270 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 784 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 16448 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8640 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 25088 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 514 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 270 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 784 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 16448 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8640 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 25088 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 25088 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 196000 # Layer occupancy (ticks) diff --git a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt index 7c9257554..cfacb8ad4 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000020 # Nu sim_ticks 19639500 # Number of ticks simulated final_tick 19639500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 28578 # Simulator instruction rate (inst/s) -host_op_rate 51768 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 104294046 # Simulator tick rate (ticks/s) -host_mem_usage 245432 # Number of bytes of host memory used -host_seconds 0.19 # Real time elapsed on the host +host_inst_rate 30549 # Simulator instruction rate (inst/s) +host_op_rate 55338 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 111488682 # Simulator tick rate (ticks/s) +host_mem_usage 243516 # Number of bytes of host memory used +host_seconds 0.18 # Real time elapsed on the host sim_insts 5380 # Number of instructions simulated sim_ops 9747 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 17536 # Number of bytes read from this memory @@ -27,14 +27,15 @@ system.physmem.bw_inst_read::total 892894422 # In system.physmem.bw_total::cpu.inst 892894422 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 462740905 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 1355635327 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 417 # Total number of read requests seen -system.physmem.writeReqs 0 # Total number of write requests seen -system.physmem.cpureqs 417 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 417 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 417 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 26624 # Total number of bytes read from memory system.physmem.bytesWritten 0 # Total number of bytes written to memory system.physmem.bytesConsumedRd 26624 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed system.physmem.perBankRdReqs::0 34 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 1 # Track reads on a per bank basis @@ -195,11 +196,9 @@ system.membus.trans_dist::ReadExReq 77 # Tr system.membus.trans_dist::ReadExResp 77 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 833 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::total 833 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::system.physmem.port 833 # Packet count per connected master and slave (bytes) system.membus.pkt_count::total 833 # Packet count per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 26624 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 26624 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::system.physmem.port 26624 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size::total 26624 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 26624 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) @@ -478,12 +477,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 342 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 341 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 77 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 77 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 550 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 287 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 837 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 17600 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 9152 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 26752 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 550 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 287 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 837 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 17600 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9152 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 26752 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 26752 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 209500 # Layer occupancy (ticks) @@ -492,15 +491,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 463250 # La system.cpu.toL2Bus.respLayer0.utilization 2.4 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 239750 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.2 # Layer utilization (%) -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 130.740950 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1608 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 275 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 5.847273 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 130.740950 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.063838 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.063838 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 130.740950 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1608 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 275 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 5.847273 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 130.740950 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.063838 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.063838 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1608 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1608 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1608 # number of demand (read+write) hits @@ -576,17 +575,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 69288.181818 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 69288.181818 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 69288.181818 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 163.561658 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 339 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.005900 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 130.812999 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 32.748659 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 163.561658 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 2 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 339 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.005900 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 130.812999 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 32.748659 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003992 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000999 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.004992 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.004992 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 2 # number of ReadReq hits @@ -704,15 +703,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 55924.270073 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 61298.951049 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 57767.386091 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 82.722336 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 2341 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 143 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 16.370629 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 82.722336 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.020196 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.020196 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 82.722336 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 2341 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 143 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 16.370629 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 82.722336 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.020196 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.020196 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 1483 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 1483 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 858 # number of WriteReq hits diff --git a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt index f38f31bd7..0aa71b968 100644 --- a/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000028 # Nu sim_ticks 28358000 # Number of ticks simulated final_tick 28358000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 90736 # Simulator instruction rate (inst/s) -host_op_rate 164316 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 477859669 # Simulator tick rate (ticks/s) -host_mem_usage 289160 # Number of bytes of host memory used -host_seconds 0.06 # Real time elapsed on the host +host_inst_rate 186481 # Simulator instruction rate (inst/s) +host_op_rate 337520 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 981039317 # Simulator tick rate (ticks/s) +host_mem_usage 241472 # Number of bytes of host memory used +host_seconds 0.03 # Real time elapsed on the host sim_insts 5381 # Number of instructions simulated sim_ops 9748 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 14528 # Number of bytes read from this memory @@ -34,11 +34,9 @@ system.membus.trans_dist::ReadExReq 79 # Tr system.membus.trans_dist::ReadExResp 79 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 722 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::total 722 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::system.physmem.port 722 # Packet count per connected master and slave (bytes) system.membus.pkt_count::total 722 # Packet count per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 23104 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 23104 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::system.physmem.port 23104 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size::total 23104 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 23104 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) @@ -69,15 +67,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 56716 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 0 # number of replacements -system.cpu.icache.tags.tagsinuse 105.550219 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 6637 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 228 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 29.109649 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 105.550219 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.051538 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.051538 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 0 # number of replacements +system.cpu.icache.tags.tagsinuse 105.550219 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 6637 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 228 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 29.109649 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 105.550219 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.051538 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.051538 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 6637 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 6637 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 6637 # number of demand (read+write) hits @@ -147,17 +145,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 52815.789474 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 52815.789474 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 52815.789474 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 134.034140 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 282 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.003546 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::cpu.inst 105.558330 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 28.475810 # Average occupied blocks per requestor +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 134.034140 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 282 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.003546 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::cpu.inst 105.558330 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 28.475810 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::cpu.inst 0.003221 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.000869 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.004090 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.004090 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 1 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1 # number of ReadReq hits system.cpu.l2cache.demand_hits::cpu.inst 1 # number of demand (read+write) hits @@ -272,15 +270,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 0 # number of replacements -system.cpu.dcache.tags.tagsinuse 80.797237 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 1854 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 134 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 13.835821 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 80.797237 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.019726 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.019726 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 0 # number of replacements +system.cpu.dcache.tags.tagsinuse 80.797237 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 1854 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 134 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 13.835821 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 80.797237 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.019726 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.019726 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 998 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 998 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 856 # number of WriteReq hits @@ -375,12 +373,12 @@ system.cpu.toL2Bus.trans_dist::ReadReq 283 # Tr system.cpu.toL2Bus.trans_dist::ReadResp 283 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 79 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 79 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 456 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 268 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 724 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 14592 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 8576 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 23168 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 456 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 268 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 724 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 14592 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8576 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 23168 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 23168 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 181000 # Layer occupancy (ticks) |