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author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-11-16 05:08:57 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-11-16 05:08:57 -0600 |
commit | de489e1997ee6c37aaf6e876e32622f6c648fe95 (patch) | |
tree | 40d4093453491b007167c971ebbb18c8ae0b77fa /tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini | |
parent | 08cec03f8ec3bc427700343a7bd7d216433f93fc (diff) | |
download | gem5-de489e1997ee6c37aaf6e876e32622f6c648fe95.tar.xz |
stats: updates due to recent chagnesets
Diffstat (limited to 'tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini')
-rw-r--r-- | tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini index 3b7f876e4..cfbc82c8a 100644 --- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini +++ b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing-mt/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges= memories=system.physmem mmap_using_noreserve=false +multi_thread=true num_work_ids=16 readfile= symbolfile= @@ -46,7 +47,7 @@ voltage_domain=system.voltage_domain [system.cpu] type=DerivO3CPU -children=branchPred dcache dtb fuPool icache interrupts isa0 isa1 itb l2cache toL2Bus tracer workload0 workload1 +children=branchPred dcache dtb fuPool icache interrupts0 interrupts1 isa0 isa1 itb l2cache toL2Bus tracer workload0 workload1 LFSTSize=1024 LQEntries=32 LSQCheckLoads=true @@ -87,7 +88,7 @@ iewToCommitDelay=1 iewToDecodeDelay=1 iewToFetchDelay=1 iewToRenameDelay=1 -interrupts=system.cpu.interrupts +interrupts=system.cpu.interrupts0 system.cpu.interrupts1 isa=system.cpu.isa0 system.cpu.isa1 issueToExecuteDelay=1 issueWidth=8 @@ -155,6 +156,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -171,6 +173,7 @@ system=system tags=system.cpu.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] @@ -502,6 +505,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -518,6 +522,7 @@ system=system tags=system.cpu.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=true cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] @@ -531,7 +536,11 @@ hit_latency=2 sequential_access=false size=131072 -[system.cpu.interrupts] +[system.cpu.interrupts0] +type=AlphaInterrupts +eventq_index=0 + +[system.cpu.interrupts1] type=AlphaInterrupts eventq_index=0 @@ -556,6 +565,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -572,6 +582,7 @@ system=system tags=system.cpu.l2cache.tags tgts_per_mshr=12 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] @@ -587,12 +598,13 @@ size=2097152 [system.cpu.toL2Bus] type=CoherentXBar +children=snoop_filter clk_domain=system.cpu_clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 response_latency=1 -snoop_filter=Null +snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false @@ -600,6 +612,13 @@ width=32 master=system.cpu.l2cache.cpu_side slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side +[system.cpu.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + [system.cpu.tracer] type=ExeTracer eventq_index=0 |