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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-06 21:57:10 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-06 21:57:10 -0600 |
| commit | d24d5446c5c96ad29bd6a690c7ba09cb8e3444e8 (patch) | |
| tree | f7ff9f21193905276d4639ed0ae931e9fc75e4ef /tests/quick/se/01.hello-2T-smt | |
| parent | c0618198908b592ff0c165b671cb5d8d785d83ca (diff) | |
| download | gem5-d24d5446c5c96ad29bd6a690c7ba09cb8e3444e8.tar.xz | |
regressions: stats updates due to no physmem in ruby
Diffstat (limited to 'tests/quick/se/01.hello-2T-smt')
| -rw-r--r-- | tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini index 4cb5e1d1b..934dbc782 100644 --- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini +++ b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini @@ -482,6 +482,7 @@ type=CoherentBus block_size=64 clock=500 header_cycles=1 +system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side @@ -533,6 +534,7 @@ type=CoherentBus block_size=64 clock=1000 header_cycles=1 +system=system use_default_range=false width=8 master=system.physmem.port @@ -540,25 +542,28 @@ slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] type=SimpleDRAM +activation_limit=4 addr_mapping=openmap banks_per_rank=8 +channels=1 clock=1000 conf_table_reported=false in_addr_map=true -lines_per_rowbuffer=64 -mem_sched_policy=fcfs +lines_per_rowbuffer=32 +mem_sched_policy=frfcfs null=false page_policy=open range=0:134217727 ranks_per_channel=2 read_buffer_size=32 -tBURST=4000 -tCL=14000 -tRCD=14000 +tBURST=5000 +tCL=13750 +tRCD=13750 tREFI=7800000 tRFC=300000 -tRP=14000 -tWTR=1000 +tRP=13750 +tWTR=7500 +tXAW=40000 write_buffer_size=32 write_thresh_perc=70 zero=false |