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authorNilay Vaish <nilay@cs.wisc.edu>2015-03-09 09:39:09 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-03-09 09:39:09 -0500
commit99fb8f81407efa54008ddf443718e492f583b142 (patch)
tree48e79a13dc012864045058f6ca3aadc3b9a767a8 /tests/quick/se/01.hello-2T-smt
parent0c8e025c3bd208e516f1c4247fdf3af7aebb2300 (diff)
downloadgem5-99fb8f81407efa54008ddf443718e492f583b142.tar.xz
stats: changes to due to recent set of patches
Diffstat (limited to 'tests/quick/se/01.hello-2T-smt')
-rw-r--r--tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini23
-rw-r--r--tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt3
2 files changed, 19 insertions, 7 deletions
diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
index d358e4bd4..febd22775 100644
--- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
@@ -23,6 +23,7 @@ load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
+mmap_using_noreserve=false
num_work_ids=16
readfile=
symbolfile=
@@ -155,6 +156,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
@@ -502,6 +504,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
@@ -556,6 +559,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=20
@@ -589,8 +593,11 @@ size=2097152
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
snoop_filter=Null
+snoop_response_latency=1
system=system
use_default_range=false
width=32
@@ -605,6 +612,7 @@ eventq_index=0
type=LiveProcess
cmd=hello
cwd=
+drivers=
egid=100
env=
errout=cerr
@@ -613,6 +621,7 @@ eventq_index=0
executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello
gid=100
input=cin
+kvmInSE=false
max_stack_size=67108864
output=cout
pid=100
@@ -626,6 +635,7 @@ useArchPT=false
type=LiveProcess
cmd=hello
cwd=
+drivers=
egid=100
env=
errout=cerr
@@ -634,6 +644,7 @@ eventq_index=0
executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello
gid=100
input=cin
+kvmInSE=false
max_stack_size=67108864
output=cout
pid=100
@@ -663,11 +674,14 @@ transition_latency=100000000
type=CoherentXBar
clk_domain=system.clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=4
+frontend_latency=3
+response_latency=2
snoop_filter=Null
+snoop_response_latency=4
system=system
use_default_range=false
-width=8
+width=16
master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
@@ -698,7 +712,7 @@ IDD62=0.000000
VDD=1.500000
VDD2=0.000000
activation_limit=4
-addr_mapping=RoRaBaChCo
+addr_mapping=RoRaBaCoCh
bank_groups_per_rank=0
banks_per_rank=8
burst_length=8
@@ -707,6 +721,7 @@ clk_domain=system.clk_domain
conf_table_reported=true
device_bus_width=8
device_rowbuffer_size=1024
+device_size=536870912
devices_per_rank=8
dll=true
eventq_index=0
diff --git a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt
index 3794759d9..1a4bdd660 100644
--- a/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt
+++ b/tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt
@@ -708,9 +708,6 @@ system.cpu.commit.op_class_1::InstPrefetch 0 0.00% 100.00% #
system.cpu.commit.op_class_1::total 6389 # Class of committed instruction
system.cpu.commit.op_class::total 12778 0.00% 0.00% # Class of committed instruction
system.cpu.commit.bw_lim_events 325 # number cycles where commit BW limit reached
-system.cpu.commit.bw_limited::0 0 # number of insts not committed due to BW limits
-system.cpu.commit.bw_limited::1 0 # number of insts not committed due to BW limits
-system.cpu.commit.bw_limited::total 0 # number of insts not committed due to BW limits
system.cpu.rob.rob_reads 130940 # The number of ROB reads
system.cpu.rob.rob_writes 58397 # The number of ROB writes
system.cpu.timesIdled 389 # Number of times that the entire CPU went into an idle state and unscheduled itself