diff options
author | Alec Roelke <ar4jc@virginia.edu> | 2017-07-13 18:00:50 -0400 |
---|---|---|
committer | Alec Roelke <ar4jc@virginia.edu> | 2017-07-14 20:31:05 +0000 |
commit | cc076757e1471b1080df5c5a0130d96b9c35fb2f (patch) | |
tree | e78ee49f33ffa977e9ad06f9346e2ae9adc0d395 /tests/quick/se/02.insttest/ref/riscv/linux-rv64c | |
parent | 68b6f9c8a1819fdeee737cf369cc6a499b505a6c (diff) | |
download | gem5-cc076757e1471b1080df5c5a0130d96b9c35fb2f.tar.xz |
tests: Upate RISC-V binaries and results
This patch updates the binaries and results for hello and insttest
regressions using the compressed extension.
Change-Id: I3d8f2248f490521d3e0dc05c48735cab82b1b04e
Reviewed-on: https://gem5-review.googlesource.com/4042
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'tests/quick/se/02.insttest/ref/riscv/linux-rv64c')
25 files changed, 12200 insertions, 0 deletions
diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/config.ini b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/config.ini new file mode 100644 index 000000000..68560b168 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/config.ini @@ -0,0 +1,905 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=System +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain +boot_osflags=a +cache_line_size=64 +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +exit_on_work_items=false +init_param=0 +kernel= +kernel_addr_check=true +load_addr_mask=1099511627775 +load_offset=0 +mem_mode=timing +mem_ranges= +memories=system.physmem +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +readfile= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +system_port=system.membus.slave[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu] +type=MinorCPU +children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=system.cpu.branchPred +checker=Null +clk_domain=system.cpu_clk_domain +cpu_id=0 +decodeCycleInput=true +decodeInputBufferSize=3 +decodeInputWidth=2 +decodeToExecuteForwardDelay=1 +default_p_state=UNDEFINED +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu.dtb +enableIdling=true +eventq_index=0 +executeAllowEarlyMemoryIssue=true +executeBranchDelay=1 +executeCommitLimit=2 +executeCycleInput=true +executeFuncUnits=system.cpu.executeFuncUnits +executeInputBufferSize=7 +executeInputWidth=2 +executeIssueLimit=2 +executeLSQMaxStoreBufferStoresPerCycle=2 +executeLSQRequestsQueueSize=1 +executeLSQStoreBufferSize=5 +executeLSQTransfersQueueSize=2 +executeMaxAccessesInMemory=2 +executeMemoryCommitLimit=1 +executeMemoryIssueLimit=1 +executeMemoryWidth=0 +executeSetTraceTimeOnCommit=true +executeSetTraceTimeOnIssue=false +fetch1FetchLimit=1 +fetch1LineSnapWidth=0 +fetch1LineWidth=0 +fetch1ToFetch2BackwardDelay=1 +fetch1ToFetch2ForwardDelay=1 +fetch2CycleInput=true +fetch2InputBufferSize=2 +fetch2ToDecodeForwardDelay=1 +function_trace=false +function_trace_start=0 +interrupts=system.cpu.interrupts +isa=system.cpu.isa +itb=system.cpu.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +profile=0 +progress_interval=0 +simpoint_start_insts= +socket_id=0 +switched_out=false +syscallRetryLatency=10000 +system=system +threadPolicy=RoundRobin +tracer=system.cpu.tracer +wait_for_remote_gdb=false +workload=system.cpu.workload +dcache_port=system.cpu.dcache.cpu_side +icache_port=system.cpu.icache.cpu_side + +[system.cpu.branchPred] +type=TournamentBP +BTBEntries=4096 +BTBTagSize=16 +RASSize=16 +choiceCtrBits=2 +choicePredictorSize=8192 +eventq_index=0 +globalCtrBits=2 +globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 +instShiftAmt=2 +localCtrBits=2 +localHistoryTableSize=2048 +localPredictorSize=2048 +numThreads=1 +useIndirect=true + +[system.cpu.dcache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=2 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=2 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=2 +sequential_access=false +size=262144 +system=system +tag_latency=2 +tags=system.cpu.dcache.tags +tgts_per_mshr=20 +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu.dcache_port +mem_side=system.cpu.toL2Bus.slave[1] + +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=2 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=262144 +tag_latency=2 + +[system.cpu.dtb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.executeFuncUnits] +type=MinorFUPool +children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6 +eventq_index=0 +funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6 + +[system.cpu.executeFuncUnits.funcUnits0] +type=MinorFU +children=opClasses timings +cantForwardFromFUIndices= +eventq_index=0 +issueLat=1 +opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses +opLat=3 +timings=system.cpu.executeFuncUnits.funcUnits0.timings + +[system.cpu.executeFuncUnits.funcUnits0.opClasses] +type=MinorOpClassSet +children=opClasses +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses + +[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses] +type=MinorOpClass +eventq_index=0 +opClass=IntAlu + +[system.cpu.executeFuncUnits.funcUnits0.timings] +type=MinorFUTiming +children=opClasses +description=Int +eventq_index=0 +extraAssumedLat=0 +extraCommitLat=0 +extraCommitLatExpr=Null +mask=0 +match=0 +opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses +srcRegsRelativeLats=2 +suppress=false + +[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses] +type=MinorOpClassSet +eventq_index=0 +opClasses= + +[system.cpu.executeFuncUnits.funcUnits1] +type=MinorFU +children=opClasses timings +cantForwardFromFUIndices= +eventq_index=0 +issueLat=1 +opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses +opLat=3 +timings=system.cpu.executeFuncUnits.funcUnits1.timings + +[system.cpu.executeFuncUnits.funcUnits1.opClasses] +type=MinorOpClassSet +children=opClasses +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses + +[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses] +type=MinorOpClass +eventq_index=0 +opClass=IntAlu + +[system.cpu.executeFuncUnits.funcUnits1.timings] +type=MinorFUTiming +children=opClasses +description=Int +eventq_index=0 +extraAssumedLat=0 +extraCommitLat=0 +extraCommitLatExpr=Null +mask=0 +match=0 +opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses +srcRegsRelativeLats=2 +suppress=false + +[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses] +type=MinorOpClassSet +eventq_index=0 +opClasses= + +[system.cpu.executeFuncUnits.funcUnits2] +type=MinorFU +children=opClasses timings +cantForwardFromFUIndices= +eventq_index=0 +issueLat=1 +opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses +opLat=3 +timings=system.cpu.executeFuncUnits.funcUnits2.timings + +[system.cpu.executeFuncUnits.funcUnits2.opClasses] +type=MinorOpClassSet +children=opClasses +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses + +[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses] +type=MinorOpClass +eventq_index=0 +opClass=IntMult + +[system.cpu.executeFuncUnits.funcUnits2.timings] +type=MinorFUTiming +children=opClasses +description=Mul +eventq_index=0 +extraAssumedLat=0 +extraCommitLat=0 +extraCommitLatExpr=Null +mask=0 +match=0 +opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses +srcRegsRelativeLats=0 +suppress=false + +[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses] +type=MinorOpClassSet +eventq_index=0 +opClasses= + +[system.cpu.executeFuncUnits.funcUnits3] +type=MinorFU +children=opClasses +cantForwardFromFUIndices= +eventq_index=0 +issueLat=9 +opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses +opLat=9 +timings= + +[system.cpu.executeFuncUnits.funcUnits3.opClasses] +type=MinorOpClassSet +children=opClasses +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses + +[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses] +type=MinorOpClass +eventq_index=0 +opClass=IntDiv + +[system.cpu.executeFuncUnits.funcUnits4] +type=MinorFU +children=opClasses timings +cantForwardFromFUIndices= +eventq_index=0 +issueLat=1 +opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses +opLat=6 +timings=system.cpu.executeFuncUnits.funcUnits4.timings + +[system.cpu.executeFuncUnits.funcUnits4.opClasses] +type=MinorOpClassSet +children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25 opClasses26 opClasses27 +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27 + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00] +type=MinorOpClass +eventq_index=0 +opClass=FloatAdd + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01] +type=MinorOpClass +eventq_index=0 +opClass=FloatCmp + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02] +type=MinorOpClass +eventq_index=0 +opClass=FloatCvt + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03] +type=MinorOpClass +eventq_index=0 +opClass=FloatMisc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04] +type=MinorOpClass +eventq_index=0 +opClass=FloatMult + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05] +type=MinorOpClass +eventq_index=0 +opClass=FloatMultAcc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06] +type=MinorOpClass +eventq_index=0 +opClass=FloatDiv + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07] +type=MinorOpClass +eventq_index=0 +opClass=FloatSqrt + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08] +type=MinorOpClass +eventq_index=0 +opClass=SimdAdd + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09] +type=MinorOpClass +eventq_index=0 +opClass=SimdAddAcc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10] +type=MinorOpClass +eventq_index=0 +opClass=SimdAlu + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11] +type=MinorOpClass +eventq_index=0 +opClass=SimdCmp + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12] +type=MinorOpClass +eventq_index=0 +opClass=SimdCvt + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13] +type=MinorOpClass +eventq_index=0 +opClass=SimdMisc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14] +type=MinorOpClass +eventq_index=0 +opClass=SimdMult + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15] +type=MinorOpClass +eventq_index=0 +opClass=SimdMultAcc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16] +type=MinorOpClass +eventq_index=0 +opClass=SimdShift + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17] +type=MinorOpClass +eventq_index=0 +opClass=SimdShiftAcc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18] +type=MinorOpClass +eventq_index=0 +opClass=SimdSqrt + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatAdd + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatAlu + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatCmp + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatCvt + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatDiv + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatMisc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatMult + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses26] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatMultAcc + +[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses27] +type=MinorOpClass +eventq_index=0 +opClass=SimdFloatSqrt + +[system.cpu.executeFuncUnits.funcUnits4.timings] +type=MinorFUTiming +children=opClasses +description=FloatSimd +eventq_index=0 +extraAssumedLat=0 +extraCommitLat=0 +extraCommitLatExpr=Null +mask=0 +match=0 +opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses +srcRegsRelativeLats=2 +suppress=false + +[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses] +type=MinorOpClassSet +eventq_index=0 +opClasses= + +[system.cpu.executeFuncUnits.funcUnits5] +type=MinorFU +children=opClasses timings +cantForwardFromFUIndices= +eventq_index=0 +issueLat=1 +opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses +opLat=1 +timings=system.cpu.executeFuncUnits.funcUnits5.timings + +[system.cpu.executeFuncUnits.funcUnits5.opClasses] +type=MinorOpClassSet +children=opClasses0 opClasses1 opClasses2 opClasses3 +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3 + +[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0] +type=MinorOpClass +eventq_index=0 +opClass=MemRead + +[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1] +type=MinorOpClass +eventq_index=0 +opClass=MemWrite + +[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses2] +type=MinorOpClass +eventq_index=0 +opClass=FloatMemRead + +[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses3] +type=MinorOpClass +eventq_index=0 +opClass=FloatMemWrite + +[system.cpu.executeFuncUnits.funcUnits5.timings] +type=MinorFUTiming +children=opClasses +description=Mem +eventq_index=0 +extraAssumedLat=2 +extraCommitLat=0 +extraCommitLatExpr=Null +mask=0 +match=0 +opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses +srcRegsRelativeLats=1 +suppress=false + +[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses] +type=MinorOpClassSet +eventq_index=0 +opClasses= + +[system.cpu.executeFuncUnits.funcUnits6] +type=MinorFU +children=opClasses +cantForwardFromFUIndices= +eventq_index=0 +issueLat=1 +opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses +opLat=1 +timings= + +[system.cpu.executeFuncUnits.funcUnits6.opClasses] +type=MinorOpClassSet +children=opClasses0 opClasses1 +eventq_index=0 +opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1 + +[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0] +type=MinorOpClass +eventq_index=0 +opClass=IprAccess + +[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] +type=MinorOpClass +eventq_index=0 +opClass=InstPrefetch + +[system.cpu.icache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=2 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=2 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=true +max_miss_count=0 +mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=2 +sequential_access=false +size=131072 +system=system +tag_latency=2 +tags=system.cpu.icache.tags +tgts_per_mshr=20 +write_buffers=8 +writeback_clean=true +cpu_side=system.cpu.icache_port +mem_side=system.cpu.toL2Bus.slave[0] + +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=2 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=131072 +tag_latency=2 + +[system.cpu.interrupts] +type=RiscvInterrupts +eventq_index=0 + +[system.cpu.isa] +type=RiscvISA +eventq_index=0 + +[system.cpu.itb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.l2cache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=8 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=20 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=20 +sequential_access=false +size=2097152 +system=system +tag_latency=20 +tags=system.cpu.l2cache.tags +tgts_per_mshr=12 +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu.toL2Bus.master[0] +mem_side=system.membus.slave[1] + +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=20 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=2097152 +tag_latency=20 + +[system.cpu.toL2Bus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=0 +frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=false +power_model=Null +response_latency=1 +snoop_filter=system.cpu.toL2Bus.snoop_filter +snoop_response_latency=1 +system=system +use_default_range=false +width=32 +master=system.cpu.l2cache.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side + +[system.cpu.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + +[system.cpu.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu.workload] +type=Process +cmd=insttest +cwd= +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest +gid=100 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + +[system.membus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=4 +frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=true +power_model=Null +response_latency=2 +snoop_filter=system.membus.snoop_filter +snoop_response_latency=4 +system=system +use_default_range=false +width=16 +master=system.physmem.port +slave=system.system_port system.cpu.l2cache.mem_side + +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + +[system.physmem] +type=DRAMCtrl +IDD0=0.055000 +IDD02=0.000000 +IDD2N=0.032000 +IDD2N2=0.000000 +IDD2P0=0.000000 +IDD2P02=0.000000 +IDD2P1=0.032000 +IDD2P12=0.000000 +IDD3N=0.038000 +IDD3N2=0.000000 +IDD3P0=0.000000 +IDD3P02=0.000000 +IDD3P1=0.038000 +IDD3P12=0.000000 +IDD4R=0.157000 +IDD4R2=0.000000 +IDD4W=0.125000 +IDD4W2=0.000000 +IDD5=0.235000 +IDD52=0.000000 +IDD6=0.020000 +IDD62=0.000000 +VDD=1.500000 +VDD2=0.000000 +activation_limit=4 +addr_mapping=RoRaBaCoCh +bank_groups_per_rank=0 +banks_per_rank=8 +burst_length=8 +channels=1 +clk_domain=system.clk_domain +conf_table_reported=true +default_p_state=UNDEFINED +device_bus_width=8 +device_rowbuffer_size=1024 +device_size=536870912 +devices_per_rank=8 +dll=true +eventq_index=0 +in_addr_map=true +kvm_map=true +max_accesses_per_row=16 +mem_sched_policy=frfcfs +min_writes_per_switch=16 +null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +page_policy=open_adaptive +power_model=Null +range=0:134217727:0:0:0:0 +ranks_per_channel=2 +read_buffer_size=32 +static_backend_latency=10000 +static_frontend_latency=10000 +tBURST=5000 +tCCD_L=0 +tCK=1250 +tCL=13750 +tCS=2500 +tRAS=35000 +tRCD=13750 +tREFI=7800000 +tRFC=260000 +tRP=13750 +tRRD=6000 +tRRD_L=0 +tRTP=7500 +tRTW=2500 +tWR=15000 +tWTR=7500 +tXAW=30000 +tXP=6000 +tXPDLL=0 +tXS=270000 +tXSDLL=0 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 +port=system.membus.master[0] + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.000000 + diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/config.json b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/config.json new file mode 100644 index 000000000..c207d5ec8 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/config.json @@ -0,0 +1,1214 @@ +{ + "name": null, + "sim_quantum": 0, + "system": { + "kernel": "", + "mmap_using_noreserve": false, + "kernel_addr_check": true, + "membus": { + "point_of_coherency": true, + "system": "system", + "response_latency": 2, + "cxx_class": "CoherentXBar", + "forward_latency": 4, + "clk_domain": "system.clk_domain", + "width": 16, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "master": { + "peer": [ + "system.physmem.port" + ], + "role": "MASTER" + }, + "type": "CoherentXBar", + "frontend_latency": 3, + "slave": { + "peer": [ + "system.system_port", + "system.cpu.l2cache.mem_side" + ], + "role": "SLAVE" + }, + "p_state_clk_gate_min": 1000, + "snoop_filter": { + "name": "snoop_filter", + "system": "system", + "max_capacity": 8388608, + "eventq_index": 0, + "cxx_class": "SnoopFilter", + "path": "system.membus.snoop_filter", + "type": "SnoopFilter", + "lookup_latency": 1 + }, + "power_model": null, + "path": "system.membus", + "snoop_response_latency": 4, + "name": "membus", + "p_state_clk_gate_bins": 20, + "use_default_range": false + }, + "symbolfile": "", + "readfile": "", + "thermal_model": null, + "cxx_class": "System", + "work_begin_cpu_id_exit": -1, + "load_offset": 0, + "work_begin_exit_count": 0, + "p_state_clk_gate_min": 1000, + "memories": [ + "system.physmem" + ], + "work_begin_ckpt_count": 0, + "clk_domain": { + "name": "clk_domain", + "clock": [ + 1000 + ], + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain", + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, + "mem_ranges": [], + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "sys_clk_domain": "system.clk_domain", + "transition_latency": 100000000, + "eventq_index": 0, + "cxx_class": "DVFSHandler", + "domains": [], + "path": "system.dvfs_handler", + "type": "DVFSHandler" + }, + "work_end_exit_count": 0, + "type": "System", + "voltage_domain": { + "name": "voltage_domain", + "eventq_index": 0, + "voltage": [ + "1.0" + ], + "cxx_class": "VoltageDomain", + "path": "system.voltage_domain", + "type": "VoltageDomain" + }, + "cache_line_size": 64, + "boot_osflags": "a", + "system_port": { + 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"system.cpu.executeFuncUnits.funcUnits4.opClasses", + "type": "MinorOpClassSet" + }, + "eventq_index": 0, + "timings": [ + { + "extraAssumedLat": 0, + "description": "FloatSimd", + "srcRegsRelativeLats": [ + 2 + ], + "suppress": false, + "mask": 0, + "extraCommitLat": 0, + "eventq_index": 0, + "opClasses": { + "name": "opClasses", + "opClasses": [], + "eventq_index": 0, + "cxx_class": "MinorOpClassSet", + "path": "system.cpu.executeFuncUnits.funcUnits4.timings.opClasses", + "type": "MinorOpClassSet" + }, + "cxx_class": "MinorFUTiming", + "path": "system.cpu.executeFuncUnits.funcUnits4.timings", + "extraCommitLatExpr": null, + "type": "MinorFUTiming", + "match": 0, + "name": "timings" + } + ], + "cxx_class": "MinorFU", + "path": "system.cpu.executeFuncUnits.funcUnits4", + "type": "MinorFU" + }, + { + "issueLat": 1, + "opLat": 1, + "name": "funcUnits5", + "cantForwardFromFUIndices": [], + "opClasses": { + "name": "opClasses", + "opClasses": [ + { + "opClass": "MemRead", + "name": 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+ "type": "MinorOpClass" + }, + { + "opClass": "InstPrefetch", + "name": "opClasses1", + "eventq_index": 0, + "cxx_class": "MinorOpClass", + "path": "system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1", + "type": "MinorOpClass" + } + ], + "eventq_index": 0, + "cxx_class": "MinorOpClassSet", + "path": "system.cpu.executeFuncUnits.funcUnits6.opClasses", + "type": "MinorOpClassSet" + }, + "eventq_index": 0, + "timings": [], + "cxx_class": "MinorFU", + "path": "system.cpu.executeFuncUnits.funcUnits6", + "type": "MinorFU" + } + ], + "type": "MinorFUPool" + }, + "switched_out": false, + "power_model": null, + "max_insts_all_threads": 0, + "executeSetTraceTimeOnIssue": false, + "fetch2InputBufferSize": 2, + "profile": 0, + "fetch2ToDecodeForwardDelay": 1, + "executeInputWidth": 2, + "decodeToExecuteForwardDelay": 1, + "executeLSQRequestsQueueSize": 1, + "fetch2CycleInput": true, + "executeMaxAccessesInMemory": 2, + "enableIdling": true, + "executeLSQStoreBufferSize": 5, + "workload": [ + { + "uid": 100, + "pid": 100, + "kvmInSE": false, + "cxx_class": "Process", + "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest", + "drivers": [], + "system": "system", + "gid": 100, + "eventq_index": 0, + "env": [], + "maxStackSize": 67108864, + "ppid": 0, + "type": "Process", + "cwd": "", + "pgid": 100, + "simpoint": 0, + "euid": 100, + "input": "cin", + "path": "system.cpu.workload", + "name": "workload", + "cmd": [ + "insttest" + ], + "errout": "cerr", + "useArchPT": false, + "egid": 100, + "output": "cout" + } + ], + "name": "cpu", + "wait_for_remote_gdb": false, + "dtb": { + "name": "dtb", + "eventq_index": 0, + "cxx_class": "RiscvISA::TLB", + "path": "system.cpu.dtb", + "type": "RiscvTLB", + "size": 64 + }, + "simpoint_start_insts": [], + "executeSetTraceTimeOnCommit": true, + "tracer": { + "eventq_index": 0, + "path": "system.cpu.tracer", + "type": "ExeTracer", + "name": "tracer", + "cxx_class": "Trace::ExeTracer" + }, + "threadPolicy": "RoundRobin", + "executeCommitLimit": 2, + "fetch1LineWidth": 0, + "branchPred": { + "numThreads": 1, + "BTBEntries": 4096, + "cxx_class": "TournamentBP", + "indirectPathLength": 3, + "globalCtrBits": 2, + "choicePredictorSize": 8192, + "indirectHashGHR": true, + "eventq_index": 0, + "localHistoryTableSize": 2048, + "type": "TournamentBP", + "indirectSets": 256, + "indirectWays": 2, + "choiceCtrBits": 2, + "useIndirect": true, + "localCtrBits": 2, + "path": "system.cpu.branchPred", + "localPredictorSize": 2048, + "RASSize": 16, + "globalPredictorSize": 8192, + "name": "branchPred", + "indirectHashTargets": true, + "instShiftAmt": 2, + "indirectTagSize": 16, + "BTBTagSize": 16 + }, + "dcache": { + "cpu_side": { + "peer": "system.cpu.dcache_port", + "role": "SLAVE" + }, + "clusivity": "mostly_incl", + "prefetcher": null, + "system": "system", + "write_buffers": 8, + "response_latency": 2, + "cxx_class": "Cache", + "size": 262144, + "type": "Cache", + "clk_domain": "system.cpu_clk_domain", + "max_miss_count": 0, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "mem_side": { + "peer": "system.cpu.toL2Bus.slave[1]", + "role": "MASTER" + }, + "mshrs": 4, + "writeback_clean": false, + "p_state_clk_gate_min": 1000, + "tags": { + "size": 262144, + "tag_latency": 2, + "name": "tags", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "clk_domain": "system.cpu_clk_domain", + "power_model": null, + "sequential_access": false, + "assoc": 2, + "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, + "path": "system.cpu.dcache.tags", + "block_size": 64, + "type": "LRU", + "data_latency": 2 + }, + "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, + "power_model": null, + "addr_ranges": [ + "0:18446744073709551615:0:0:0:0" + ], + "is_read_only": false, + "prefetch_on_access": false, + "path": "system.cpu.dcache", + "data_latency": 2, + "tag_latency": 2, + "name": "dcache", + "p_state_clk_gate_bins": 20, + "sequential_access": false, + "assoc": 2 + }, + "path": "system.cpu", + "fetch1ToFetch2ForwardDelay": 1, + "decodeInputBufferSize": 3 + } + ], + "multi_thread": false, + "exit_on_work_items": false, + "work_item_id": -1, + "num_work_ids": 16 + }, + "time_sync_period": 100000000000, + "eventq_index": 0, + "time_sync_spin_threshold": 100000000, + "cxx_class": "Root", + "path": "root", + "time_sync_enable": false, + "type": "Root", + "full_system": false +}
\ No newline at end of file diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/simerr b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/simerr new file mode 100755 index 000000000..0e5230b52 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/simerr @@ -0,0 +1,6 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) +warn: Sockets disabled, not accepting gdb connections +info: Entering event queue @ 0. Starting simulation... +warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings. + Returning '/home/ar4jc/gem5/tests/test-progs/insttest/bin/riscv/linux-rv64c/insttest' +info: Increasing stack size by one page. diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/simout b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/simout new file mode 100755 index 000000000..027df2666 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/simout @@ -0,0 +1,66 @@ +Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing/simout +Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing/simerr +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Jul 13 2017 17:09:45 +gem5 started Jul 13 2017 17:25:07 +gem5 executing on boldrock, pid 6004 +command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64c/minor-timing + +Global frequency set at 1000000000000 ticks per second +c.lwsp: PASS +c.ldsp: PASS +c.fldsp: PASS +c.swsp: PASS +c.sdsp: PASS +c.fsdsp: PASS +c.lw, positive: PASS +c.lw, negative: PASS +c.ld: PASS +c.fld: PASS +c.sw: PASS +c.sd: PASS +c.fsd: PASS +c.j: PASS +c.jr: PASS +c.jalr: PASS +c.beqz, zero: PASS +c.beqz, not zero: PASS +c.bnez, not zero: PASS +c.bnez, zero: PASS +c.li: PASS +c.li, sign extend: PASS +c.lui: PASS +c.addi: PASS +c.addiw: PASS +c.addiw, overflow: PASS +c.addiw, truncate: PASS +c.addi16sp: PASS +c.addi4spn: PASS +c.slli: PASS +c.slli, overflow: PASS +c.srli: PASS +c.srli, overflow: PASS +c.srli, -1: PASS +c.srai: PASS +c.srai, overflow: PASS +c.srai, -1: PASS +c.andi (0): PASS +c.andi (1): PASS +c.mv: PASS +c.add: PASS +c.and (0): PASS +c.and (-1): PASS +c.or (1): PASS +c.or (A): PASS +c.xor (1): PASS +c.xor (0): PASS +c.sub: PASS +c.addw: PASS +c.addw, overflow: PASS +c.addw, truncate: PASS +c.subw: PASS +c.subw, "overflow": PASS +c.subw, truncate: PASS +Exiting @ tick 196383500 because exiting with last active thread context diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/stats.txt b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/stats.txt new file mode 100644 index 000000000..a9799b603 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/minor-timing/stats.txt @@ -0,0 +1,773 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000196 +sim_ticks 196383500 +final_tick 196383500 +sim_freq 1000000000000 +host_inst_rate 4107 +host_op_rate 4117 +host_tick_rate 6138676 +host_mem_usage 272768 +host_seconds 31.99 +sim_insts 131410 +sim_ops 131710 +system.voltage_domain.voltage 1 +system.clk_domain.clock 1000 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+system.membus.snoop_fanout::min_value 0 +system.membus.snoop_fanout::max_value 0 +system.membus.snoop_fanout::total 1455 +system.membus.reqLayer0.occupancy 1688000 +system.membus.reqLayer0.utilization 0.8 +system.membus.respLayer1.occupancy 7746500 +system.membus.respLayer1.utilization 3.9 + +---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/config.ini b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/config.ini new file mode 100644 index 000000000..a1430e685 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/config.ini @@ -0,0 +1,876 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=System +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain +boot_osflags=a +cache_line_size=64 +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +exit_on_work_items=false +init_param=0 +kernel= +kernel_addr_check=true +load_addr_mask=1099511627775 +load_offset=0 +mem_mode=timing +mem_ranges= +memories=system.physmem +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +readfile= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +system_port=system.membus.slave[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu] +type=DerivO3CPU +children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload +LFSTSize=1024 +LQEntries=32 +LSQCheckLoads=true +LSQDepCheckShift=4 +SQEntries=32 +SSITSize=1024 +activity=0 +backComSize=5 +branchPred=system.cpu.branchPred +cacheStorePorts=200 +checker=Null +clk_domain=system.cpu_clk_domain +commitToDecodeDelay=1 +commitToFetchDelay=1 +commitToIEWDelay=1 +commitToRenameDelay=1 +commitWidth=8 +cpu_id=0 +decodeToFetchDelay=1 +decodeToRenameDelay=1 +decodeWidth=8 +default_p_state=UNDEFINED +dispatchWidth=8 +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu.dtb +eventq_index=0 +fetchBufferSize=64 +fetchQueueSize=32 +fetchToDecodeDelay=1 +fetchTrapLatency=1 +fetchWidth=8 +forwardComSize=5 +fuPool=system.cpu.fuPool +function_trace=false +function_trace_start=0 +iewToCommitDelay=1 +iewToDecodeDelay=1 +iewToFetchDelay=1 +iewToRenameDelay=1 +interrupts=system.cpu.interrupts +isa=system.cpu.isa +issueToExecuteDelay=1 +issueWidth=8 +itb=system.cpu.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +needsTSO=false +numIQEntries=64 +numPhysCCRegs=0 +numPhysFloatRegs=256 +numPhysIntRegs=256 +numPhysVecRegs=256 +numROBEntries=192 +numRobs=1 +numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +profile=0 +progress_interval=0 +renameToDecodeDelay=1 +renameToFetchDelay=1 +renameToIEWDelay=2 +renameToROBDelay=1 +renameWidth=8 +simpoint_start_insts= +smtCommitPolicy=RoundRobin +smtFetchPolicy=SingleThread +smtIQPolicy=Partitioned +smtIQThreshold=100 +smtLSQPolicy=Partitioned +smtLSQThreshold=100 +smtNumFetchingThreads=1 +smtROBPolicy=Partitioned +smtROBThreshold=100 +socket_id=0 +squashWidth=8 +store_set_clear_period=250000 +switched_out=false +syscallRetryLatency=10000 +system=system +tracer=system.cpu.tracer +trapLatency=13 +wait_for_remote_gdb=false +wbWidth=8 +workload=system.cpu.workload +dcache_port=system.cpu.dcache.cpu_side +icache_port=system.cpu.icache.cpu_side + +[system.cpu.branchPred] +type=TournamentBP +BTBEntries=4096 +BTBTagSize=16 +RASSize=16 +choiceCtrBits=2 +choicePredictorSize=8192 +eventq_index=0 +globalCtrBits=2 +globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 +instShiftAmt=2 +localCtrBits=2 +localHistoryTableSize=2048 +localPredictorSize=2048 +numThreads=1 +useIndirect=true + +[system.cpu.dcache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=2 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=2 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=2 +sequential_access=false +size=262144 +system=system +tag_latency=2 +tags=system.cpu.dcache.tags +tgts_per_mshr=20 +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu.dcache_port +mem_side=system.cpu.toL2Bus.slave[1] + +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=2 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=262144 +tag_latency=2 + +[system.cpu.dtb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.fuPool] +type=FUPool +children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8 +FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8 +eventq_index=0 + +[system.cpu.fuPool.FUList0] +type=FUDesc +children=opList +count=6 +eventq_index=0 +opList=system.cpu.fuPool.FUList0.opList + +[system.cpu.fuPool.FUList0.opList] +type=OpDesc +eventq_index=0 +opClass=IntAlu +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList1] +type=FUDesc +children=opList0 opList1 +count=2 +eventq_index=0 +opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 + +[system.cpu.fuPool.FUList1.opList0] +type=OpDesc +eventq_index=0 +opClass=IntMult +opLat=3 +pipelined=true + +[system.cpu.fuPool.FUList1.opList1] +type=OpDesc +eventq_index=0 +opClass=IntDiv +opLat=20 +pipelined=false + +[system.cpu.fuPool.FUList2] +type=FUDesc +children=opList0 opList1 opList2 +count=4 +eventq_index=0 +opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2 + +[system.cpu.fuPool.FUList2.opList0] +type=OpDesc +eventq_index=0 +opClass=FloatAdd +opLat=2 +pipelined=true + +[system.cpu.fuPool.FUList2.opList1] +type=OpDesc +eventq_index=0 +opClass=FloatCmp +opLat=2 +pipelined=true + +[system.cpu.fuPool.FUList2.opList2] +type=OpDesc +eventq_index=0 +opClass=FloatCvt +opLat=2 +pipelined=true + +[system.cpu.fuPool.FUList3] +type=FUDesc +children=opList0 opList1 opList2 opList3 opList4 +count=2 +eventq_index=0 +opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2 system.cpu.fuPool.FUList3.opList3 system.cpu.fuPool.FUList3.opList4 + +[system.cpu.fuPool.FUList3.opList0] +type=OpDesc +eventq_index=0 +opClass=FloatMult +opLat=4 +pipelined=true + +[system.cpu.fuPool.FUList3.opList1] +type=OpDesc +eventq_index=0 +opClass=FloatMultAcc +opLat=5 +pipelined=true + +[system.cpu.fuPool.FUList3.opList2] +type=OpDesc +eventq_index=0 +opClass=FloatMisc +opLat=3 +pipelined=true + +[system.cpu.fuPool.FUList3.opList3] +type=OpDesc +eventq_index=0 +opClass=FloatDiv +opLat=12 +pipelined=false + +[system.cpu.fuPool.FUList3.opList4] +type=OpDesc +eventq_index=0 +opClass=FloatSqrt +opLat=24 +pipelined=false + +[system.cpu.fuPool.FUList4] +type=FUDesc +children=opList0 opList1 +count=0 +eventq_index=0 +opList=system.cpu.fuPool.FUList4.opList0 system.cpu.fuPool.FUList4.opList1 + +[system.cpu.fuPool.FUList4.opList0] +type=OpDesc +eventq_index=0 +opClass=MemRead +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList4.opList1] +type=OpDesc +eventq_index=0 +opClass=FloatMemRead +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5] +type=FUDesc +children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 +count=4 +eventq_index=0 +opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 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+opClass=SimdMult +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList07] +type=OpDesc +eventq_index=0 +opClass=SimdMultAcc +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList08] +type=OpDesc +eventq_index=0 +opClass=SimdShift +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList09] +type=OpDesc +eventq_index=0 +opClass=SimdShiftAcc +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList10] +type=OpDesc +eventq_index=0 +opClass=SimdSqrt +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList11] +type=OpDesc +eventq_index=0 +opClass=SimdFloatAdd +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList12] +type=OpDesc +eventq_index=0 +opClass=SimdFloatAlu +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList13] +type=OpDesc +eventq_index=0 +opClass=SimdFloatCmp +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList14] +type=OpDesc +eventq_index=0 +opClass=SimdFloatCvt +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList15] +type=OpDesc +eventq_index=0 +opClass=SimdFloatDiv +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList16] +type=OpDesc +eventq_index=0 +opClass=SimdFloatMisc +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList17] +type=OpDesc +eventq_index=0 +opClass=SimdFloatMult +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList18] +type=OpDesc +eventq_index=0 +opClass=SimdFloatMultAcc +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList5.opList19] +type=OpDesc +eventq_index=0 +opClass=SimdFloatSqrt +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList6] +type=FUDesc +children=opList0 opList1 +count=0 +eventq_index=0 +opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1 + +[system.cpu.fuPool.FUList6.opList0] +type=OpDesc +eventq_index=0 +opClass=MemWrite +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList6.opList1] +type=OpDesc +eventq_index=0 +opClass=FloatMemWrite +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList7] +type=FUDesc +children=opList0 opList1 opList2 opList3 +count=4 +eventq_index=0 +opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1 system.cpu.fuPool.FUList7.opList2 system.cpu.fuPool.FUList7.opList3 + +[system.cpu.fuPool.FUList7.opList0] +type=OpDesc +eventq_index=0 +opClass=MemRead +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList7.opList1] +type=OpDesc +eventq_index=0 +opClass=MemWrite +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList7.opList2] +type=OpDesc +eventq_index=0 +opClass=FloatMemRead +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList7.opList3] +type=OpDesc +eventq_index=0 +opClass=FloatMemWrite +opLat=1 +pipelined=true + +[system.cpu.fuPool.FUList8] +type=FUDesc +children=opList +count=1 +eventq_index=0 +opList=system.cpu.fuPool.FUList8.opList + +[system.cpu.fuPool.FUList8.opList] +type=OpDesc +eventq_index=0 +opClass=IprAccess +opLat=3 +pipelined=false + +[system.cpu.icache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=2 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=2 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=true +max_miss_count=0 +mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=2 +sequential_access=false +size=131072 +system=system +tag_latency=2 +tags=system.cpu.icache.tags +tgts_per_mshr=20 +write_buffers=8 +writeback_clean=true +cpu_side=system.cpu.icache_port +mem_side=system.cpu.toL2Bus.slave[0] + +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=2 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=131072 +tag_latency=2 + +[system.cpu.interrupts] +type=RiscvInterrupts +eventq_index=0 + +[system.cpu.isa] +type=RiscvISA +eventq_index=0 + +[system.cpu.itb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.l2cache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=8 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=20 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=20 +sequential_access=false +size=2097152 +system=system +tag_latency=20 +tags=system.cpu.l2cache.tags +tgts_per_mshr=12 +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu.toL2Bus.master[0] +mem_side=system.membus.slave[1] + +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=20 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=2097152 +tag_latency=20 + +[system.cpu.toL2Bus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=0 +frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=false +power_model=Null +response_latency=1 +snoop_filter=system.cpu.toL2Bus.snoop_filter +snoop_response_latency=1 +system=system +use_default_range=false +width=32 +master=system.cpu.l2cache.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side + +[system.cpu.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + +[system.cpu.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu.workload] +type=Process +cmd=insttest +cwd= +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest +gid=100 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + +[system.membus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=4 +frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=true +power_model=Null +response_latency=2 +snoop_filter=system.membus.snoop_filter +snoop_response_latency=4 +system=system +use_default_range=false +width=16 +master=system.physmem.port +slave=system.system_port system.cpu.l2cache.mem_side + +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + +[system.physmem] +type=DRAMCtrl +IDD0=0.055000 +IDD02=0.000000 +IDD2N=0.032000 +IDD2N2=0.000000 +IDD2P0=0.000000 +IDD2P02=0.000000 +IDD2P1=0.032000 +IDD2P12=0.000000 +IDD3N=0.038000 +IDD3N2=0.000000 +IDD3P0=0.000000 +IDD3P02=0.000000 +IDD3P1=0.038000 +IDD3P12=0.000000 +IDD4R=0.157000 +IDD4R2=0.000000 +IDD4W=0.125000 +IDD4W2=0.000000 +IDD5=0.235000 +IDD52=0.000000 +IDD6=0.020000 +IDD62=0.000000 +VDD=1.500000 +VDD2=0.000000 +activation_limit=4 +addr_mapping=RoRaBaCoCh +bank_groups_per_rank=0 +banks_per_rank=8 +burst_length=8 +channels=1 +clk_domain=system.clk_domain +conf_table_reported=true +default_p_state=UNDEFINED +device_bus_width=8 +device_rowbuffer_size=1024 +device_size=536870912 +devices_per_rank=8 +dll=true +eventq_index=0 +in_addr_map=true +kvm_map=true +max_accesses_per_row=16 +mem_sched_policy=frfcfs +min_writes_per_switch=16 +null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +page_policy=open_adaptive +power_model=Null +range=0:134217727:0:0:0:0 +ranks_per_channel=2 +read_buffer_size=32 +static_backend_latency=10000 +static_frontend_latency=10000 +tBURST=5000 +tCCD_L=0 +tCK=1250 +tCL=13750 +tCS=2500 +tRAS=35000 +tRCD=13750 +tREFI=7800000 +tRFC=260000 +tRP=13750 +tRRD=6000 +tRRD_L=0 +tRTP=7500 +tRTW=2500 +tWR=15000 +tWTR=7500 +tXAW=30000 +tXP=6000 +tXPDLL=0 +tXS=270000 +tXSDLL=0 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 +port=system.membus.master[0] + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.000000 + diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/config.json b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/config.json new file mode 100644 index 000000000..511bcfee2 --- /dev/null +++ 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"FUPool" + }, + "socket_id": 0, + "renameToFetchDelay": 1, + "icache": { + "cpu_side": { + "peer": "system.cpu.icache_port", + "role": "SLAVE" + }, + "clusivity": "mostly_incl", + "prefetcher": null, + "system": "system", + "write_buffers": 8, + "response_latency": 2, + "cxx_class": "Cache", + "size": 131072, + "type": "Cache", + "clk_domain": "system.cpu_clk_domain", + "max_miss_count": 0, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "mem_side": { + "peer": "system.cpu.toL2Bus.slave[0]", + "role": "MASTER" + }, + "mshrs": 4, + "writeback_clean": true, + "p_state_clk_gate_min": 1000, + "tags": { + "size": 131072, + "tag_latency": 2, + "name": "tags", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "clk_domain": "system.cpu_clk_domain", + "power_model": null, + "sequential_access": false, + "assoc": 2, + "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, + "path": "system.cpu.icache.tags", + "block_size": 64, + "type": "LRU", + "data_latency": 2 + }, + "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, + "power_model": null, + "addr_ranges": [ + "0:18446744073709551615:0:0:0:0" + ], + "is_read_only": true, + "prefetch_on_access": false, + "path": "system.cpu.icache", + "data_latency": 2, + "tag_latency": 2, + "name": "icache", + "p_state_clk_gate_bins": 20, + "sequential_access": false, + "assoc": 2 + }, + "path": "system.cpu", + "numRobs": 1, + "switched_out": false, + "smtLSQPolicy": "Partitioned", + "fetchBufferSize": 64, + "wait_for_remote_gdb": false, + "cacheStorePorts": 200, + "simpoint_start_insts": [], + "max_insts_any_thread": 0, + "smtROBThreshold": 100, + "numIQEntries": 64, + "branchPred": { + "numThreads": 1, + "BTBEntries": 4096, + "cxx_class": "TournamentBP", + "indirectPathLength": 3, + "globalCtrBits": 2, + "choicePredictorSize": 8192, + "indirectHashGHR": true, + "eventq_index": 0, + "localHistoryTableSize": 2048, + "type": "TournamentBP", + "indirectSets": 256, + "indirectWays": 2, + "choiceCtrBits": 2, + "useIndirect": true, + "localCtrBits": 2, + "path": "system.cpu.branchPred", + "localPredictorSize": 2048, + "RASSize": 16, + "globalPredictorSize": 8192, + "name": "branchPred", + "indirectHashTargets": true, + "instShiftAmt": 2, + "indirectTagSize": 16, + "BTBTagSize": 16 + }, + "LFSTSize": 1024, + "isa": [ + { + "eventq_index": 0, + "path": "system.cpu.isa", + "type": "RiscvISA", + "name": "isa", + "cxx_class": "RiscvISA::ISA" + } + ], + "smtROBPolicy": "Partitioned", + "iewToFetchDelay": 1, + "do_statistics_insts": true, + "dispatchWidth": 8, + "dcache": { + "cpu_side": { + "peer": "system.cpu.dcache_port", + "role": "SLAVE" + }, + "clusivity": "mostly_incl", + "prefetcher": null, + "system": "system", + "write_buffers": 8, + "response_latency": 2, + "cxx_class": "Cache", + "size": 262144, + "type": "Cache", + "clk_domain": "system.cpu_clk_domain", + "max_miss_count": 0, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "mem_side": { + "peer": "system.cpu.toL2Bus.slave[1]", + "role": "MASTER" + }, + "mshrs": 4, + "writeback_clean": false, + "p_state_clk_gate_min": 1000, + "tags": { + "size": 262144, + "tag_latency": 2, + "name": "tags", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "clk_domain": "system.cpu_clk_domain", + "power_model": null, + "sequential_access": false, + "assoc": 2, + "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, + "path": "system.cpu.dcache.tags", + "block_size": 64, + "type": "LRU", + "data_latency": 2 + }, + "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, + "power_model": null, + "addr_ranges": [ + "0:18446744073709551615:0:0:0:0" + ], + "is_read_only": false, + "prefetch_on_access": false, + "path": "system.cpu.dcache", + "data_latency": 2, + "tag_latency": 2, + "name": "dcache", + "p_state_clk_gate_bins": 20, + "sequential_access": false, + "assoc": 2 + }, + "commitToDecodeDelay": 1, + "smtIQPolicy": "Partitioned", + "issueWidth": 8, + "LSQCheckLoads": true, + "commitToRenameDelay": 1, + "system": "system", + "checker": null, + "numPhysFloatRegs": 256, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "type": "DerivO3CPU", + "wbWidth": 8, + "numPhysVecRegs": 256, + "interrupts": [ + { + "eventq_index": 0, + "path": "system.cpu.interrupts", + "type": "RiscvInterrupts", + "name": "interrupts", + "cxx_class": "RiscvISA::Interrupts" + } + ], + "smtCommitPolicy": "RoundRobin", + "issueToExecuteDelay": 1, + "dtb": { + "name": "dtb", + "eventq_index": 0, + "cxx_class": "RiscvISA::TLB", + "path": "system.cpu.dtb", + "type": "RiscvTLB", + "size": 64 + }, + "numROBEntries": 192, + "fetchQueueSize": 32, + "iewToCommitDelay": 1, + "smtNumFetchingThreads": 1, + "forwardComSize": 5, + "do_checkpoint_insts": true, + "cxx_class": "DerivO3CPU", + "commitToIEWDelay": 1, + "commitWidth": 8, + "clk_domain": "system.cpu_clk_domain", + "function_trace_start": 0, + "smtFetchPolicy": "SingleThread", + "profile": 0, + "icache_port": { + "peer": "system.cpu.icache.cpu_side", + "role": "MASTER" + }, + "dcache_port": { + "peer": "system.cpu.dcache.cpu_side", + "role": "MASTER" + }, + "LSQDepCheckShift": 4, + "trapLatency": 13, + "iewToDecodeDelay": 1, + "numPhysCCRegs": 0, + "renameToIEWDelay": 2, + "p_state_clk_gate_bins": 20, + "progress_interval": 0, + "LQEntries": 32 + } + ], + "multi_thread": false, + "exit_on_work_items": false, + "work_item_id": -1, + "num_work_ids": 16 + }, + "time_sync_period": 100000000000, + "eventq_index": 0, + "time_sync_spin_threshold": 100000000, + "cxx_class": "Root", + "path": "root", + "time_sync_enable": false, + "type": "Root", + "full_system": false +}
\ No newline at end of file diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/simerr b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/simerr new file mode 100755 index 000000000..0e5230b52 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/simerr @@ -0,0 +1,6 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) +warn: Sockets disabled, not accepting gdb connections +info: Entering event queue @ 0. Starting simulation... +warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings. + Returning '/home/ar4jc/gem5/tests/test-progs/insttest/bin/riscv/linux-rv64c/insttest' +info: Increasing stack size by one page. diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/simout b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/simout new file mode 100755 index 000000000..5d778132a --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/simout @@ -0,0 +1,66 @@ +Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing/simout +Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing/simerr +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Jul 13 2017 17:09:45 +gem5 started Jul 13 2017 17:25:07 +gem5 executing on boldrock, pid 6007 +command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64c/o3-timing + +Global frequency set at 1000000000000 ticks per second +c.lwsp: PASS +c.ldsp: PASS +c.fldsp: PASS +c.swsp: PASS +c.sdsp: PASS +c.fsdsp: PASS +c.lw, positive: PASS +c.lw, negative: PASS +c.ld: PASS +c.fld: PASS +c.sw: PASS +c.sd: PASS +c.fsd: PASS +c.j: PASS +c.jr: PASS +c.jalr: PASS +c.beqz, zero: PASS +c.beqz, not zero: PASS +c.bnez, not zero: PASS +c.bnez, zero: PASS +c.li: PASS +c.li, sign extend: PASS +c.lui: PASS +c.addi: PASS +c.addiw: PASS +c.addiw, overflow: PASS +c.addiw, truncate: PASS +c.addi16sp: PASS +c.addi4spn: PASS +c.slli: PASS +c.slli, overflow: PASS +c.srli: PASS +c.srli, overflow: PASS +c.srli, -1: PASS +c.srai: PASS +c.srai, overflow: PASS +c.srai, -1: PASS +c.andi (0): PASS +c.andi (1): PASS +c.mv: PASS +c.add: PASS +c.and (0): PASS +c.and (-1): PASS +c.or (1): PASS +c.or (A): PASS +c.xor (1): PASS +c.xor (0): PASS +c.sub: PASS +c.addw: PASS +c.addw, overflow: PASS +c.addw, truncate: PASS +c.subw: PASS +c.subw, "overflow": PASS +c.subw, truncate: PASS +Exiting @ tick 141034000 because exiting with last active thread context diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/stats.txt b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/stats.txt new file mode 100644 index 000000000..97577fc45 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/o3-timing/stats.txt @@ -0,0 +1,1051 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000141 +sim_ticks 141034000 +final_tick 141034000 +sim_freq 1000000000000 +host_inst_rate 4027 +host_op_rate 4036 +host_tick_rate 4324346 +host_mem_usage 272260 +host_seconds 32.61 +sim_insts 131348 +sim_ops 131648 +system.voltage_domain.voltage 1 +system.clk_domain.clock 1000 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+system.cpu.toL2Bus.snoop_filter.hit_single_requests 75 +system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 +system.cpu.toL2Bus.snoop_filter.tot_snoops 0 +system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 +system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 +system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 141034000 +system.cpu.toL2Bus.trans_dist::ReadResp 1161 +system.cpu.toL2Bus.trans_dist::WritebackClean 74 +system.cpu.toL2Bus.trans_dist::ReadExReq 216 +system.cpu.toL2Bus.trans_dist::ReadExResp 216 +system.cpu.toL2Bus.trans_dist::ReadCleanReq 911 +system.cpu.toL2Bus.trans_dist::ReadSharedReq 251 +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1895 +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 934 +system.cpu.toL2Bus.pkt_count::total 2829 +system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 62976 +system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 29888 +system.cpu.toL2Bus.pkt_size::total 92864 +system.cpu.toL2Bus.snoops 0 +system.cpu.toL2Bus.snoopTraffic 0 +system.cpu.toL2Bus.snoop_fanout::samples 1378 +system.cpu.toL2Bus.snoop_fanout::mean 0.000725 +system.cpu.toL2Bus.snoop_fanout::stdev 0.026938 +system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% +system.cpu.toL2Bus.snoop_fanout::0 1377 99.92% 99.92% +system.cpu.toL2Bus.snoop_fanout::1 1 0.07% 99.99% +system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 99.99% +system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 99.99% +system.cpu.toL2Bus.snoop_fanout::min_value 0 +system.cpu.toL2Bus.snoop_fanout::max_value 1 +system.cpu.toL2Bus.snoop_fanout::total 1378 +system.cpu.toL2Bus.reqLayer0.occupancy 800000 +system.cpu.toL2Bus.reqLayer0.utilization 0.5 +system.cpu.toL2Bus.respLayer0.occupancy 1365000 +system.cpu.toL2Bus.respLayer0.utilization 0.9 +system.cpu.toL2Bus.respLayer1.occupancy 700500 +system.cpu.toL2Bus.respLayer1.utilization 0.4 +system.membus.snoop_filter.tot_requests 1363 +system.membus.snoop_filter.hit_single_requests 0 +system.membus.snoop_filter.hit_multi_requests 0 +system.membus.snoop_filter.tot_snoops 0 +system.membus.snoop_filter.hit_single_snoops 0 +system.membus.snoop_filter.hit_multi_snoops 0 +system.membus.pwrStateResidencyTicks::UNDEFINED 141034000 +system.membus.trans_dist::ReadResp 1147 +system.membus.trans_dist::ReadExReq 216 +system.membus.trans_dist::ReadExResp 216 +system.membus.trans_dist::ReadSharedReq 1147 +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 2726 +system.membus.pkt_count::total 2726 +system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 87232 +system.membus.pkt_size::total 87232 +system.membus.snoops 0 +system.membus.snoopTraffic 0 +system.membus.snoop_fanout::samples 1363 +system.membus.snoop_fanout::mean 0 +system.membus.snoop_fanout::stdev -0 +system.membus.snoop_fanout::underflows 0 0.00% 0.00% +system.membus.snoop_fanout::0 1363 100.00% 100.00% +system.membus.snoop_fanout::1 0 0.00% 100.00% +system.membus.snoop_fanout::overflows 0 0.00% 100.00% +system.membus.snoop_fanout::min_value 0 +system.membus.snoop_fanout::max_value 0 +system.membus.snoop_fanout::total 1363 +system.membus.reqLayer0.occupancy 1668500 +system.membus.reqLayer0.utilization 1.1 +system.membus.respLayer1.occupancy 7241500 +system.membus.respLayer1.utilization 5.1 + +---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/config.ini b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/config.ini new file mode 100644 index 000000000..8f4fb51ce --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/config.ini @@ -0,0 +1,214 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=System +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain +boot_osflags=a +cache_line_size=64 +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +exit_on_work_items=false +init_param=0 +kernel= +kernel_addr_check=true +load_addr_mask=1099511627775 +load_offset=0 +mem_mode=atomic +mem_ranges= +memories=system.physmem +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +readfile= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +system_port=system.membus.slave[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu] +type=AtomicSimpleCPU +children=dtb interrupts isa itb tracer workload +branchPred=Null +checker=Null +clk_domain=system.cpu_clk_domain +cpu_id=0 +default_p_state=UNDEFINED +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu.dtb +eventq_index=0 +fastmem=false +function_trace=false +function_trace_start=0 +interrupts=system.cpu.interrupts +isa=system.cpu.isa +itb=system.cpu.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +profile=0 +progress_interval=0 +simpoint_start_insts= +simulate_data_stalls=false +simulate_inst_stalls=false +socket_id=0 +switched_out=false +syscallRetryLatency=10000 +system=system +tracer=system.cpu.tracer +wait_for_remote_gdb=false +width=1 +workload=system.cpu.workload +dcache_port=system.membus.slave[2] +icache_port=system.membus.slave[1] + +[system.cpu.dtb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.interrupts] +type=RiscvInterrupts +eventq_index=0 + +[system.cpu.isa] +type=RiscvISA +eventq_index=0 + +[system.cpu.itb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu.workload] +type=Process +cmd=insttest +cwd= +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest +gid=100 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + +[system.membus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=4 +frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=true +power_model=Null +response_latency=2 +snoop_filter=system.membus.snoop_filter +snoop_response_latency=4 +system=system +use_default_range=false +width=16 +master=system.physmem.port +slave=system.system_port system.cpu.icache_port system.cpu.dcache_port + +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + +[system.physmem] +type=SimpleMemory +bandwidth=73.000000 +clk_domain=system.clk_domain +conf_table_reported=true +default_p_state=UNDEFINED +eventq_index=0 +in_addr_map=true +kvm_map=true +latency=30000 +latency_var=0 +null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +range=0:134217727:0:0:0:0 +port=system.membus.master[0] + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.000000 + diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/config.json b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/config.json new file mode 100644 index 000000000..d4ade8c45 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/config.json @@ -0,0 +1,292 @@ +{ + "name": null, + "sim_quantum": 0, + "system": { + "kernel": "", + "mmap_using_noreserve": false, + "kernel_addr_check": true, + "membus": { + "point_of_coherency": true, + "system": "system", + "response_latency": 2, + "cxx_class": "CoherentXBar", + "forward_latency": 4, + "clk_domain": "system.clk_domain", + "width": 16, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "master": { + "peer": [ + "system.physmem.port" + ], + "role": "MASTER" + }, + "type": "CoherentXBar", + "frontend_latency": 3, + "slave": { + "peer": [ + "system.system_port", + "system.cpu.icache_port", + "system.cpu.dcache_port" + ], + "role": "SLAVE" + }, + "p_state_clk_gate_min": 1000, + "snoop_filter": { + "name": "snoop_filter", + "system": "system", + "max_capacity": 8388608, + "eventq_index": 0, + "cxx_class": "SnoopFilter", + "path": "system.membus.snoop_filter", + "type": "SnoopFilter", + "lookup_latency": 1 + }, + "power_model": null, + "path": "system.membus", + "snoop_response_latency": 4, + "name": "membus", + "p_state_clk_gate_bins": 20, + "use_default_range": false + }, + "symbolfile": "", + "readfile": "", + "thermal_model": null, + "cxx_class": "System", + "work_begin_cpu_id_exit": -1, + "load_offset": 0, + "work_begin_exit_count": 0, + "p_state_clk_gate_min": 1000, + "memories": [ + "system.physmem" + ], + "work_begin_ckpt_count": 0, + "clk_domain": { + "name": "clk_domain", + "clock": [ + 1000 + ], + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain", + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, + "mem_ranges": [], + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "sys_clk_domain": "system.clk_domain", + "transition_latency": 100000000, + "eventq_index": 0, + "cxx_class": "DVFSHandler", + "domains": [], + "path": "system.dvfs_handler", + "type": "DVFSHandler" + }, + "work_end_exit_count": 0, + "type": "System", + "voltage_domain": { + "name": "voltage_domain", + "eventq_index": 0, + "voltage": [ + "1.0" + ], + "cxx_class": "VoltageDomain", + "path": "system.voltage_domain", + "type": "VoltageDomain" + }, + "cache_line_size": 64, + "boot_osflags": "a", + "system_port": { + "peer": "system.membus.slave[0]", + "role": "MASTER" + }, + "physmem": { + "range": "0:134217727:0:0:0:0", + "latency": 30000, + "name": "physmem", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "kvm_map": true, + "clk_domain": "system.clk_domain", + "power_model": null, + "latency_var": 0, + "bandwidth": "73.000000", + "conf_table_reported": true, + "cxx_class": "SimpleMemory", + "p_state_clk_gate_max": 1000000000000, + "path": "system.physmem", + "null": false, + "type": "SimpleMemory", + "port": { + "peer": "system.membus.master[0]", + "role": "SLAVE" + }, + "in_addr_map": true + }, + "power_model": null, + "work_cpus_ckpt_count": 0, + "thermal_components": [], + "path": "system", + "cpu_clk_domain": { + "name": "cpu_clk_domain", + "clock": [ + 500 + ], + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain", + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.cpu_clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, + "work_end_ckpt_count": 0, + "mem_mode": "atomic", + "name": "system", + "init_param": 0, + "p_state_clk_gate_bins": 20, + "load_addr_mask": 1099511627775, + "cpu": [ + { + "do_statistics_insts": true, + "numThreads": 1, + "itb": { + "name": "itb", + "eventq_index": 0, + "cxx_class": "RiscvISA::TLB", + "path": "system.cpu.itb", + "type": "RiscvTLB", + "size": 64 + }, + "simulate_data_stalls": false, + "function_trace": false, + "do_checkpoint_insts": true, + "cxx_class": "AtomicSimpleCPU", + "max_loads_all_threads": 0, + "system": "system", + "clk_domain": "system.cpu_clk_domain", + "function_trace_start": 0, + "cpu_id": 0, + "width": 1, + "checker": null, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "do_quiesce": true, + "type": "AtomicSimpleCPU", + "fastmem": false, + "profile": 0, + "icache_port": { + "peer": "system.membus.slave[1]", + "role": "MASTER" + }, + "p_state_clk_gate_bins": 20, + "p_state_clk_gate_min": 1000, + "syscallRetryLatency": 10000, + "interrupts": [ + { + "eventq_index": 0, + "path": "system.cpu.interrupts", + "type": "RiscvInterrupts", + "name": "interrupts", + "cxx_class": "RiscvISA::Interrupts" + } + ], + "dcache_port": { + "peer": "system.membus.slave[2]", + "role": "MASTER" + }, + "socket_id": 0, + "power_model": null, + "max_insts_all_threads": 0, + "path": "system.cpu", + "max_loads_any_thread": 0, + "switched_out": false, + "workload": [ + { + "uid": 100, + "pid": 100, + "kvmInSE": false, + "cxx_class": "Process", + "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest", + "drivers": [], + "system": "system", + "gid": 100, + "eventq_index": 0, + "env": [], + "maxStackSize": 67108864, + "ppid": 0, + "type": "Process", + "cwd": "", + "pgid": 100, + "simpoint": 0, + "euid": 100, + "input": "cin", + "path": "system.cpu.workload", + "name": "workload", + "cmd": [ + "insttest" + ], + "errout": "cerr", + "useArchPT": false, + "egid": 100, + "output": "cout" + } + ], + "name": "cpu", + "wait_for_remote_gdb": false, + "dtb": { + "name": "dtb", + "eventq_index": 0, + "cxx_class": "RiscvISA::TLB", + "path": "system.cpu.dtb", + "type": "RiscvTLB", + "size": 64 + }, + "simpoint_start_insts": [], + "max_insts_any_thread": 0, + "simulate_inst_stalls": false, + "progress_interval": 0, + "branchPred": null, + "isa": [ + { + "eventq_index": 0, + "path": "system.cpu.isa", + "type": "RiscvISA", + "name": "isa", + "cxx_class": "RiscvISA::ISA" + } + ], + "tracer": { + "eventq_index": 0, + "path": "system.cpu.tracer", + "type": "ExeTracer", + "name": "tracer", + "cxx_class": "Trace::ExeTracer" + } + } + ], + "multi_thread": false, + "exit_on_work_items": false, + "work_item_id": -1, + "num_work_ids": 16 + }, + "time_sync_period": 100000000000, + "eventq_index": 0, + "time_sync_spin_threshold": 100000000, + "cxx_class": "Root", + "path": "root", + "time_sync_enable": false, + "type": "Root", + "full_system": false +}
\ No newline at end of file diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/simerr b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/simerr new file mode 100755 index 000000000..d859b3770 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/simerr @@ -0,0 +1,5 @@ +warn: Sockets disabled, not accepting gdb connections +info: Entering event queue @ 0. Starting simulation... +warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings. + Returning '/home/ar4jc/gem5/tests/test-progs/insttest/bin/riscv/linux-rv64c/insttest' +info: Increasing stack size by one page. diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/simout b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/simout new file mode 100755 index 000000000..ac5a037f2 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/simout @@ -0,0 +1,66 @@ +Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic/simout +Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic/simerr +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Jul 13 2017 17:09:45 +gem5 started Jul 13 2017 17:25:07 +gem5 executing on boldrock, pid 6005 +command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64c/simple-atomic + +Global frequency set at 1000000000000 ticks per second +c.lwsp: PASS +c.ldsp: PASS +c.fldsp: PASS +c.swsp: PASS +c.sdsp: PASS +c.fsdsp: PASS +c.lw, positive: PASS +c.lw, negative: PASS +c.ld: PASS +c.fld: PASS +c.sw: PASS +c.sd: PASS +c.fsd: PASS +c.j: PASS +c.jr: PASS +c.jalr: PASS +c.beqz, zero: PASS +c.beqz, not zero: PASS +c.bnez, not zero: PASS +c.bnez, zero: PASS +c.li: PASS +c.li, sign extend: PASS +c.lui: PASS +c.addi: PASS +c.addiw: PASS +c.addiw, overflow: PASS +c.addiw, truncate: PASS +c.addi16sp: PASS +c.addi4spn: PASS +c.slli: PASS +c.slli, overflow: PASS +c.srli: PASS +c.srli, overflow: PASS +c.srli, -1: PASS +c.srai: PASS +c.srai, overflow: PASS +c.srai, -1: PASS +c.andi (0): PASS +c.andi (1): PASS +c.mv: PASS +c.add: PASS +c.and (0): PASS +c.and (-1): PASS +c.or (1): PASS +c.or (A): PASS +c.xor (1): PASS +c.xor (0): PASS +c.sub: PASS +c.addw: PASS +c.addw, overflow: PASS +c.addw, truncate: PASS +c.subw: PASS +c.subw, "overflow": PASS +c.subw, truncate: PASS +Exiting @ tick 76505000 because exiting with last active thread context diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/stats.txt b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/stats.txt new file mode 100644 index 000000000..f30990015 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-atomic/stats.txt @@ -0,0 +1,160 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000076 +sim_ticks 76505000 +final_tick 76505000 +sim_freq 1000000000000 +host_inst_rate 4162 +host_op_rate 4172 +host_tick_rate 2424659 +host_mem_usage 259192 +host_seconds 31.55 +sim_insts 131348 +sim_ops 131648 +system.voltage_domain.voltage 1 +system.clk_domain.clock 1000 +system.physmem.pwrStateResidencyTicks::UNDEFINED 76505000 +system.physmem.bytes_read::cpu.inst 610844 +system.physmem.bytes_read::cpu.data 214914 +system.physmem.bytes_read::total 825758 +system.physmem.bytes_inst_read::cpu.inst 610844 +system.physmem.bytes_inst_read::total 610844 +system.physmem.bytes_written::cpu.data 137066 +system.physmem.bytes_written::total 137066 +system.physmem.num_reads::cpu.inst 152711 +system.physmem.num_reads::cpu.data 31667 +system.physmem.num_reads::total 184378 +system.physmem.num_writes::cpu.data 20181 +system.physmem.num_writes::total 20181 +system.physmem.bw_read::cpu.inst 7984367034 +system.physmem.bw_read::cpu.data 2809149728 +system.physmem.bw_read::total 10793516763 +system.physmem.bw_inst_read::cpu.inst 7984367034 +system.physmem.bw_inst_read::total 7984367034 +system.physmem.bw_write::cpu.data 1791595320 +system.physmem.bw_write::total 1791595320 +system.physmem.bw_total::cpu.inst 7984367034 +system.physmem.bw_total::cpu.data 4600745049 +system.physmem.bw_total::total 12585112084 +system.pwrStateResidencyTicks::UNDEFINED 76505000 +system.cpu_clk_domain.clock 500 +system.cpu.dtb.read_hits 0 +system.cpu.dtb.read_misses 0 +system.cpu.dtb.read_accesses 0 +system.cpu.dtb.write_hits 0 +system.cpu.dtb.write_misses 0 +system.cpu.dtb.write_accesses 0 +system.cpu.dtb.hits 0 +system.cpu.dtb.misses 0 +system.cpu.dtb.accesses 0 +system.cpu.itb.read_hits 0 +system.cpu.itb.read_misses 0 +system.cpu.itb.read_accesses 0 +system.cpu.itb.write_hits 0 +system.cpu.itb.write_misses 0 +system.cpu.itb.write_accesses 0 +system.cpu.itb.hits 0 +system.cpu.itb.misses 0 +system.cpu.itb.accesses 0 +system.cpu.workload.numSyscalls 62 +system.cpu.pwrStateResidencyTicks::ON 76505000 +system.cpu.numCycles 153011 +system.cpu.numWorkItemsStarted 0 +system.cpu.numWorkItemsCompleted 0 +system.cpu.committedInsts 131348 +system.cpu.committedOps 131648 +system.cpu.num_int_alu_accesses 130924 +system.cpu.num_fp_alu_accesses 40 +system.cpu.num_vec_alu_accesses 0 +system.cpu.num_func_calls 7702 +system.cpu.num_conditional_control_insts 21044 +system.cpu.num_int_insts 130924 +system.cpu.num_fp_insts 40 +system.cpu.num_vec_insts 0 +system.cpu.num_int_register_reads 163963 +system.cpu.num_int_register_writes 87008 +system.cpu.num_fp_register_reads 31 +system.cpu.num_fp_register_writes 16 +system.cpu.num_vec_register_reads 0 +system.cpu.num_vec_register_writes 0 +system.cpu.num_mem_refs 51848 +system.cpu.num_load_insts 31667 +system.cpu.num_store_insts 20181 +system.cpu.num_idle_cycles -0 +system.cpu.num_busy_cycles 153011 +system.cpu.not_idle_fraction 1 +system.cpu.idle_fraction -0 +system.cpu.Branches 28746 +system.cpu.op_class::No_OpClass 66 0.05% 0.05% +system.cpu.op_class::IntAlu 79621 60.45% 60.50% +system.cpu.op_class::IntMult 164 0.12% 60.62% +system.cpu.op_class::IntDiv 4 0.00% 60.62% +system.cpu.op_class::FloatAdd 2 0.00% 60.63% +system.cpu.op_class::FloatCmp 3 0.00% 60.63% +system.cpu.op_class::FloatCvt 2 0.00% 60.63% +system.cpu.op_class::FloatMult 0 0.00% 60.63% +system.cpu.op_class::FloatMultAcc 0 0.00% 60.63% +system.cpu.op_class::FloatDiv 0 0.00% 60.63% +system.cpu.op_class::FloatMisc 0 0.00% 60.63% +system.cpu.op_class::FloatSqrt 0 0.00% 60.63% +system.cpu.op_class::SimdAdd 0 0.00% 60.63% +system.cpu.op_class::SimdAddAcc 0 0.00% 60.63% +system.cpu.op_class::SimdAlu 0 0.00% 60.63% +system.cpu.op_class::SimdCmp 0 0.00% 60.63% +system.cpu.op_class::SimdCvt 0 0.00% 60.63% +system.cpu.op_class::SimdMisc 0 0.00% 60.63% +system.cpu.op_class::SimdMult 0 0.00% 60.63% +system.cpu.op_class::SimdMultAcc 0 0.00% 60.63% +system.cpu.op_class::SimdShift 0 0.00% 60.63% +system.cpu.op_class::SimdShiftAcc 0 0.00% 60.63% +system.cpu.op_class::SimdSqrt 0 0.00% 60.63% +system.cpu.op_class::SimdFloatAdd 0 0.00% 60.63% +system.cpu.op_class::SimdFloatAlu 0 0.00% 60.63% +system.cpu.op_class::SimdFloatCmp 0 0.00% 60.63% +system.cpu.op_class::SimdFloatCvt 0 0.00% 60.63% +system.cpu.op_class::SimdFloatDiv 0 0.00% 60.63% +system.cpu.op_class::SimdFloatMisc 0 0.00% 60.63% +system.cpu.op_class::SimdFloatMult 0 0.00% 60.63% +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 60.63% +system.cpu.op_class::SimdFloatSqrt 0 0.00% 60.63% +system.cpu.op_class::MemRead 31653 24.03% 84.66% +system.cpu.op_class::MemWrite 20162 15.30% 99.97% +system.cpu.op_class::FloatMemRead 14 0.01% 99.98% +system.cpu.op_class::FloatMemWrite 19 0.01% 99.99% +system.cpu.op_class::IprAccess 0 0.00% 99.99% +system.cpu.op_class::InstPrefetch 0 0.00% 99.99% +system.cpu.op_class::total 131710 +system.membus.snoop_filter.tot_requests 0 +system.membus.snoop_filter.hit_single_requests 0 +system.membus.snoop_filter.hit_multi_requests 0 +system.membus.snoop_filter.tot_snoops 0 +system.membus.snoop_filter.hit_single_snoops 0 +system.membus.snoop_filter.hit_multi_snoops 0 +system.membus.pwrStateResidencyTicks::UNDEFINED 76505000 +system.membus.trans_dist::ReadReq 184044 +system.membus.trans_dist::ReadResp 184378 +system.membus.trans_dist::WriteReq 19847 +system.membus.trans_dist::WriteResp 19847 +system.membus.trans_dist::LoadLockedReq 334 +system.membus.trans_dist::StoreCondReq 334 +system.membus.trans_dist::StoreCondResp 334 +system.membus.pkt_count_system.cpu.icache_port::system.physmem.port 305422 +system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port 103696 +system.membus.pkt_count::total 409118 +system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 610844 +system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 351980 +system.membus.pkt_size::total 962824 +system.membus.snoops 0 +system.membus.snoopTraffic 0 +system.membus.snoop_fanout::samples 204559 +system.membus.snoop_fanout::mean 0 +system.membus.snoop_fanout::stdev -0 +system.membus.snoop_fanout::underflows 0 0.00% 0.00% +system.membus.snoop_fanout::0 204559 100.00% 100.00% +system.membus.snoop_fanout::1 0 0.00% 100.00% +system.membus.snoop_fanout::overflows 0 0.00% 100.00% +system.membus.snoop_fanout::min_value 0 +system.membus.snoop_fanout::max_value 0 +system.membus.snoop_fanout::total 204559 + +---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/config.ini b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/config.ini new file mode 100644 index 000000000..910501546 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/config.ini @@ -0,0 +1,1268 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000 +time_sync_spin_threshold=100000 + +[system] +type=System +children=clk_domain cpu dvfs_handler mem_ctrls ruby sys_port_proxy voltage_domain +boot_osflags=a +cache_line_size=64 +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +exit_on_work_items=false +init_param=0 +kernel= +kernel_addr_check=true +load_addr_mask=1099511627775 +load_offset=0 +mem_mode=timing +mem_ranges=0:268435455:0:0:0:0 +memories=system.mem_ctrls +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +readfile= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +system_port=system.sys_port_proxy.slave[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu] +type=TimingSimpleCPU +children=clk_domain dtb interrupts isa itb tracer workload +branchPred=Null +checker=Null +clk_domain=system.cpu.clk_domain +cpu_id=0 +default_p_state=UNDEFINED +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu.dtb +eventq_index=0 +function_trace=false +function_trace_start=0 +interrupts=system.cpu.interrupts +isa=system.cpu.isa +itb=system.cpu.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +profile=0 +progress_interval=0 +simpoint_start_insts= +socket_id=0 +switched_out=false +syscallRetryLatency=10000 +system=system +tracer=system.cpu.tracer +wait_for_remote_gdb=false +workload=system.cpu.workload +dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1] +icache_port=system.ruby.l1_cntrl0.sequencer.slave[0] + +[system.cpu.clk_domain] +type=SrcClockDomain +clock=1 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu.dtb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.interrupts] +type=RiscvInterrupts +eventq_index=0 + +[system.cpu.isa] +type=RiscvISA +eventq_index=0 + +[system.cpu.itb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu.workload] +type=Process +cmd=insttest +cwd= +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest +gid=100 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000 + +[system.mem_ctrls] +type=DRAMCtrl +IDD0=0.055000 +IDD02=0.000000 +IDD2N=0.032000 +IDD2N2=0.000000 +IDD2P0=0.000000 +IDD2P02=0.000000 +IDD2P1=0.032000 +IDD2P12=0.000000 +IDD3N=0.038000 +IDD3N2=0.000000 +IDD3P0=0.000000 +IDD3P02=0.000000 +IDD3P1=0.038000 +IDD3P12=0.000000 +IDD4R=0.157000 +IDD4R2=0.000000 +IDD4W=0.125000 +IDD4W2=0.000000 +IDD5=0.235000 +IDD52=0.000000 +IDD6=0.020000 +IDD62=0.000000 +VDD=1.500000 +VDD2=0.000000 +activation_limit=4 +addr_mapping=RoRaBaCoCh +bank_groups_per_rank=0 +banks_per_rank=8 +burst_length=8 +channels=1 +clk_domain=system.clk_domain +conf_table_reported=true +default_p_state=UNDEFINED +device_bus_width=8 +device_rowbuffer_size=1024 +device_size=536870912 +devices_per_rank=8 +dll=true +eventq_index=0 +in_addr_map=true +kvm_map=true +max_accesses_per_row=16 +mem_sched_policy=frfcfs +min_writes_per_switch=16 +null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +page_policy=open_adaptive +power_model=Null +range=0:268435455:5:19:0:0 +ranks_per_channel=2 +read_buffer_size=32 +static_backend_latency=10 +static_frontend_latency=10 +tBURST=5 +tCCD_L=0 +tCK=1 +tCL=14 +tCS=3 +tRAS=35 +tRCD=14 +tREFI=7800 +tRFC=260 +tRP=14 +tRRD=6 +tRRD_L=0 +tRTP=8 +tRTW=3 +tWR=15 +tWTR=8 +tXAW=30 +tXP=6 +tXPDLL=0 +tXS=270 +tXSDLL=0 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 +port=system.ruby.dir_cntrl0.memory + +[system.ruby] +type=RubySystem +children=clk_domain dir_cntrl0 l1_cntrl0 memctrl_clk_domain network +access_backing_store=false +all_instructions=false +block_size_bytes=64 +clk_domain=system.ruby.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +hot_lines=false +memory_size_bits=48 +num_of_sequencers=1 +number_of_virtual_networks=5 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +phys_mem=Null +power_model=Null +randomization=false + +[system.ruby.clk_domain] +type=SrcClockDomain +clock=1 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.ruby.dir_cntrl0] +type=Directory_Controller +children=directory dmaRequestToDir dmaResponseFromDir forwardFromDir requestToDir responseFromDir responseFromMemory +addr_ranges=0:268435455:5:0:0:0 +buffer_size=0 +clk_domain=system.ruby.clk_domain +cluster_id=0 +default_p_state=UNDEFINED +directory=system.ruby.dir_cntrl0.directory +directory_latency=12 +dmaRequestToDir=system.ruby.dir_cntrl0.dmaRequestToDir +dmaResponseFromDir=system.ruby.dir_cntrl0.dmaResponseFromDir +eventq_index=0 +forwardFromDir=system.ruby.dir_cntrl0.forwardFromDir +number_of_TBEs=256 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +recycle_latency=10 +requestToDir=system.ruby.dir_cntrl0.requestToDir +responseFromDir=system.ruby.dir_cntrl0.responseFromDir +responseFromMemory=system.ruby.dir_cntrl0.responseFromMemory +ruby_system=system.ruby +system=system +to_memory_controller_latency=1 +transitions_per_cycle=32 +version=0 +memory=system.mem_ctrls.port + +[system.ruby.dir_cntrl0.directory] +type=RubyDirectoryMemory +addr_ranges=0:268435455:5:0:0:0 +eventq_index=0 + +[system.ruby.dir_cntrl0.dmaRequestToDir] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +slave=system.ruby.network.master[3] + +[system.ruby.dir_cntrl0.dmaResponseFromDir] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +master=system.ruby.network.slave[3] + +[system.ruby.dir_cntrl0.forwardFromDir] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=false +randomization=false +master=system.ruby.network.slave[4] + +[system.ruby.dir_cntrl0.requestToDir] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +slave=system.ruby.network.master[2] + +[system.ruby.dir_cntrl0.responseFromDir] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=false +randomization=false +master=system.ruby.network.slave[2] + +[system.ruby.dir_cntrl0.responseFromMemory] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=false +randomization=false + +[system.ruby.l1_cntrl0] +type=L1Cache_Controller +children=cacheMemory forwardToCache mandatoryQueue requestFromCache responseFromCache responseToCache sequencer +addr_ranges=0:18446744073709551615:0:0:0:0 +buffer_size=0 +cacheMemory=system.ruby.l1_cntrl0.cacheMemory +cache_response_latency=12 +clk_domain=system.cpu.clk_domain +cluster_id=0 +default_p_state=UNDEFINED +eventq_index=0 +forwardToCache=system.ruby.l1_cntrl0.forwardToCache +issue_latency=2 +mandatoryQueue=system.ruby.l1_cntrl0.mandatoryQueue +number_of_TBEs=256 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +recycle_latency=10 +requestFromCache=system.ruby.l1_cntrl0.requestFromCache +responseFromCache=system.ruby.l1_cntrl0.responseFromCache +responseToCache=system.ruby.l1_cntrl0.responseToCache +ruby_system=system.ruby +send_evictions=false +sequencer=system.ruby.l1_cntrl0.sequencer +system=system +transitions_per_cycle=4 +version=0 + +[system.ruby.l1_cntrl0.cacheMemory] +type=RubyCache +children=replacement_policy +assoc=2 +block_size=0 +dataAccessLatency=1 +dataArrayBanks=1 +eventq_index=0 +is_icache=false +replacement_policy=system.ruby.l1_cntrl0.cacheMemory.replacement_policy +resourceStalls=false +ruby_system=system.ruby +size=256 +start_index_bit=6 +tagAccessLatency=1 +tagArrayBanks=1 + +[system.ruby.l1_cntrl0.cacheMemory.replacement_policy] +type=PseudoLRUReplacementPolicy +assoc=2 +block_size=64 +eventq_index=0 +size=256 + +[system.ruby.l1_cntrl0.forwardToCache] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +slave=system.ruby.network.master[0] + +[system.ruby.l1_cntrl0.mandatoryQueue] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=false +randomization=false + +[system.ruby.l1_cntrl0.requestFromCache] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +master=system.ruby.network.slave[0] + +[system.ruby.l1_cntrl0.responseFromCache] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +master=system.ruby.network.slave[1] + +[system.ruby.l1_cntrl0.responseToCache] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false +slave=system.ruby.network.master[1] + +[system.ruby.l1_cntrl0.sequencer] +type=RubySequencer +clk_domain=system.cpu.clk_domain +coreid=99 +dcache=system.ruby.l1_cntrl0.cacheMemory +dcache_hit_latency=1 +deadlock_threshold=500000 +default_p_state=UNDEFINED +eventq_index=0 +garnet_standalone=false +icache=system.ruby.l1_cntrl0.cacheMemory +icache_hit_latency=1 +is_cpu_sequencer=true +max_outstanding_requests=16 +no_retry_on_stall=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +ruby_system=system.ruby +support_data_reqs=true +support_inst_reqs=true +system=system +using_ruby_tester=false +version=0 +slave=system.cpu.icache_port system.cpu.dcache_port + +[system.ruby.memctrl_clk_domain] +type=DerivedClockDomain +clk_divider=3 +clk_domain=system.ruby.clk_domain +eventq_index=0 + +[system.ruby.network] +type=SimpleNetwork +children=ext_links0 ext_links1 int_link_buffers00 int_link_buffers01 int_link_buffers02 int_link_buffers03 int_link_buffers04 int_link_buffers05 int_link_buffers06 int_link_buffers07 int_link_buffers08 int_link_buffers09 int_link_buffers10 int_link_buffers11 int_link_buffers12 int_link_buffers13 int_link_buffers14 int_link_buffers15 int_link_buffers16 int_link_buffers17 int_link_buffers18 int_link_buffers19 int_link_buffers20 int_link_buffers21 int_link_buffers22 int_link_buffers23 int_link_buffers24 int_link_buffers25 int_link_buffers26 int_link_buffers27 int_link_buffers28 int_link_buffers29 int_link_buffers30 int_link_buffers31 int_link_buffers32 int_link_buffers33 int_link_buffers34 int_link_buffers35 int_link_buffers36 int_link_buffers37 int_link_buffers38 int_link_buffers39 int_links0 int_links1 int_links2 int_links3 routers0 routers1 routers2 +adaptive_routing=false +buffer_size=0 +clk_domain=system.ruby.clk_domain +control_msg_size=8 +default_p_state=UNDEFINED +endpoint_bandwidth=1000 +eventq_index=0 +ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1 +int_link_buffers=system.ruby.network.int_link_buffers00 system.ruby.network.int_link_buffers01 system.ruby.network.int_link_buffers02 system.ruby.network.int_link_buffers03 system.ruby.network.int_link_buffers04 system.ruby.network.int_link_buffers05 system.ruby.network.int_link_buffers06 system.ruby.network.int_link_buffers07 system.ruby.network.int_link_buffers08 system.ruby.network.int_link_buffers09 system.ruby.network.int_link_buffers10 system.ruby.network.int_link_buffers11 system.ruby.network.int_link_buffers12 system.ruby.network.int_link_buffers13 system.ruby.network.int_link_buffers14 system.ruby.network.int_link_buffers15 system.ruby.network.int_link_buffers16 system.ruby.network.int_link_buffers17 system.ruby.network.int_link_buffers18 system.ruby.network.int_link_buffers19 system.ruby.network.int_link_buffers20 system.ruby.network.int_link_buffers21 system.ruby.network.int_link_buffers22 system.ruby.network.int_link_buffers23 system.ruby.network.int_link_buffers24 system.ruby.network.int_link_buffers25 system.ruby.network.int_link_buffers26 system.ruby.network.int_link_buffers27 system.ruby.network.int_link_buffers28 system.ruby.network.int_link_buffers29 system.ruby.network.int_link_buffers30 system.ruby.network.int_link_buffers31 system.ruby.network.int_link_buffers32 system.ruby.network.int_link_buffers33 system.ruby.network.int_link_buffers34 system.ruby.network.int_link_buffers35 system.ruby.network.int_link_buffers36 system.ruby.network.int_link_buffers37 system.ruby.network.int_link_buffers38 system.ruby.network.int_link_buffers39 +int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3 +netifs= +number_of_virtual_networks=5 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 +ruby_system=system.ruby +topology=Crossbar +master=system.ruby.l1_cntrl0.forwardToCache.slave system.ruby.l1_cntrl0.responseToCache.slave system.ruby.dir_cntrl0.requestToDir.slave system.ruby.dir_cntrl0.dmaRequestToDir.slave +slave=system.ruby.l1_cntrl0.requestFromCache.master system.ruby.l1_cntrl0.responseFromCache.master system.ruby.dir_cntrl0.responseFromDir.master system.ruby.dir_cntrl0.dmaResponseFromDir.master system.ruby.dir_cntrl0.forwardFromDir.master + +[system.ruby.network.ext_links0] +type=SimpleExtLink +bandwidth_factor=16 +eventq_index=0 +ext_node=system.ruby.l1_cntrl0 +int_node=system.ruby.network.routers0 +latency=1 +link_id=0 +weight=1 + +[system.ruby.network.ext_links1] +type=SimpleExtLink +bandwidth_factor=16 +eventq_index=0 +ext_node=system.ruby.dir_cntrl0 +int_node=system.ruby.network.routers1 +latency=1 +link_id=1 +weight=1 + +[system.ruby.network.int_link_buffers00] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers01] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers02] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers03] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers04] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers05] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers06] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers07] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers08] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers09] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers10] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers11] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers12] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers13] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers14] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers15] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers16] +type=MessageBuffer +buffer_size=0 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+[system.ruby.network.int_link_buffers24] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers25] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers26] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers27] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers28] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers29] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers30] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers31] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers32] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers33] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers34] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers35] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers36] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers37] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers38] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_link_buffers39] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.int_links0] +type=SimpleIntLink +bandwidth_factor=16 +dst_inport= +dst_node=system.ruby.network.routers2 +eventq_index=0 +latency=1 +link_id=2 +src_node=system.ruby.network.routers0 +src_outport= +weight=1 + +[system.ruby.network.int_links1] +type=SimpleIntLink +bandwidth_factor=16 +dst_inport= +dst_node=system.ruby.network.routers2 +eventq_index=0 +latency=1 +link_id=3 +src_node=system.ruby.network.routers1 +src_outport= +weight=1 + +[system.ruby.network.int_links2] +type=SimpleIntLink +bandwidth_factor=16 +dst_inport= +dst_node=system.ruby.network.routers0 +eventq_index=0 +latency=1 +link_id=4 +src_node=system.ruby.network.routers2 +src_outport= +weight=1 + +[system.ruby.network.int_links3] +type=SimpleIntLink +bandwidth_factor=16 +dst_inport= +dst_node=system.ruby.network.routers1 +eventq_index=0 +latency=1 +link_id=5 +src_node=system.ruby.network.routers2 +src_outport= +weight=1 + +[system.ruby.network.routers0] +type=Switch +children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 +clk_domain=system.ruby.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +port_buffers=system.ruby.network.routers0.port_buffers00 system.ruby.network.routers0.port_buffers01 system.ruby.network.routers0.port_buffers02 system.ruby.network.routers0.port_buffers03 system.ruby.network.routers0.port_buffers04 system.ruby.network.routers0.port_buffers05 system.ruby.network.routers0.port_buffers06 system.ruby.network.routers0.port_buffers07 system.ruby.network.routers0.port_buffers08 system.ruby.network.routers0.port_buffers09 system.ruby.network.routers0.port_buffers10 system.ruby.network.routers0.port_buffers11 system.ruby.network.routers0.port_buffers12 system.ruby.network.routers0.port_buffers13 system.ruby.network.routers0.port_buffers14 +power_model=Null +router_id=0 +virt_nets=5 + +[system.ruby.network.routers0.port_buffers00] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers01] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers02] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers03] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers04] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers05] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers06] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers07] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers08] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers09] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers10] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers11] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers12] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers13] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers0.port_buffers14] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1] +type=Switch +children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 +clk_domain=system.ruby.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +port_buffers=system.ruby.network.routers1.port_buffers00 system.ruby.network.routers1.port_buffers01 system.ruby.network.routers1.port_buffers02 system.ruby.network.routers1.port_buffers03 system.ruby.network.routers1.port_buffers04 system.ruby.network.routers1.port_buffers05 system.ruby.network.routers1.port_buffers06 system.ruby.network.routers1.port_buffers07 system.ruby.network.routers1.port_buffers08 system.ruby.network.routers1.port_buffers09 system.ruby.network.routers1.port_buffers10 system.ruby.network.routers1.port_buffers11 system.ruby.network.routers1.port_buffers12 system.ruby.network.routers1.port_buffers13 system.ruby.network.routers1.port_buffers14 +power_model=Null +router_id=1 +virt_nets=5 + +[system.ruby.network.routers1.port_buffers00] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers01] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers02] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers03] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers04] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers05] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers06] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers07] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers08] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers09] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers10] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers11] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers12] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers13] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers1.port_buffers14] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2] +type=Switch +children=port_buffers00 port_buffers01 port_buffers02 port_buffers03 port_buffers04 port_buffers05 port_buffers06 port_buffers07 port_buffers08 port_buffers09 port_buffers10 port_buffers11 port_buffers12 port_buffers13 port_buffers14 port_buffers15 port_buffers16 port_buffers17 port_buffers18 port_buffers19 +clk_domain=system.ruby.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +port_buffers=system.ruby.network.routers2.port_buffers00 system.ruby.network.routers2.port_buffers01 system.ruby.network.routers2.port_buffers02 system.ruby.network.routers2.port_buffers03 system.ruby.network.routers2.port_buffers04 system.ruby.network.routers2.port_buffers05 system.ruby.network.routers2.port_buffers06 system.ruby.network.routers2.port_buffers07 system.ruby.network.routers2.port_buffers08 system.ruby.network.routers2.port_buffers09 system.ruby.network.routers2.port_buffers10 system.ruby.network.routers2.port_buffers11 system.ruby.network.routers2.port_buffers12 system.ruby.network.routers2.port_buffers13 system.ruby.network.routers2.port_buffers14 system.ruby.network.routers2.port_buffers15 system.ruby.network.routers2.port_buffers16 system.ruby.network.routers2.port_buffers17 system.ruby.network.routers2.port_buffers18 system.ruby.network.routers2.port_buffers19 +power_model=Null +router_id=2 +virt_nets=5 + +[system.ruby.network.routers2.port_buffers00] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers01] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers02] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers03] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers04] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers05] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers06] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers07] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers08] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers09] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers10] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers11] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers12] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers13] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers14] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers15] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers16] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers17] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers18] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.ruby.network.routers2.port_buffers19] +type=MessageBuffer +buffer_size=0 +eventq_index=0 +ordered=true +randomization=false + +[system.sys_port_proxy] +type=RubyPortProxy +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +is_cpu_sequencer=true +no_retry_on_stall=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000 +p_state_clk_gate_min=1 +power_model=Null +ruby_system=system.ruby +support_data_reqs=true +support_inst_reqs=true +system=system +using_ruby_tester=false +version=0 +slave=system.system_port + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.000000 + diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/config.json b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/config.json new file mode 100644 index 000000000..cfe0064f6 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/config.json @@ -0,0 +1,1743 @@ +{ + "name": null, + "sim_quantum": 0, + "system": { + "kernel": "", + "mmap_using_noreserve": false, + "kernel_addr_check": true, + "symbolfile": "", + "readfile": "", + "thermal_model": null, + "cxx_class": "System", + "work_begin_cpu_id_exit": -1, + "load_offset": 0, + "work_begin_exit_count": 0, + "p_state_clk_gate_min": 1, + "memories": [ + "system.mem_ctrls" + ], + "work_begin_ckpt_count": 0, + "clk_domain": { + "name": "clk_domain", + "clock": [ + 1 + ], + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain", + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, + "mem_ranges": [ + "0:268435455:0:0:0:0" + ], + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "sys_clk_domain": "system.clk_domain", + "transition_latency": 100000, + "eventq_index": 0, + "cxx_class": "DVFSHandler", + "domains": [], + "path": "system.dvfs_handler", + "type": "DVFSHandler" + }, + "work_end_exit_count": 0, + "type": "System", + "voltage_domain": { + "name": "voltage_domain", + "eventq_index": 0, + "voltage": [ + "1.0" + ], + "cxx_class": "VoltageDomain", + "path": "system.voltage_domain", + "type": "VoltageDomain" + }, + "cache_line_size": 64, + "boot_osflags": "a", + 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"conf_table_reported": true, + "tCK": 1, + "tRAS": 35, + "tRP": 14, + "tBURST": 5, + "path": "system.mem_ctrls", + "tXP": 6, + "tXS": 270, + "addr_mapping": "RoRaBaCoCh", + "IDD3P0": "0.0", + "IDD3P1": "0.038", + "IDD3N": "0.038", + "name": "mem_ctrls", + "tXSDLL": 0, + "device_size": 536870912, + "kvm_map": true, + "dll": true, + "tXAW": 30, + "write_low_thresh_perc": 50, + "range": "0:268435455:5:19:0:0", + "VDD2": "0.0", + "IDD2P12": "0.0", + "p_state_clk_gate_bins": 20, + "tXPDLL": 0, + "IDD4R2": "0.0", + "device_rowbuffer_size": 1024, + "static_backend_latency": 10, + "max_accesses_per_row": 16, + "IDD3P12": "0.0", + "tREFI": 7800 + } + ], + "exit_on_work_items": false, + "work_item_id": -1, + "num_work_ids": 16 + }, + "time_sync_period": 100000000, + "eventq_index": 0, + "time_sync_spin_threshold": 100000, + "cxx_class": "Root", + "path": "root", + "time_sync_enable": false, + "type": "Root", + "full_system": false +}
\ No newline at end of file diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/simerr b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/simerr new file mode 100755 index 000000000..5659097be --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/simerr @@ -0,0 +1,15 @@ +warn: rounding error > tolerance + 1.250000 rounded to 1 +warn: rounding error > tolerance + 1.250000 rounded to 1 +warn: rounding error > tolerance + 1.250000 rounded to 1 +warn: rounding error > tolerance + 1.250000 rounded to 1 +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes) +warn: Sockets disabled, not accepting gdb connections +info: Entering event queue @ 0. Starting simulation... +warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files! +warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings. + Returning '/home/ar4jc/gem5/tests/test-progs/insttest/bin/riscv/linux-rv64c/insttest' +info: Increasing stack size by one page. diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/simout b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/simout new file mode 100755 index 000000000..e14a8baa6 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/simout @@ -0,0 +1,66 @@ +Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby/simout +Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby/simerr +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Jul 13 2017 17:09:45 +gem5 started Jul 13 2017 17:25:07 +gem5 executing on boldrock, pid 6003 +command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby + +Global frequency set at 1000000000 ticks per second +c.lwsp: PASS +c.ldsp: PASS +c.fldsp: PASS +c.swsp: PASS +c.sdsp: PASS +c.fsdsp: PASS +c.lw, positive: PASS +c.lw, negative: PASS +c.ld: PASS +c.fld: PASS +c.sw: PASS +c.sd: PASS +c.fsd: PASS +c.j: PASS +c.jr: PASS +c.jalr: PASS +c.beqz, zero: PASS +c.beqz, not zero: PASS +c.bnez, not zero: PASS +c.bnez, zero: PASS +c.li: PASS +c.li, sign extend: PASS +c.lui: PASS +c.addi: PASS +c.addiw: PASS +c.addiw, overflow: PASS +c.addiw, truncate: PASS +c.addi16sp: PASS +c.addi4spn: PASS +c.slli: PASS +c.slli, overflow: PASS +c.srli: PASS +c.srli, overflow: PASS +c.srli, -1: PASS +c.srai: PASS +c.srai, overflow: PASS +c.srai, -1: PASS +c.andi (0): PASS +c.andi (1): PASS +c.mv: PASS +c.add: PASS +c.and (0): PASS +c.and (-1): PASS +c.or (1): PASS +c.or (A): PASS +c.xor (1): PASS +c.xor (0): PASS +c.sub: PASS +c.addw: PASS +c.addw, overflow: PASS +c.addw, truncate: PASS +c.subw: PASS +c.subw, "overflow": PASS +c.subw, truncate: PASS +Exiting @ tick 2280417 because exiting with last active thread context diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/stats.txt b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/stats.txt new file mode 100644 index 000000000..a27ae5edc --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing-ruby/stats.txt @@ -0,0 +1,739 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.002280 +sim_ticks 2280417 +final_tick 2280417 +sim_freq 1000000000 +host_inst_rate 4031 +host_op_rate 4040 +host_tick_rate 69995 +host_mem_usage 438656 +host_seconds 32.57 +sim_insts 131348 +sim_ops 131648 +system.voltage_domain.voltage 1 +system.clk_domain.clock 1 +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 2280417 +system.mem_ctrls.bytes_read::ruby.dir_cntrl0 2256640 +system.mem_ctrls.bytes_read::total 2256640 +system.mem_ctrls.bytes_written::ruby.dir_cntrl0 2256384 +system.mem_ctrls.bytes_written::total 2256384 +system.mem_ctrls.num_reads::ruby.dir_cntrl0 35260 +system.mem_ctrls.num_reads::total 35260 +system.mem_ctrls.num_writes::ruby.dir_cntrl0 35256 +system.mem_ctrls.num_writes::total 35256 +system.mem_ctrls.bw_read::ruby.dir_cntrl0 989573398 +system.mem_ctrls.bw_read::total 989573398 +system.mem_ctrls.bw_write::ruby.dir_cntrl0 989461138 +system.mem_ctrls.bw_write::total 989461138 +system.mem_ctrls.bw_total::ruby.dir_cntrl0 1979034536 +system.mem_ctrls.bw_total::total 1979034536 +system.mem_ctrls.readReqs 35260 +system.mem_ctrls.writeReqs 35256 +system.mem_ctrls.readBursts 35260 +system.mem_ctrls.writeBursts 35256 +system.mem_ctrls.bytesReadDRAM 1018944 +system.mem_ctrls.bytesReadWrQ 1237696 +system.mem_ctrls.bytesWritten 1071232 +system.mem_ctrls.bytesReadSys 2256640 +system.mem_ctrls.bytesWrittenSys 2256384 +system.mem_ctrls.servicedByWrQ 19339 +system.mem_ctrls.mergedWrBursts 18496 +system.mem_ctrls.neitherReadNorWriteReqs 0 +system.mem_ctrls.perBankRdBursts::0 307 +system.mem_ctrls.perBankRdBursts::1 1030 +system.mem_ctrls.perBankRdBursts::2 505 +system.mem_ctrls.perBankRdBursts::3 1507 +system.mem_ctrls.perBankRdBursts::4 770 +system.mem_ctrls.perBankRdBursts::5 107 +system.mem_ctrls.perBankRdBursts::6 87 +system.mem_ctrls.perBankRdBursts::7 323 +system.mem_ctrls.perBankRdBursts::8 641 +system.mem_ctrls.perBankRdBursts::9 1801 +system.mem_ctrls.perBankRdBursts::10 1103 +system.mem_ctrls.perBankRdBursts::11 2113 +system.mem_ctrls.perBankRdBursts::12 820 +system.mem_ctrls.perBankRdBursts::13 2610 +system.mem_ctrls.perBankRdBursts::14 1268 +system.mem_ctrls.perBankRdBursts::15 929 +system.mem_ctrls.perBankWrBursts::0 311 +system.mem_ctrls.perBankWrBursts::1 1043 +system.mem_ctrls.perBankWrBursts::2 526 +system.mem_ctrls.perBankWrBursts::3 1565 +system.mem_ctrls.perBankWrBursts::4 796 +system.mem_ctrls.perBankWrBursts::5 112 +system.mem_ctrls.perBankWrBursts::6 89 +system.mem_ctrls.perBankWrBursts::7 324 +system.mem_ctrls.perBankWrBursts::8 663 +system.mem_ctrls.perBankWrBursts::9 1954 +system.mem_ctrls.perBankWrBursts::10 1119 +system.mem_ctrls.perBankWrBursts::11 2193 +system.mem_ctrls.perBankWrBursts::12 843 +system.mem_ctrls.perBankWrBursts::13 2940 +system.mem_ctrls.perBankWrBursts::14 1307 +system.mem_ctrls.perBankWrBursts::15 953 +system.mem_ctrls.numRdRetry 0 +system.mem_ctrls.numWrRetry 0 +system.mem_ctrls.totGap 2280337 +system.mem_ctrls.readPktSize::0 0 +system.mem_ctrls.readPktSize::1 0 +system.mem_ctrls.readPktSize::2 0 +system.mem_ctrls.readPktSize::3 0 +system.mem_ctrls.readPktSize::4 0 +system.mem_ctrls.readPktSize::5 0 +system.mem_ctrls.readPktSize::6 35260 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100.00% +system.ruby.delayHist::total 70516 +system.ruby.outstanding_req_hist_seqr::bucket_size 1 +system.ruby.outstanding_req_hist_seqr::max_bucket 9 +system.ruby.outstanding_req_hist_seqr::samples 204560 +system.ruby.outstanding_req_hist_seqr::mean 1 +system.ruby.outstanding_req_hist_seqr::gmean 1 +system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 204560 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.outstanding_req_hist_seqr::total 204560 +system.ruby.latency_hist_seqr::bucket_size 64 +system.ruby.latency_hist_seqr::max_bucket 639 +system.ruby.latency_hist_seqr::samples 204559 +system.ruby.latency_hist_seqr::mean 10.147967 +system.ruby.latency_hist_seqr::gmean 1.945479 +system.ruby.latency_hist_seqr::stdev 24.772910 +system.ruby.latency_hist_seqr | 189107 92.44% 92.44% | 14491 7.08% 99.53% | 645 0.31% 99.84% | 109 0.05% 99.89% | 114 0.05% 99.95% | 73 0.03% 99.99% | 9 0.00% 99.99% | 1 0.00% 99.99% | 0 0.00% 99.99% | 10 0.00% 99.99% +system.ruby.latency_hist_seqr::total 204559 +system.ruby.hit_latency_hist_seqr::bucket_size 1 +system.ruby.hit_latency_hist_seqr::max_bucket 9 +system.ruby.hit_latency_hist_seqr::samples 169299 +system.ruby.hit_latency_hist_seqr::mean 1 +system.ruby.hit_latency_hist_seqr::gmean 1 +system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 169299 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.hit_latency_hist_seqr::total 169299 +system.ruby.miss_latency_hist_seqr::bucket_size 64 +system.ruby.miss_latency_hist_seqr::max_bucket 639 +system.ruby.miss_latency_hist_seqr::samples 35260 +system.ruby.miss_latency_hist_seqr::mean 54.071440 +system.ruby.miss_latency_hist_seqr::gmean 47.508689 +system.ruby.miss_latency_hist_seqr::stdev 35.060895 +system.ruby.miss_latency_hist_seqr | 19808 56.17% 56.17% | 14491 41.09% 97.27% | 645 1.82% 99.10% | 109 0.30% 99.41% | 114 0.32% 99.73% | 73 0.20% 99.94% | 9 0.02% 99.96% | 1 0.00% 99.97% | 0 0.00% 99.97% | 10 0.02% 99.99% +system.ruby.miss_latency_hist_seqr::total 35260 +system.ruby.Directory.incomplete_times_seqr 35259 +system.ruby.dir_cntrl0.forwardFromDir.avg_buf_msgs 0.015460 +system.ruby.dir_cntrl0.forwardFromDir.avg_stall_time 0.999835 +system.ruby.dir_cntrl0.requestToDir.avg_buf_msgs 0.030922 +system.ruby.dir_cntrl0.requestToDir.avg_stall_time 11.751966 +system.ruby.dir_cntrl0.responseFromDir.avg_buf_msgs 0.015462 +system.ruby.dir_cntrl0.responseFromDir.avg_stall_time 0.999969 +system.ruby.dir_cntrl0.responseFromMemory.avg_buf_msgs 0.030922 +system.ruby.dir_cntrl0.responseFromMemory.avg_stall_time 0.999970 +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 2280417 +system.ruby.l1_cntrl0.cacheMemory.demand_hits 169299 +system.ruby.l1_cntrl0.cacheMemory.demand_misses 35260 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5.999805 +system.ruby.network.routers0.port_buffers07.avg_buf_msgs 0.092763 +system.ruby.network.routers0.port_buffers07.avg_stall_time 6.752001 +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 2280417 +system.ruby.network.routers0.percent_links_utilized 7.730603 +system.ruby.network.routers0.msg_count.Control::2 35260 +system.ruby.network.routers0.msg_count.Data::2 35256 +system.ruby.network.routers0.msg_count.Response_Data::4 35260 +system.ruby.network.routers0.msg_count.Writeback_Control::3 35256 +system.ruby.network.routers0.msg_bytes.Control::2 282080 +system.ruby.network.routers0.msg_bytes.Data::2 2538432 +system.ruby.network.routers0.msg_bytes.Response_Data::4 2538720 +system.ruby.network.routers0.msg_bytes.Writeback_Control::3 282048 +system.ruby.network.routers1.port_buffers02.avg_buf_msgs 0.030922 +system.ruby.network.routers1.port_buffers02.avg_stall_time 10.751975 +system.ruby.network.routers1.port_buffers06.avg_buf_msgs 0.015460 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282048 +system.ruby.network.routers2.throttle1.link_utilization 7.730252 +system.ruby.network.routers2.throttle1.msg_count.Control::2 35260 +system.ruby.network.routers2.throttle1.msg_count.Data::2 35256 +system.ruby.network.routers2.throttle1.msg_bytes.Control::2 282080 +system.ruby.network.routers2.throttle1.msg_bytes.Data::2 2538432 +system.ruby.delayVCHist.vnet_1::bucket_size 1 +system.ruby.delayVCHist.vnet_1::max_bucket 9 +system.ruby.delayVCHist.vnet_1::samples 35260 +system.ruby.delayVCHist.vnet_1 | 35260 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.delayVCHist.vnet_1::total 35260 +system.ruby.delayVCHist.vnet_2::bucket_size 1 +system.ruby.delayVCHist.vnet_2::max_bucket 9 +system.ruby.delayVCHist.vnet_2::samples 35256 +system.ruby.delayVCHist.vnet_2 | 35256 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.delayVCHist.vnet_2::total 35256 +system.ruby.LD.latency_hist_seqr::bucket_size 64 +system.ruby.LD.latency_hist_seqr::max_bucket 639 +system.ruby.LD.latency_hist_seqr::samples 31333 +system.ruby.LD.latency_hist_seqr::mean 27.317684 +system.ruby.LD.latency_hist_seqr::gmean 7.086728 +system.ruby.LD.latency_hist_seqr::stdev 34.908453 +system.ruby.LD.latency_hist_seqr | 24762 79.02% 79.02% | 6164 19.67% 98.70% | 288 0.91% 99.62% | 45 0.14% 99.76% | 40 0.12% 99.89% | 30 0.09% 99.98% | 2 0.00% 99.99% | 1 0.00% 99.99% | 0 0.00% 99.99% | 1 0.00% 99.99% +system.ruby.LD.latency_hist_seqr::total 31333 +system.ruby.LD.hit_latency_hist_seqr::bucket_size 1 +system.ruby.LD.hit_latency_hist_seqr::max_bucket 9 +system.ruby.LD.hit_latency_hist_seqr::samples 15338 +system.ruby.LD.hit_latency_hist_seqr::mean 1 +system.ruby.LD.hit_latency_hist_seqr::gmean 1 +system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 15338 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.hit_latency_hist_seqr::total 15338 +system.ruby.LD.miss_latency_hist_seqr::bucket_size 64 +system.ruby.LD.miss_latency_hist_seqr::max_bucket 639 +system.ruby.LD.miss_latency_hist_seqr::samples 15995 +system.ruby.LD.miss_latency_hist_seqr::mean 52.554360 +system.ruby.LD.miss_latency_hist_seqr::gmean 46.340340 +system.ruby.LD.miss_latency_hist_seqr::stdev 32.955680 +system.ruby.LD.miss_latency_hist_seqr | 9424 58.91% 58.91% | 6164 38.53% 97.45% | 288 1.80% 99.25% | 45 0.28% 99.53% | 40 0.25% 99.78% | 30 0.18% 99.97% | 2 0.01% 99.98% | 1 0.00% 99.99% | 0 0.00% 99.99% | 1 0.00% 99.99% +system.ruby.LD.miss_latency_hist_seqr::total 15995 +system.ruby.ST.latency_hist_seqr::bucket_size 64 +system.ruby.ST.latency_hist_seqr::max_bucket 639 +system.ruby.ST.latency_hist_seqr::samples 19847 +system.ruby.ST.latency_hist_seqr::mean 14.612032 +system.ruby.ST.latency_hist_seqr::gmean 3.146952 +system.ruby.ST.latency_hist_seqr::stdev 27.153113 +system.ruby.ST.latency_hist_seqr | 18401 92.71% 92.71% | 1320 6.65% 99.36% | 91 0.45% 99.82% | 15 0.07% 99.89% | 8 0.04% 99.93% | 5 0.02% 99.96% | 2 0.01% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 5 0.02% 99.99% +system.ruby.ST.latency_hist_seqr::total 19847 +system.ruby.ST.hit_latency_hist_seqr::bucket_size 1 +system.ruby.ST.hit_latency_hist_seqr::max_bucket 9 +system.ruby.ST.hit_latency_hist_seqr::samples 13672 +system.ruby.ST.hit_latency_hist_seqr::mean 1 +system.ruby.ST.hit_latency_hist_seqr::gmean 1 +system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 13672 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.hit_latency_hist_seqr::total 13672 +system.ruby.ST.miss_latency_hist_seqr::bucket_size 64 +system.ruby.ST.miss_latency_hist_seqr::max_bucket 639 +system.ruby.ST.miss_latency_hist_seqr::samples 6175 +system.ruby.ST.miss_latency_hist_seqr::mean 44.750283 +system.ruby.ST.miss_latency_hist_seqr::gmean 39.834879 +system.ruby.ST.miss_latency_hist_seqr::stdev 32.422439 +system.ruby.ST.miss_latency_hist_seqr | 4729 76.58% 76.58% | 1320 21.37% 97.95% | 91 1.47% 99.43% | 15 0.24% 99.67% | 8 0.12% 99.80% | 5 0.08% 99.88% | 2 0.03% 99.91% | 0 0.00% 99.91% | 0 0.00% 99.91% | 5 0.08% 99.99% +system.ruby.ST.miss_latency_hist_seqr::total 6175 +system.ruby.IFETCH.latency_hist_seqr::bucket_size 64 +system.ruby.IFETCH.latency_hist_seqr::max_bucket 639 +system.ruby.IFETCH.latency_hist_seqr::samples 152711 +system.ruby.IFETCH.latency_hist_seqr::mean 6.083458 +system.ruby.IFETCH.latency_hist_seqr::gmean 1.405754 +system.ruby.IFETCH.latency_hist_seqr::stdev 19.904521 +system.ruby.IFETCH.latency_hist_seqr | 145279 95.13% 95.13% | 7004 4.58% 99.71% | 266 0.17% 99.89% | 49 0.03% 99.92% | 66 0.04% 99.96% | 38 0.02% 99.99% | 5 0.00% 99.99% | 0 0.00% 99.99% | 0 0.00% 99.99% | 4 0.00% 99.99% +system.ruby.IFETCH.latency_hist_seqr::total 152711 +system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 1 +system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 9 +system.ruby.IFETCH.hit_latency_hist_seqr::samples 139625 +system.ruby.IFETCH.hit_latency_hist_seqr::mean 1 +system.ruby.IFETCH.hit_latency_hist_seqr::gmean 1 +system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 139625 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.hit_latency_hist_seqr::total 139625 +system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 64 +system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 639 +system.ruby.IFETCH.miss_latency_hist_seqr::samples 13086 +system.ruby.IFETCH.miss_latency_hist_seqr::mean 60.322940 +system.ruby.IFETCH.miss_latency_hist_seqr::gmean 53.219754 +system.ruby.IFETCH.miss_latency_hist_seqr::stdev 37.495192 +system.ruby.IFETCH.miss_latency_hist_seqr | 5654 43.20% 43.20% | 7004 53.52% 96.72% | 266 2.03% 98.76% | 49 0.37% 99.13% | 66 0.50% 99.64% | 38 0.29% 99.93% | 5 0.03% 99.96% | 0 0.00% 99.96% | 0 0.00% 99.96% | 4 0.03% 99.99% +system.ruby.IFETCH.miss_latency_hist_seqr::total 13086 +system.ruby.Load_Linked.latency_hist_seqr::bucket_size 8 +system.ruby.Load_Linked.latency_hist_seqr::max_bucket 79 +system.ruby.Load_Linked.latency_hist_seqr::samples 334 +system.ruby.Load_Linked.latency_hist_seqr::mean 1.685628 +system.ruby.Load_Linked.latency_hist_seqr::gmean 1.049320 +system.ruby.Load_Linked.latency_hist_seqr::stdev 6.454272 +system.ruby.Load_Linked.latency_hist_seqr | 330 98.80% 98.80% | 0 0.00% 98.80% | 0 0.00% 98.80% | 0 0.00% 98.80% | 1 0.29% 99.10% | 0 0.00% 99.10% | 0 0.00% 99.10% | 0 0.00% 99.10% | 3 0.89% 99.99% | 0 0.00% 99.99% +system.ruby.Load_Linked.latency_hist_seqr::total 334 +system.ruby.Load_Linked.hit_latency_hist_seqr::bucket_size 1 +system.ruby.Load_Linked.hit_latency_hist_seqr::max_bucket 9 +system.ruby.Load_Linked.hit_latency_hist_seqr::samples 330 +system.ruby.Load_Linked.hit_latency_hist_seqr::mean 1 +system.ruby.Load_Linked.hit_latency_hist_seqr::gmean 1 +system.ruby.Load_Linked.hit_latency_hist_seqr | 0 0.00% 0.00% | 330 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Load_Linked.hit_latency_hist_seqr::total 330 +system.ruby.Load_Linked.miss_latency_hist_seqr::bucket_size 8 +system.ruby.Load_Linked.miss_latency_hist_seqr::max_bucket 79 +system.ruby.Load_Linked.miss_latency_hist_seqr::samples 4 +system.ruby.Load_Linked.miss_latency_hist_seqr::mean 58.250000 +system.ruby.Load_Linked.miss_latency_hist_seqr::gmean 55.698512 +system.ruby.Load_Linked.miss_latency_hist_seqr::stdev 17.500000 +system.ruby.Load_Linked.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 25.00% 25.00% | 0 0.00% 25.00% | 0 0.00% 25.00% | 0 0.00% 25.00% | 3 75.00% 100.00% | 0 0.00% 100.00% +system.ruby.Load_Linked.miss_latency_hist_seqr::total 4 +system.ruby.Store_Conditional.latency_hist_seqr::bucket_size 1 +system.ruby.Store_Conditional.latency_hist_seqr::max_bucket 9 +system.ruby.Store_Conditional.latency_hist_seqr::samples 334 +system.ruby.Store_Conditional.latency_hist_seqr::mean 1 +system.ruby.Store_Conditional.latency_hist_seqr::gmean 1 +system.ruby.Store_Conditional.latency_hist_seqr | 0 0.00% 0.00% | 334 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Store_Conditional.latency_hist_seqr::total 334 +system.ruby.Store_Conditional.hit_latency_hist_seqr::bucket_size 1 +system.ruby.Store_Conditional.hit_latency_hist_seqr::max_bucket 9 +system.ruby.Store_Conditional.hit_latency_hist_seqr::samples 334 +system.ruby.Store_Conditional.hit_latency_hist_seqr::mean 1 +system.ruby.Store_Conditional.hit_latency_hist_seqr::gmean 1 +system.ruby.Store_Conditional.hit_latency_hist_seqr | 0 0.00% 0.00% | 334 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Store_Conditional.hit_latency_hist_seqr::total 334 +system.ruby.Directory.miss_mach_latency_hist_seqr::bucket_size 64 +system.ruby.Directory.miss_mach_latency_hist_seqr::max_bucket 639 +system.ruby.Directory.miss_mach_latency_hist_seqr::samples 35260 +system.ruby.Directory.miss_mach_latency_hist_seqr::mean 54.071440 +system.ruby.Directory.miss_mach_latency_hist_seqr::gmean 47.508689 +system.ruby.Directory.miss_mach_latency_hist_seqr::stdev 35.060895 +system.ruby.Directory.miss_mach_latency_hist_seqr | 19808 56.17% 56.17% | 14491 41.09% 97.27% | 645 1.82% 99.10% | 109 0.30% 99.41% | 114 0.32% 99.73% | 73 0.20% 99.94% | 9 0.02% 99.96% | 1 0.00% 99.97% | 0 0.00% 99.97% | 10 0.02% 99.99% +system.ruby.Directory.miss_mach_latency_hist_seqr::total 35260 +system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::bucket_size 1 +system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::max_bucket 9 +system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::samples 1 +system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::stdev nan +system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Directory.miss_latency_hist_seqr.issue_to_initial_request::total 1 +system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::bucket_size 1 +system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::max_bucket 9 +system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::samples 1 +system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::stdev nan +system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Directory.miss_latency_hist_seqr.initial_to_forward::total 1 +system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::bucket_size 1 +system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::max_bucket 9 +system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::samples 1 +system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::stdev nan +system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Directory.miss_latency_hist_seqr.forward_to_first_response::total 1 +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::bucket_size 8 +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::max_bucket 79 +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::samples 1 +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::mean 75 +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::gmean 74.999999 +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::stdev nan +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% +system.ruby.Directory.miss_latency_hist_seqr.first_response_to_completion::total 1 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::samples 15995 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::mean 52.554360 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::gmean 46.340340 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::stdev 32.955680 +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr | 9424 58.91% 58.91% | 6164 38.53% 97.45% | 288 1.80% 99.25% | 45 0.28% 99.53% | 40 0.25% 99.78% | 30 0.18% 99.97% | 2 0.01% 99.98% | 1 0.00% 99.99% | 0 0.00% 99.99% | 1 0.00% 99.99% +system.ruby.LD.Directory.miss_type_mach_latency_hist_seqr::total 15995 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::samples 6175 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::mean 44.750283 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::gmean 39.834879 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::stdev 32.422439 +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr | 4729 76.58% 76.58% | 1320 21.37% 97.95% | 91 1.47% 99.43% | 15 0.24% 99.67% | 8 0.12% 99.80% | 5 0.08% 99.88% | 2 0.03% 99.91% | 0 0.00% 99.91% | 0 0.00% 99.91% | 5 0.08% 99.99% +system.ruby.ST.Directory.miss_type_mach_latency_hist_seqr::total 6175 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::bucket_size 64 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::max_bucket 639 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::samples 13086 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::mean 60.322940 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::gmean 53.219754 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::stdev 37.495192 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr | 5654 43.20% 43.20% | 7004 53.52% 96.72% | 266 2.03% 98.76% | 49 0.37% 99.13% | 66 0.50% 99.64% | 38 0.29% 99.93% | 5 0.03% 99.96% | 0 0.00% 99.96% | 0 0.00% 99.96% | 4 0.03% 99.99% +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist_seqr::total 13086 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::bucket_size 8 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::max_bucket 79 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::samples 4 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::mean 58.250000 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::gmean 55.698512 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::stdev 17.500000 +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 25.00% 25.00% | 0 0.00% 25.00% | 0 0.00% 25.00% | 0 0.00% 25.00% | 3 75.00% 100.00% | 0 0.00% 100.00% +system.ruby.Load_Linked.Directory.miss_type_mach_latency_hist_seqr::total 4 +system.ruby.Directory_Controller.GETX 35260 0.00% 0.00% +system.ruby.Directory_Controller.PUTX 35256 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Data 35260 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Ack 35256 0.00% 0.00% +system.ruby.Directory_Controller.I.GETX 35260 0.00% 0.00% +system.ruby.Directory_Controller.M.PUTX 35256 0.00% 0.00% +system.ruby.Directory_Controller.IM.Memory_Data 35260 0.00% 0.00% +system.ruby.Directory_Controller.MI.Memory_Ack 35256 0.00% 0.00% +system.ruby.L1Cache_Controller.Load 31333 0.00% 0.00% +system.ruby.L1Cache_Controller.Ifetch 152711 0.00% 0.00% +system.ruby.L1Cache_Controller.Store 20515 0.00% 0.00% +system.ruby.L1Cache_Controller.Data 35260 0.00% 0.00% +system.ruby.L1Cache_Controller.Replacement 35256 0.00% 0.00% +system.ruby.L1Cache_Controller.Writeback_Ack 35256 0.00% 0.00% +system.ruby.L1Cache_Controller.I.Load 15995 0.00% 0.00% +system.ruby.L1Cache_Controller.I.Ifetch 13086 0.00% 0.00% +system.ruby.L1Cache_Controller.I.Store 6179 0.00% 0.00% +system.ruby.L1Cache_Controller.M.Load 15338 0.00% 0.00% +system.ruby.L1Cache_Controller.M.Ifetch 139625 0.00% 0.00% +system.ruby.L1Cache_Controller.M.Store 14336 0.00% 0.00% +system.ruby.L1Cache_Controller.M.Replacement 35256 0.00% 0.00% +system.ruby.L1Cache_Controller.MI.Writeback_Ack 35256 0.00% 0.00% +system.ruby.L1Cache_Controller.IS.Data 29081 0.00% 0.00% +system.ruby.L1Cache_Controller.IM.Data 6179 0.00% 0.00% + +---------- End Simulation Statistics ---------- diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/config.ini b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/config.ini new file mode 100644 index 000000000..8e0e279a2 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/config.ini @@ -0,0 +1,383 @@ +[root] +type=Root +children=system +eventq_index=0 +full_system=false +sim_quantum=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=System +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain +boot_osflags=a +cache_line_size=64 +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +exit_on_work_items=false +init_param=0 +kernel= +kernel_addr_check=true +load_addr_mask=1099511627775 +load_offset=0 +mem_mode=timing +mem_ranges= +memories=system.physmem +mmap_using_noreserve=false +multi_thread=false +num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +readfile= +symbolfile= +thermal_components= +thermal_model=Null +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +system_port=system.membus.slave[0] + +[system.clk_domain] +type=SrcClockDomain +clock=1000 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.cpu] +type=TimingSimpleCPU +children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null +checker=Null +clk_domain=system.cpu_clk_domain +cpu_id=0 +default_p_state=UNDEFINED +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu.dtb +eventq_index=0 +function_trace=false +function_trace_start=0 +interrupts=system.cpu.interrupts +isa=system.cpu.isa +itb=system.cpu.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +profile=0 +progress_interval=0 +simpoint_start_insts= +socket_id=0 +switched_out=false +syscallRetryLatency=10000 +system=system +tracer=system.cpu.tracer +wait_for_remote_gdb=false +workload=system.cpu.workload +dcache_port=system.cpu.dcache.cpu_side +icache_port=system.cpu.icache.cpu_side + +[system.cpu.dcache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=2 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=2 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=2 +sequential_access=false +size=262144 +system=system +tag_latency=2 +tags=system.cpu.dcache.tags +tgts_per_mshr=20 +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu.dcache_port +mem_side=system.cpu.toL2Bus.slave[1] + +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=2 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=262144 +tag_latency=2 + +[system.cpu.dtb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.icache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=2 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=2 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=true +max_miss_count=0 +mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=2 +sequential_access=false +size=131072 +system=system +tag_latency=2 +tags=system.cpu.icache.tags +tgts_per_mshr=20 +write_buffers=8 +writeback_clean=true +cpu_side=system.cpu.icache_port +mem_side=system.cpu.toL2Bus.slave[0] + +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=2 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=131072 +tag_latency=2 + +[system.cpu.interrupts] +type=RiscvInterrupts +eventq_index=0 + +[system.cpu.isa] +type=RiscvISA +eventq_index=0 + +[system.cpu.itb] +type=RiscvTLB +eventq_index=0 +size=64 + +[system.cpu.l2cache] +type=Cache +children=tags +addr_ranges=0:18446744073709551615:0:0:0:0 +assoc=8 +clk_domain=system.cpu_clk_domain +clusivity=mostly_incl +data_latency=20 +default_p_state=UNDEFINED +demand_mshr_reserve=1 +eventq_index=0 +is_read_only=false +max_miss_count=0 +mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +prefetch_on_access=false +prefetcher=Null +response_latency=20 +sequential_access=false +size=2097152 +system=system +tag_latency=20 +tags=system.cpu.l2cache.tags +tgts_per_mshr=12 +write_buffers=8 +writeback_clean=false +cpu_side=system.cpu.toL2Bus.master[0] +mem_side=system.membus.slave[1] + +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +data_latency=20 +default_p_state=UNDEFINED +eventq_index=0 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +sequential_access=false +size=2097152 +tag_latency=20 + +[system.cpu.toL2Bus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=0 +frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=false +power_model=Null +response_latency=1 +snoop_filter=system.cpu.toL2Bus.snoop_filter +snoop_response_latency=1 +system=system +use_default_range=false +width=32 +master=system.cpu.l2cache.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side + +[system.cpu.toL2Bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + +[system.cpu.tracer] +type=ExeTracer +eventq_index=0 + +[system.cpu.workload] +type=Process +cmd=insttest +cwd= +drivers= +egid=100 +env= +errout=cerr +euid=100 +eventq_index=0 +executable=/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest +gid=100 +input=cin +kvmInSE=false +maxStackSize=67108864 +output=cout +pgid=100 +pid=100 +ppid=0 +simpoint=0 +system=system +uid=100 +useArchPT=false + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +domain_id=-1 +eventq_index=0 +init_perf_level=0 +voltage_domain=system.voltage_domain + +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + +[system.membus] +type=CoherentXBar +children=snoop_filter +clk_domain=system.clk_domain +default_p_state=UNDEFINED +eventq_index=0 +forward_latency=4 +frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +point_of_coherency=true +power_model=Null +response_latency=2 +snoop_filter=system.membus.snoop_filter +snoop_response_latency=4 +system=system +use_default_range=false +width=16 +master=system.physmem.port +slave=system.system_port system.cpu.l2cache.mem_side + +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + +[system.physmem] +type=SimpleMemory +bandwidth=73.000000 +clk_domain=system.clk_domain +conf_table_reported=true +default_p_state=UNDEFINED +eventq_index=0 +in_addr_map=true +kvm_map=true +latency=30000 +latency_var=0 +null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null +range=0:134217727:0:0:0:0 +port=system.membus.master[0] + +[system.voltage_domain] +type=VoltageDomain +eventq_index=0 +voltage=1.000000 + diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/config.json b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/config.json new file mode 100644 index 000000000..96b718588 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/config.json @@ -0,0 +1,511 @@ +{ + "name": null, + "sim_quantum": 0, + "system": { + "kernel": "", + "mmap_using_noreserve": false, + "kernel_addr_check": true, + "membus": { + "point_of_coherency": true, + "system": "system", + "response_latency": 2, + "cxx_class": "CoherentXBar", + "forward_latency": 4, + "clk_domain": "system.clk_domain", + "width": 16, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "master": { + "peer": [ + "system.physmem.port" + ], + "role": "MASTER" + }, + "type": "CoherentXBar", + "frontend_latency": 3, + "slave": { + "peer": [ + "system.system_port", + "system.cpu.l2cache.mem_side" + ], + "role": "SLAVE" + }, + "p_state_clk_gate_min": 1000, + "snoop_filter": { + "name": "snoop_filter", + "system": "system", + "max_capacity": 8388608, + "eventq_index": 0, + "cxx_class": "SnoopFilter", + "path": "system.membus.snoop_filter", + "type": "SnoopFilter", + "lookup_latency": 1 + }, + "power_model": null, + "path": "system.membus", + "snoop_response_latency": 4, + "name": "membus", + "p_state_clk_gate_bins": 20, + "use_default_range": false + }, + "symbolfile": "", + "readfile": "", + "thermal_model": null, + "cxx_class": "System", + "work_begin_cpu_id_exit": -1, + "load_offset": 0, + "work_begin_exit_count": 0, + "p_state_clk_gate_min": 1000, + "memories": [ + "system.physmem" + ], + "work_begin_ckpt_count": 0, + "clk_domain": { + "name": "clk_domain", + "clock": [ + 1000 + ], + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain", + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, + "mem_ranges": [], + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "sys_clk_domain": "system.clk_domain", + "transition_latency": 100000000, + "eventq_index": 0, + "cxx_class": "DVFSHandler", + "domains": [], + "path": "system.dvfs_handler", + "type": "DVFSHandler" + }, + "work_end_exit_count": 0, + "type": "System", + "voltage_domain": { + "name": "voltage_domain", + "eventq_index": 0, + "voltage": [ + "1.0" + ], + "cxx_class": "VoltageDomain", + "path": "system.voltage_domain", + "type": "VoltageDomain" + }, + "cache_line_size": 64, + "boot_osflags": "a", + "system_port": { + "peer": "system.membus.slave[0]", + "role": "MASTER" + }, + "physmem": { + "range": "0:134217727:0:0:0:0", + "latency": 30000, + "name": "physmem", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "kvm_map": true, + "clk_domain": "system.clk_domain", + "power_model": null, + "latency_var": 0, + "bandwidth": "73.000000", + "conf_table_reported": true, + "cxx_class": "SimpleMemory", + "p_state_clk_gate_max": 1000000000000, + "path": "system.physmem", + "null": false, + "type": "SimpleMemory", + "port": { + "peer": "system.membus.master[0]", + "role": "SLAVE" + }, + "in_addr_map": true + }, + "power_model": null, + "work_cpus_ckpt_count": 0, + "thermal_components": [], + "path": "system", + "cpu_clk_domain": { + "name": "cpu_clk_domain", + "clock": [ + 500 + ], + "init_perf_level": 0, + "voltage_domain": "system.voltage_domain", + "eventq_index": 0, + "cxx_class": "SrcClockDomain", + "path": "system.cpu_clk_domain", + "type": "SrcClockDomain", + "domain_id": -1 + }, + "work_end_ckpt_count": 0, + "mem_mode": "timing", + "name": "system", + "init_param": 0, + "p_state_clk_gate_bins": 20, + "load_addr_mask": 1099511627775, + "cpu": [ + { + "do_statistics_insts": true, + "numThreads": 1, + "itb": { + "name": "itb", + "eventq_index": 0, + "cxx_class": "RiscvISA::TLB", + "path": "system.cpu.itb", + "type": "RiscvTLB", + "size": 64 + }, + "system": "system", + "icache": { + "cpu_side": { + "peer": "system.cpu.icache_port", + "role": "SLAVE" + }, + "clusivity": "mostly_incl", + "prefetcher": null, + "system": "system", + "write_buffers": 8, + "response_latency": 2, + "cxx_class": "Cache", + "size": 131072, + "type": "Cache", + "clk_domain": "system.cpu_clk_domain", + "max_miss_count": 0, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "mem_side": { + "peer": "system.cpu.toL2Bus.slave[0]", + "role": "MASTER" + }, + "mshrs": 4, + "writeback_clean": true, + "p_state_clk_gate_min": 1000, + "tags": { + "size": 131072, + "tag_latency": 2, + "name": "tags", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "clk_domain": "system.cpu_clk_domain", + "power_model": null, + "sequential_access": false, + "assoc": 2, + "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, + "path": "system.cpu.icache.tags", + "block_size": 64, + "type": "LRU", + "data_latency": 2 + }, + "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, + "power_model": null, + "addr_ranges": [ + "0:18446744073709551615:0:0:0:0" + ], + "is_read_only": true, + "prefetch_on_access": false, + "path": "system.cpu.icache", + "data_latency": 2, + "tag_latency": 2, + "name": "icache", + "p_state_clk_gate_bins": 20, + "sequential_access": false, + "assoc": 2 + }, + "function_trace": false, + "do_checkpoint_insts": true, + "cxx_class": "TimingSimpleCPU", + "max_loads_all_threads": 0, + "clk_domain": "system.cpu_clk_domain", + "function_trace_start": 0, + "cpu_id": 0, + "checker": null, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "toL2Bus": { + "point_of_coherency": false, + "system": "system", + "response_latency": 1, + "cxx_class": "CoherentXBar", + "forward_latency": 0, + "clk_domain": "system.cpu_clk_domain", + "width": 32, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "master": { + "peer": [ + "system.cpu.l2cache.cpu_side" + ], + "role": "MASTER" + }, + "type": "CoherentXBar", + "frontend_latency": 1, + "slave": { + "peer": [ + "system.cpu.icache.mem_side", + "system.cpu.dcache.mem_side" + ], + "role": "SLAVE" + }, + "p_state_clk_gate_min": 1000, + "snoop_filter": { + "name": "snoop_filter", + "system": "system", + "max_capacity": 8388608, + "eventq_index": 0, + "cxx_class": "SnoopFilter", + "path": "system.cpu.toL2Bus.snoop_filter", + "type": "SnoopFilter", + "lookup_latency": 0 + }, + "power_model": null, + "path": "system.cpu.toL2Bus", + "snoop_response_latency": 1, + "name": "toL2Bus", + "p_state_clk_gate_bins": 20, + "use_default_range": false + }, + "do_quiesce": true, + "type": "TimingSimpleCPU", + "profile": 0, + "icache_port": { + "peer": "system.cpu.icache.cpu_side", + "role": "MASTER" + }, + "p_state_clk_gate_bins": 20, + "p_state_clk_gate_min": 1000, + "syscallRetryLatency": 10000, + "interrupts": [ + { + "eventq_index": 0, + "path": "system.cpu.interrupts", + "type": "RiscvInterrupts", + "name": "interrupts", + "cxx_class": "RiscvISA::Interrupts" + } + ], + "dcache_port": { + "peer": "system.cpu.dcache.cpu_side", + "role": "MASTER" + }, + "socket_id": 0, + "power_model": null, + "max_insts_all_threads": 0, + "l2cache": { + "cpu_side": { + "peer": "system.cpu.toL2Bus.master[0]", + "role": "SLAVE" + }, + "clusivity": "mostly_incl", + "prefetcher": null, + "system": "system", + "write_buffers": 8, + "response_latency": 20, + "cxx_class": "Cache", + "size": 2097152, + "type": "Cache", + "clk_domain": "system.cpu_clk_domain", + "max_miss_count": 0, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "mem_side": { + "peer": "system.membus.slave[1]", + "role": "MASTER" + }, + "mshrs": 20, + "writeback_clean": false, + "p_state_clk_gate_min": 1000, + "tags": { + "size": 2097152, + "tag_latency": 20, + "name": "tags", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "clk_domain": "system.cpu_clk_domain", + "power_model": null, + "sequential_access": false, + "assoc": 8, + "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, + "path": "system.cpu.l2cache.tags", + "block_size": 64, + "type": "LRU", + "data_latency": 20 + }, + "tgts_per_mshr": 12, + "demand_mshr_reserve": 1, + "power_model": null, + "addr_ranges": [ + "0:18446744073709551615:0:0:0:0" + ], + "is_read_only": false, + "prefetch_on_access": false, + "path": "system.cpu.l2cache", + "data_latency": 20, + "tag_latency": 20, + "name": "l2cache", + "p_state_clk_gate_bins": 20, + "sequential_access": false, + "assoc": 8 + }, + "path": "system.cpu", + "max_loads_any_thread": 0, + "switched_out": false, + "workload": [ + { + "uid": 100, + "pid": 100, + "kvmInSE": false, + "cxx_class": "Process", + "executable": "/home/ar4jc/gem5/tests/testing/../test-progs/insttest/bin/riscv/linux-rv64c/insttest", + "drivers": [], + "system": "system", + "gid": 100, + "eventq_index": 0, + "env": [], + "maxStackSize": 67108864, + "ppid": 0, + "type": "Process", + "cwd": "", + "pgid": 100, + "simpoint": 0, + "euid": 100, + "input": "cin", + "path": "system.cpu.workload", + "name": "workload", + "cmd": [ + "insttest" + ], + "errout": "cerr", + "useArchPT": false, + "egid": 100, + "output": "cout" + } + ], + "name": "cpu", + "wait_for_remote_gdb": false, + "dtb": { + "name": "dtb", + "eventq_index": 0, + "cxx_class": "RiscvISA::TLB", + "path": "system.cpu.dtb", + "type": "RiscvTLB", + "size": 64 + }, + "simpoint_start_insts": [], + "max_insts_any_thread": 0, + "progress_interval": 0, + "branchPred": null, + "dcache": { + "cpu_side": { + "peer": "system.cpu.dcache_port", + "role": "SLAVE" + }, + "clusivity": "mostly_incl", + "prefetcher": null, + "system": "system", + "write_buffers": 8, + "response_latency": 2, + "cxx_class": "Cache", + "size": 262144, + "type": "Cache", + "clk_domain": "system.cpu_clk_domain", + "max_miss_count": 0, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "mem_side": { + "peer": "system.cpu.toL2Bus.slave[1]", + "role": "MASTER" + }, + "mshrs": 4, + "writeback_clean": false, + "p_state_clk_gate_min": 1000, + "tags": { + "size": 262144, + "tag_latency": 2, + "name": "tags", + "p_state_clk_gate_min": 1000, + "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", + "clk_domain": "system.cpu_clk_domain", + "power_model": null, + "sequential_access": false, + "assoc": 2, + "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, + "path": "system.cpu.dcache.tags", + "block_size": 64, + "type": "LRU", + "data_latency": 2 + }, + "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, + "power_model": null, + "addr_ranges": [ + "0:18446744073709551615:0:0:0:0" + ], + "is_read_only": false, + "prefetch_on_access": false, + "path": "system.cpu.dcache", + "data_latency": 2, + "tag_latency": 2, + "name": "dcache", + "p_state_clk_gate_bins": 20, + "sequential_access": false, + "assoc": 2 + }, + "isa": [ + { + "eventq_index": 0, + "path": "system.cpu.isa", + "type": "RiscvISA", + "name": "isa", + "cxx_class": "RiscvISA::ISA" + } + ], + "tracer": { + "eventq_index": 0, + "path": "system.cpu.tracer", + "type": "ExeTracer", + "name": "tracer", + "cxx_class": "Trace::ExeTracer" + } + } + ], + "multi_thread": false, + "exit_on_work_items": false, + "work_item_id": -1, + "num_work_ids": 16 + }, + "time_sync_period": 100000000000, + "eventq_index": 0, + "time_sync_spin_threshold": 100000000, + "cxx_class": "Root", + "path": "root", + "time_sync_enable": false, + "type": "Root", + "full_system": false +}
\ No newline at end of file diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/simerr b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/simerr new file mode 100755 index 000000000..d859b3770 --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/simerr @@ -0,0 +1,5 @@ +warn: Sockets disabled, not accepting gdb connections +info: Entering event queue @ 0. Starting simulation... +warn: readlink() called on '/proc/self/exe' may yield unexpected results in various settings. + Returning '/home/ar4jc/gem5/tests/test-progs/insttest/bin/riscv/linux-rv64c/insttest' +info: Increasing stack size by one page. diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/simout b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/simout new file mode 100755 index 000000000..8a26586bf --- /dev/null +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64c/simple-timing/simout @@ -0,0 +1,66 @@ +Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing/simout +Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing/simerr +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Jul 13 2017 17:09:45 +gem5 started Jul 13 2017 17:25:07 +gem5 executing on boldrock, pid 6010 +command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64c/simple-timing + +Global frequency set at 1000000000000 ticks per second +c.lwsp: PASS +c.ldsp: PASS +c.fldsp: PASS +c.swsp: PASS +c.sdsp: PASS +c.fsdsp: PASS +c.lw, positive: PASS +c.lw, negative: PASS +c.ld: PASS +c.fld: PASS +c.sw: PASS +c.sd: PASS +c.fsd: PASS +c.j: PASS +c.jr: PASS +c.jalr: PASS +c.beqz, zero: PASS +c.beqz, not zero: PASS +c.bnez, not zero: PASS +c.bnez, zero: PASS +c.li: PASS +c.li, sign extend: PASS +c.lui: PASS +c.addi: PASS +c.addiw: PASS +c.addiw, overflow: PASS +c.addiw, truncate: PASS +c.addi16sp: PASS +c.addi4spn: PASS +c.slli: PASS +c.slli, overflow: PASS +c.srli: PASS +c.srli, overflow: PASS +c.srli, -1: PASS +c.srai: PASS +c.srai, overflow: PASS +c.srai, -1: PASS +c.andi (0): PASS +c.andi (1): PASS +c.mv: PASS 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+system.membus.respLayer1.utilization 2.1 + +---------- End Simulation Statistics ---------- |