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| author | Alec Roelke <ar4jc@virginia.edu> | 2017-07-13 18:00:50 -0400 |
|---|---|---|
| committer | Alec Roelke <ar4jc@virginia.edu> | 2017-07-14 20:31:05 +0000 |
| commit | cc076757e1471b1080df5c5a0130d96b9c35fb2f (patch) | |
| tree | e78ee49f33ffa977e9ad06f9346e2ae9adc0d395 /tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout | |
| parent | 68b6f9c8a1819fdeee737cf369cc6a499b505a6c (diff) | |
| download | gem5-cc076757e1471b1080df5c5a0130d96b9c35fb2f.tar.xz | |
tests: Upate RISC-V binaries and results
This patch updates the binaries and results for hello and insttest
regressions using the compressed extension.
Change-Id: I3d8f2248f490521d3e0dc05c48735cab82b1b04e
Reviewed-on: https://gem5-review.googlesource.com/4042
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout')
| -rwxr-xr-x | tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout b/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout index eb07824f2..ef33d6498 100755 --- a/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout +++ b/tests/quick/se/02.insttest/ref/riscv/linux-rv64m/minor-timing/simout @@ -3,14 +3,12 @@ Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv6 gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Nov 30 2016 14:33:35 -gem5 started Nov 30 2016 16:18:44 -gem5 executing on zizzer, pid 34094 -command line: /z/powerjg/gem5-upstream/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/minor-timing -re /z/powerjg/gem5-upstream/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64m/minor-timing +gem5 compiled Jul 13 2017 17:09:45 +gem5 started Jul 13 2017 17:12:00 +gem5 executing on boldrock, pid 2002 +command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/minor-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64m/minor-timing Global frequency set at 1000000000000 ticks per second -info: Entering event queue @ 0. Starting simulation... -info: Increasing stack size by one page. mul: PASS mul, overflow: PASS mulh: PASS @@ -48,4 +46,4 @@ remuw, truncate: PASS remuw/0: PASS remuw, "overflow": PASS remuw, sign extend: PASS -Exiting @ tick 165091500 because target called exit() +Exiting @ tick 177558500 because exiting with last active thread context |