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authorAndreas Hansson <andreas.hansson@arm.com>2015-11-06 03:26:50 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2015-11-06 03:26:50 -0500
commit324bc9771d1f3129aee87ccb73bcf23ea4c3b60e (patch)
treee5ca02cc181b18d2806e30b99da07d6072724988 /tests/quick/se/02.insttest/ref/sparc/linux/o3-timing
parent337774e192cb9268244d05e828b395060ba1cefb (diff)
downloadgem5-324bc9771d1f3129aee87ccb73bcf23ea4c3b60e.tar.xz
stats: Update stats to match cache changes
Diffstat (limited to 'tests/quick/se/02.insttest/ref/sparc/linux/o3-timing')
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt10
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
index dca96be88..3046b3277 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000027 # Nu
sim_ticks 26944000 # Number of ticks simulated
final_tick 26944000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 95332 # Simulator instruction rate (inst/s)
-host_op_rate 95323 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 177899852 # Simulator tick rate (ticks/s)
-host_mem_usage 294468 # Number of bytes of host memory used
-host_seconds 0.15 # Real time elapsed on the host
+host_inst_rate 77815 # Simulator instruction rate (inst/s)
+host_op_rate 77809 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 145216229 # Simulator tick rate (ticks/s)
+host_mem_usage 294808 # Number of bytes of host memory used
+host_seconds 0.19 # Real time elapsed on the host
sim_insts 14436 # Number of instructions simulated
sim_ops 14436 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts