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| author | Joel Hestness <hestness@cs.wisc.edu> | 2012-09-12 21:42:57 -0500 |
|---|---|---|
| committer | Joel Hestness <hestness@cs.wisc.edu> | 2012-09-12 21:42:57 -0500 |
| commit | 90dd745ff61df35b5144ae40be7e6f16dfce463c (patch) | |
| tree | b2eba7072e7d198e3891f7bb5c2ff9cb96e27f58 /tests/quick/se/02.insttest/ref/sparc/linux | |
| parent | 234fa4cf7ecd16350c1095830d26f94b2bfd3eb9 (diff) | |
| download | gem5-90dd745ff61df35b5144ae40be7e6f16dfce463c.tar.xz | |
se.py Ruby: Connect TLB walker ports
In order to ensure correct functionality of switch CPUs, the TLB walker ports
must be connected to the Ruby system in x86 simulation.
This fixes x86 assertion failures that the TLB walker ports are not connected
during the CPU switch process.
Diffstat (limited to 'tests/quick/se/02.insttest/ref/sparc/linux')
0 files changed, 0 insertions, 0 deletions