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authorNilay Vaish <nilay@cs.wisc.edu>2014-02-16 11:40:34 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2014-02-16 11:40:34 -0600
commit5abbb84f02d4688956a6a042eca2fc0c02f60ae7 (patch)
tree7c3373d68f29cb80e6378e3f0c5b3a6513d73d71 /tests/quick/se/02.insttest/ref/sparc
parent0a44e16948fa7274a7890a2bb8710473122f5eca (diff)
downloadgem5-5abbb84f02d4688956a6a042eca2fc0c02f60ae7.tar.xz
stats: updates due to branch predictor warming
Diffstat (limited to 'tests/quick/se/02.insttest/ref/sparc')
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt11
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini4
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt11
3 files changed, 15 insertions, 11 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
index 9bfbb56dc..fd07afc4b 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000008 # Nu
sim_ticks 7612000 # Number of ticks simulated
final_tick 7612000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 25833 # Simulator instruction rate (inst/s)
-host_op_rate 25832 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 12968653 # Simulator tick rate (ticks/s)
-host_mem_usage 227056 # Number of bytes of host memory used
-host_seconds 0.59 # Real time elapsed on the host
+host_inst_rate 30038 # Simulator instruction rate (inst/s)
+host_op_rate 30037 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 15079139 # Simulator tick rate (ticks/s)
+host_mem_usage 275464 # Number of bytes of host memory used
+host_seconds 0.51 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -64,5 +64,6 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 15225 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.Branches 3363 # Number of branches fetched
---------- End Simulation Statistics ----------
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
index f1f91f6d4..56f586dca 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
@@ -18,6 +18,7 @@ eventq_index=0
init_param=0
kernel=
load_addr_mask=1099511627775
+load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
@@ -42,6 +43,7 @@ voltage_domain=system.voltage_domain
[system.cpu]
type=TimingSimpleCPU
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
+branchPred=Null
checker=Null
clk_domain=system.cpu_clk_domain
cpu_id=0
@@ -217,7 +219,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/dist/test-progs/insttest/bin/sparc/linux/insttest
+executable=tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
max_stack_size=67108864
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
index 6f76b1103..2ac6dbc74 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000041 # Nu
sim_ticks 41368000 # Number of ticks simulated
final_tick 41368000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 30355 # Simulator instruction rate (inst/s)
-host_op_rate 30353 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 82811452 # Simulator tick rate (ticks/s)
-host_mem_usage 236788 # Number of bytes of host memory used
-host_seconds 0.50 # Real time elapsed on the host
+host_inst_rate 29571 # Simulator instruction rate (inst/s)
+host_op_rate 29570 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 80676332 # Simulator tick rate (ticks/s)
+host_mem_usage 284172 # Number of bytes of host memory used
+host_seconds 0.51 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -68,6 +68,7 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 82736 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.Branches 3363 # Number of branches fetched
system.cpu.icache.tags.replacements 0 # number of replacements
system.cpu.icache.tags.tagsinuse 153.782734 # Cycle average of tags in use
system.cpu.icache.tags.total_refs 14928 # Total number of references to valid blocks.