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authorAndreas Hansson <andreas.hansson@arm.com>2016-10-19 06:20:04 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2016-10-19 06:20:04 -0400
commit607c2772915628c2c67c1c5bfdefaa33ae66a06e (patch)
treef8f23fd4012f9a0053d65ac91792a7dc61d6baff /tests/quick/se/02.insttest/ref/sparc
parent71c982ff708cc3adc7c0eccf536fea34c20cc5f0 (diff)
downloadgem5-607c2772915628c2c67c1c5bfdefaa33ae66a06e.tar.xz
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding reads/writes.
Diffstat (limited to 'tests/quick/se/02.insttest/ref/sparc')
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt22
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt14
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt14
3 files changed, 35 insertions, 15 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
index 24ae64048..c02cfcc5d 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000030 # Nu
sim_ticks 29908500 # Number of ticks simulated
final_tick 29908500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 58398 # Simulator instruction rate (inst/s)
-host_op_rate 58392 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 120966219 # Simulator tick rate (ticks/s)
-host_mem_usage 251080 # Number of bytes of host memory used
-host_seconds 0.25 # Real time elapsed on the host
+host_inst_rate 90593 # Simulator instruction rate (inst/s)
+host_op_rate 90586 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 187662601 # Simulator tick rate (ticks/s)
+host_mem_usage 251772 # Number of bytes of host memory used
+host_seconds 0.16 # Real time elapsed on the host
sim_insts 14436 # Number of instructions simulated
sim_ops 14436 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -370,7 +370,9 @@ system.cpu.iq.fu_full::FloatAdd 0 0.00% 53.07% # at
system.cpu.iq.fu_full::FloatCmp 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatCvt 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatMult 0 0.00% 53.07% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatDiv 0 0.00% 53.07% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMisc 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatSqrt 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAdd 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 53.07% # attempts to use FU when none available
@@ -394,6 +396,8 @@ system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 53.07% # at
system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 53.07% # attempts to use FU when none available
system.cpu.iq.fu_full::MemRead 53 17.15% 70.23% # attempts to use FU when none available
system.cpu.iq.fu_full::MemWrite 92 29.77% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemRead 0 0.00% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemWrite 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued
@@ -404,7 +408,9 @@ system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 73.29% # Ty
system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::FloatMult 0 0.00% 73.29% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 73.29% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 73.29% # Type of FU issued
@@ -428,6 +434,8 @@ system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 73.29% # T
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 73.29% # Type of FU issued
system.cpu.iq.FU_type_0::MemRead 4185 16.72% 90.01% # Type of FU issued
system.cpu.iq.FU_type_0::MemWrite 2501 9.99% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemRead 0 0.00% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemWrite 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::total 25032 # Type of FU issued
@@ -520,7 +528,9 @@ system.cpu.commit.op_class_0::FloatAdd 0 0.00% 75.77% # Cl
system.cpu.commit.op_class_0::FloatCmp 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::FloatCvt 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::FloatMult 0 0.00% 75.77% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::FloatDiv 0 0.00% 75.77% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMisc 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAdd 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 75.77% # Class of committed instruction
@@ -544,6 +554,8 @@ system.cpu.commit.op_class_0::SimdFloatMultAcc 0 0.00% 75.77
system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 75.77% # Class of committed instruction
system.cpu.commit.op_class_0::MemRead 2225 14.67% 90.45% # Class of committed instruction
system.cpu.commit.op_class_0::MemWrite 1448 9.55% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemRead 0 0.00% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemWrite 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::total 15162 # Class of committed instruction
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
index 3be5d7ce8..9445c1e91 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000008 # Nu
sim_ticks 7612000 # Number of ticks simulated
final_tick 7612000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 110250 # Simulator instruction rate (inst/s)
-host_op_rate 110244 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 55345027 # Simulator tick rate (ticks/s)
-host_mem_usage 240104 # Number of bytes of host memory used
-host_seconds 0.14 # Real time elapsed on the host
+host_inst_rate 446852 # Simulator instruction rate (inst/s)
+host_op_rate 446721 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 224213840 # Simulator tick rate (ticks/s)
+host_mem_usage 239476 # Number of bytes of host memory used
+host_seconds 0.03 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -73,7 +73,9 @@ system.cpu.op_class::FloatAdd 0 0.00% 75.78% # Cl
system.cpu.op_class::FloatCmp 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatCvt 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatMult 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatMultAcc 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatDiv 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatMisc 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatSqrt 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::SimdAdd 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::SimdAddAcc 0 0.00% 75.78% # Class of executed instruction
@@ -97,6 +99,8 @@ system.cpu.op_class::SimdFloatMultAcc 0 0.00% 75.78% # Cl
system.cpu.op_class::SimdFloatSqrt 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::MemRead 2231 14.67% 90.45% # Class of executed instruction
system.cpu.op_class::MemWrite 1452 9.55% 100.00% # Class of executed instruction
+system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 15207 # Class of executed instruction
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
index 387eea7ee..b91f75440 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000045 # Nu
sim_ticks 44698500 # Number of ticks simulated
final_tick 44698500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 128576 # Simulator instruction rate (inst/s)
-host_op_rate 128568 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 379003891 # Simulator tick rate (ticks/s)
-host_mem_usage 250608 # Number of bytes of host memory used
-host_seconds 0.12 # Real time elapsed on the host
+host_inst_rate 357665 # Simulator instruction rate (inst/s)
+host_op_rate 357507 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1053539740 # Simulator tick rate (ticks/s)
+host_mem_usage 250236 # Number of bytes of host memory used
+host_seconds 0.04 # Real time elapsed on the host
sim_insts 15162 # Number of instructions simulated
sim_ops 15162 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -65,7 +65,9 @@ system.cpu.op_class::FloatAdd 0 0.00% 75.78% # Cl
system.cpu.op_class::FloatCmp 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatCvt 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatMult 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatMultAcc 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatDiv 0 0.00% 75.78% # Class of executed instruction
+system.cpu.op_class::FloatMisc 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::FloatSqrt 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::SimdAdd 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::SimdAddAcc 0 0.00% 75.78% # Class of executed instruction
@@ -89,6 +91,8 @@ system.cpu.op_class::SimdFloatMultAcc 0 0.00% 75.78% # Cl
system.cpu.op_class::SimdFloatSqrt 0 0.00% 75.78% # Class of executed instruction
system.cpu.op_class::MemRead 2231 14.67% 90.45% # Class of executed instruction
system.cpu.op_class::MemWrite 1452 9.55% 100.00% # Class of executed instruction
+system.cpu.op_class::FloatMemRead 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::FloatMemWrite 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 15207 # Class of executed instruction