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authorSteve Reinhardt <steve.reinhardt@amd.com>2015-04-22 20:22:29 -0700
committerSteve Reinhardt <steve.reinhardt@amd.com>2015-04-22 20:22:29 -0700
commit0cf36d94095aedef3c51447243c5a3cc14dd5d56 (patch)
treec0ed9e35fbbc5512f7fedf2947d4ae2702214f8e /tests/quick/se/02.insttest/ref
parenta70a83155bfe4c3877894c29f9dea720beb40f9c (diff)
downloadgem5-0cf36d94095aedef3c51447243c5a3cc14dd5d56.tar.xz
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
Diffstat (limited to 'tests/quick/se/02.insttest/ref')
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini5
-rwxr-xr-xtests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr1
-rwxr-xr-xtests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout9
-rw-r--r--tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt14
4 files changed, 14 insertions, 15 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
index 3156d1d19..38517782e 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
@@ -134,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.branchPred]
-type=BranchPredictor
+type=TournamentBP
BTBEntries=4096
BTBTagSize=16
RASSize=16
@@ -148,7 +148,6 @@ localCtrBits=2
localHistoryTableSize=2048
localPredictorSize=2048
numThreads=1
-predType=tournament
[system.cpu.dcache]
type=BaseCache
@@ -612,7 +611,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/scratch/nilay/GEM5/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
+executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest
gid=100
input=cin
kvmInSE=false
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr
index 1a4f96712..341b479f7 100755
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr
@@ -1 +1,2 @@
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
index f333d0ba2..81d821c63 100755
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
@@ -1,12 +1,11 @@
-Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 21 2014 11:07:38
-gem5 started Jun 21 2014 11:08:19
+gem5 compiled Apr 22 2015 08:08:31
+gem5 started Apr 22 2015 08:14:03
gem5 executing on phenom
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
@@ -20,4 +19,4 @@ LDTX: Passed
LDTW: Passed
STTW: Passed
Done
-Exiting @ tick 26706500 because target called exit()
+Exiting @ tick 27482500 because target called exit()
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
index 6c1b2fdec..eba0d2782 100644
--- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
+++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000027 # Nu
sim_ticks 27482500 # Number of ticks simulated
final_tick 27482500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 86365 # Simulator instruction rate (inst/s)
-host_op_rate 86358 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 164391633 # Simulator tick rate (ticks/s)
-host_mem_usage 291648 # Number of bytes of host memory used
-host_seconds 0.17 # Real time elapsed on the host
+host_inst_rate 15220 # Simulator instruction rate (inst/s)
+host_op_rate 15220 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 28973949 # Simulator tick rate (ticks/s)
+host_mem_usage 223564 # Number of bytes of host memory used
+host_seconds 0.95 # Real time elapsed on the host
sim_insts 14436 # Number of instructions simulated
sim_ops 14436 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -325,7 +325,7 @@ system.cpu.iq.iqInstsAdded 23655 # Nu
system.cpu.iq.iqNonSpecInstsAdded 726 # Number of non-speculative instructions added to the IQ
system.cpu.iq.iqInstsIssued 21924 # Number of instructions issued
system.cpu.iq.iqSquashedInstsIssued 54 # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined 9151 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedInstsExamined 9945 # Number of squashed instructions iterated over during squash; mainly for profiling
system.cpu.iq.iqSquashedOperandsExamined 6501 # Number of squashed operands that are examined and possibly removed from graph
system.cpu.iq.iqSquashedNonSpecRemoved 251 # Number of squashed non-spec instructions that were removed
system.cpu.iq.issued_per_cycle::samples 32422 # Number of insts issued each cycle
@@ -418,7 +418,7 @@ system.cpu.iq.rate 0.398865 # In
system.cpu.iq.fu_busy_cnt 225 # FU busy when requested
system.cpu.iq.fu_busy_rate 0.010263 # FU busy rate (busy events/executed inst)
system.cpu.iq.int_inst_queue_reads 76549 # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes 33558 # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_writes 34352 # Number of integer instruction queue writes
system.cpu.iq.int_inst_queue_wakeup_accesses 20244 # Number of integer instruction queue wakeup accesses
system.cpu.iq.fp_inst_queue_reads 0 # Number of floating instruction queue reads
system.cpu.iq.fp_inst_queue_writes 0 # Number of floating instruction queue writes