diff options
author | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-07-21 17:19:18 +0100 |
---|---|---|
committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2016-07-21 17:19:18 +0100 |
commit | 84f138ba96201431513eb2ae5f847389ac731aa2 (patch) | |
tree | 3aee721699295c85e4e0c2d3d4a6bb27595bfabd /tests/quick/se/02.insttest | |
parent | a288c94387b110112461ff5686fa727a43ddbe9c (diff) | |
download | gem5-84f138ba96201431513eb2ae5f847389ac731aa2.tar.xz |
stats: update references
Diffstat (limited to 'tests/quick/se/02.insttest')
12 files changed, 175 insertions, 31 deletions
diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini index d8bc200f7..50d6b0572 100644 --- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini +++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini @@ -14,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domai boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 @@ -27,6 +28,10 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null readfile= symbolfile= thermal_components= @@ -72,6 +77,7 @@ cpu_id=0 decodeToFetchDelay=1 decodeToRenameDelay=1 decodeWidth=8 +default_p_state=UNDEFINED dispatchWidth=8 do_checkpoint_insts=true do_quiesce=true @@ -108,6 +114,10 @@ numPhysIntRegs=256 numROBEntries=192 numRobs=1 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 renameToDecodeDelay=1 @@ -167,12 +177,17 @@ addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -191,8 +206,13 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=262144 @@ -515,12 +535,17 @@ addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -539,8 +564,13 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=131072 @@ -564,12 +594,17 @@ addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=20 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=20 @@ -588,8 +623,13 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=2097152 @@ -597,10 +637,15 @@ size=2097152 type=CoherentXBar children=snoop_filter clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=false +power_model=Null response_latency=1 snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 @@ -631,7 +676,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/insttest/bin/sparc/linux/insttest +executable=/arm/projectscratch/randd/systems/dist/test-progs/insttest/bin/sparc/linux/insttest gid=100 input=cin kvmInSE=false @@ -663,10 +708,15 @@ transition_latency=100000000 [system.membus] type=CoherentXBar clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=true +power_model=Null response_latency=2 snoop_filter=Null snoop_response_latency=4 @@ -710,6 +760,7 @@ burst_length=8 channels=1 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED device_bus_width=8 device_rowbuffer_size=1024 device_size=536870912 @@ -721,7 +772,11 @@ max_accesses_per_row=16 mem_sched_policy=frfcfs min_writes_per_switch=16 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 page_policy=open_adaptive +power_model=Null range=0:134217727 ranks_per_channel=2 read_buffer_size=32 diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr index 341b479f7..bbcd9d751 100755 --- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr +++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr @@ -1,2 +1,3 @@ warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes) warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout index b244d8ce1..a008eb955 100755 --- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout +++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 13 2016 22:35:56 -gem5 started Mar 13 2016 22:47:13 -gem5 executing on phenom, pid 19871 -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing +gem5 compiled Jul 21 2016 14:30:06 +gem5 started Jul 21 2016 14:30:36 +gem5 executing on e108600-lin, pid 38673 +command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/02.insttest/sparc/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -19,4 +21,4 @@ LDTX: Passed LDTW: Passed STTW: Passed Done -Exiting @ tick 26944000 because target called exit() +Exiting @ tick 28845500 because target called exit() diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt index 4d702e129..a74466584 100644 --- a/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt +++ b/tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000029 # Nu sim_ticks 28845500 # Number of ticks simulated final_tick 28845500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 97927 # Simulator instruction rate (inst/s) -host_op_rate 97921 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 195651101 # Simulator tick rate (ticks/s) -host_mem_usage 293060 # Number of bytes of host memory used -host_seconds 0.15 # Real time elapsed on the host +host_inst_rate 66025 # Simulator instruction rate (inst/s) +host_op_rate 66018 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 131902943 # Simulator tick rate (ticks/s) +host_mem_usage 248796 # Number of bytes of host memory used +host_seconds 0.22 # Real time elapsed on the host sim_insts 14436 # Number of instructions simulated sim_ops 14436 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -913,6 +913,7 @@ system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_s system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 9344 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.pkt_size::total 32704 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.snoops 0 # Total snoops (count) +system.cpu.toL2Bus.snoopTraffic 0 # Total snoop traffic (bytes) system.cpu.toL2Bus.snoop_fanout::samples 513 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::mean 0.003899 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::stdev 0.062378 # Request fanout histogram @@ -940,6 +941,7 @@ system.membus.pkt_count::total 1020 # Pa system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 32576 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 32576 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 0 # Total snoops (count) +system.membus.snoopTraffic 0 # Total snoop traffic (bytes) system.membus.snoop_fanout::samples 511 # Request fanout histogram system.membus.snoop_fanout::mean 0 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini index 4869afcc8..28ad26872 100644 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini @@ -14,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domai boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 @@ -27,6 +28,10 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null readfile= symbolfile= thermal_components= @@ -55,6 +60,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -71,6 +77,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -117,7 +127,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/m5/regression/test-progs/insttest/bin/sparc/linux/insttest +executable=/arm/projectscratch/randd/systems/dist/test-progs/insttest/bin/sparc/linux/insttest gid=100 input=cin kvmInSE=false @@ -149,10 +159,15 @@ transition_latency=100000000 [system.membus] type=CoherentXBar clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=true +power_model=Null response_latency=2 snoop_filter=Null snoop_response_latency=4 @@ -167,11 +182,16 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED eventq_index=0 in_addr_map=true latency=30000 latency_var=0 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null range=0:134217727 port=system.membus.master[0] diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr index 1a4f96712..aadc3d011 100755 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr @@ -1 +1,2 @@ warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout index 4cc5ce56f..da1b76716 100755 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 14:30:54 -gem5 started Jan 21 2016 14:31:26 -gem5 executing on zizzer, pid 8728 -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic -re /z/atgutier/gem5/gem5-commit/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic +gem5 compiled Jul 21 2016 14:30:06 +gem5 started Jul 21 2016 14:30:36 +gem5 executing on e108600-lin, pid 38677 +command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/02.insttest/sparc/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt index f85a288f2..f98d4e626 100644 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000008 # Nu sim_ticks 7612000 # Number of ticks simulated final_tick 7612000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 696198 # Simulator instruction rate (inst/s) -host_op_rate 695914 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 349255842 # Simulator tick rate (ticks/s) -host_mem_usage 279976 # Number of bytes of host memory used -host_seconds 0.02 # Real time elapsed on the host +host_inst_rate 348414 # Simulator instruction rate (inst/s) +host_op_rate 348210 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 174731638 # Simulator tick rate (ticks/s) +host_mem_usage 237012 # Number of bytes of host memory used +host_seconds 0.04 # Real time elapsed on the host sim_insts 15162 # Number of instructions simulated sim_ops 15162 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -114,6 +114,7 @@ system.membus.pkt_size_system.cpu.icache_port::system.physmem.port 60828 system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port 20442 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 81270 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 0 # Total snoops (count) +system.membus.snoopTraffic 0 # Total snoop traffic (bytes) system.membus.snoop_fanout::samples 18880 # Request fanout histogram system.membus.snoop_fanout::mean 0.805456 # Request fanout histogram system.membus.snoop_fanout::stdev 0.395860 # Request fanout histogram diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini index 0632f29e9..76eaa1c9f 100644 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini @@ -14,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domai boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 @@ -27,6 +28,10 @@ memories=system.physmem mmap_using_noreserve=false multi_thread=false num_work_ids=16 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null readfile= symbolfile= thermal_components= @@ -55,6 +60,7 @@ branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 +default_p_state=UNDEFINED do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true @@ -70,6 +76,10 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null profile=0 progress_interval=0 simpoint_start_insts= @@ -88,12 +98,17 @@ addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=false max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -112,8 +127,13 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=262144 @@ -129,12 +149,17 @@ addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=2 is_read_only=true max_miss_count=0 mshrs=4 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=2 @@ -153,8 +178,13 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=2 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=131072 @@ -178,12 +208,17 @@ addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain clusivity=mostly_incl +default_p_state=UNDEFINED demand_mshr_reserve=1 eventq_index=0 hit_latency=20 is_read_only=false max_miss_count=0 mshrs=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null prefetch_on_access=false prefetcher=Null response_latency=20 @@ -202,8 +237,13 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 hit_latency=20 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null sequential_access=false size=2097152 @@ -211,10 +251,15 @@ size=2097152 type=CoherentXBar children=snoop_filter clk_domain=system.cpu_clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=0 frontend_latency=1 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=false +power_model=Null response_latency=1 snoop_filter=system.cpu.toL2Bus.snoop_filter snoop_response_latency=1 @@ -245,7 +290,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/m5/regression/test-progs/insttest/bin/sparc/linux/insttest +executable=/arm/projectscratch/randd/systems/dist/test-progs/insttest/bin/sparc/linux/insttest gid=100 input=cin kvmInSE=false @@ -277,10 +322,15 @@ transition_latency=100000000 [system.membus] type=CoherentXBar clk_domain=system.clk_domain +default_p_state=UNDEFINED eventq_index=0 forward_latency=4 frontend_latency=3 +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 point_of_coherency=true +power_model=Null response_latency=2 snoop_filter=Null snoop_response_latency=4 @@ -295,11 +345,16 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +default_p_state=UNDEFINED eventq_index=0 in_addr_map=true latency=30000 latency_var=0 null=false +p_state_clk_gate_bins=20 +p_state_clk_gate_max=1000000000000 +p_state_clk_gate_min=1000 +power_model=Null range=0:134217727 port=system.membus.master[0] diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr index 1a4f96712..aadc3d011 100755 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr @@ -1 +1,2 @@ warn: Sockets disabled, not accepting gdb connections +warn: ClockedObject: More than one power state change request encountered within the same simulation tick diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout index e9bf8b42d..aa11b3776 100755 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing/simout +Redirecting stderr to build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 21 2016 14:30:54 -gem5 started Jan 21 2016 14:31:27 -gem5 executing on zizzer, pid 8737 -command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing -re /z/atgutier/gem5/gem5-commit/tests/run.py build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing +gem5 compiled Jul 21 2016 14:30:06 +gem5 started Jul 21 2016 14:30:38 +gem5 executing on e108600-lin, pid 38722 +command line: /work/curdun01/gem5-external.hg/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/02.insttest/sparc/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt index 718aa1232..28b8d6695 100644 --- a/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000044 # Nu sim_ticks 44282500 # Number of ticks simulated final_tick 44282500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 533053 # Simulator instruction rate (inst/s) -host_op_rate 532883 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1555927955 # Simulator tick rate (ticks/s) -host_mem_usage 289976 # Number of bytes of host memory used -host_seconds 0.03 # Real time elapsed on the host +host_inst_rate 322672 # Simulator instruction rate (inst/s) +host_op_rate 322568 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 941828647 # Simulator tick rate (ticks/s) +host_mem_usage 247000 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host sim_insts 15162 # Number of instructions simulated sim_ops 15162 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -440,6 +440,7 @@ system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_s system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8832 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.pkt_size::total 26752 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.snoops 0 # Total snoops (count) +system.cpu.toL2Bus.snoopTraffic 0 # Total snoop traffic (bytes) system.cpu.toL2Bus.snoop_fanout::samples 418 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::mean 0.004785 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::stdev 0.069088 # Request fanout histogram @@ -467,6 +468,7 @@ system.membus.pkt_count::total 832 # Pa system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 26624 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 26624 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 0 # Total snoops (count) +system.membus.snoopTraffic 0 # Total snoop traffic (bytes) system.membus.snoop_fanout::samples 416 # Request fanout histogram system.membus.snoop_fanout::mean 0 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram |