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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
| commit | 1d933447fc62de67db938970a8308ac47189fd96 (patch) | |
| tree | df7f389eeae7916c3a58082644d6929bf0e94280 /tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple | |
| parent | 660fbd543f7c84dec81cd17bdb4ff08f954aec77 (diff) | |
| download | gem5-1d933447fc62de67db938970a8308ac47189fd96.tar.xz | |
stats: Update to match ARM ISA changes
Diffstat (limited to 'tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple')
| -rwxr-xr-x | tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/simout | 2 | ||||
| -rw-r--r-- | tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/stats.txt | 12 |
2 files changed, 8 insertions, 6 deletions
diff --git a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/simout b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/simout index e03d9d874..48bc9cc41 100755 --- a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/simout +++ b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/simout @@ -1,3 +1,5 @@ +Redirecting stdout to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple/simout +Redirecting stderr to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-simple/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. diff --git a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/stats.txt b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/stats.txt index 6a638c326..0fe3c4c97 100644 --- a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/stats.txt +++ b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-simple/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000326 # Nu sim_ticks 325849000 # Number of ticks simulated final_tick 325849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 156546 # Simulator instruction rate (inst/s) -host_op_rate 180975 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 10214317316 # Simulator tick rate (ticks/s) -host_mem_usage 647364 # Number of bytes of host memory used -host_seconds 0.03 # Real time elapsed on the host +host_inst_rate 204518 # Simulator instruction rate (inst/s) +host_op_rate 236491 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 13350749795 # Simulator tick rate (ticks/s) +host_mem_usage 689808 # Number of bytes of host memory used +host_seconds 0.02 # Real time elapsed on the host sim_insts 4988 # Number of instructions simulated sim_ops 5770 # Number of ops (including micro ops) simulated system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts @@ -397,7 +397,7 @@ system.cpu.num_func_calls 215 # nu system.cpu.num_conditional_control_insts 800 # number of instructions that are conditional controls system.cpu.num_int_insts 4977 # number of integer instructions system.cpu.num_fp_insts 16 # number of float instructions -system.cpu.num_int_register_reads 8084 # number of times the integer registers were read +system.cpu.num_int_register_reads 8049 # number of times the integer registers were read system.cpu.num_int_register_writes 2992 # number of times the integer registers were written system.cpu.num_fp_register_reads 16 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written |