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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
commit | 1d933447fc62de67db938970a8308ac47189fd96 (patch) | |
tree | df7f389eeae7916c3a58082644d6929bf0e94280 /tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level | |
parent | 660fbd543f7c84dec81cd17bdb4ff08f954aec77 (diff) | |
download | gem5-1d933447fc62de67db938970a8308ac47189fd96.tar.xz |
stats: Update to match ARM ISA changes
Diffstat (limited to 'tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level')
-rwxr-xr-x | tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/simout | 2 | ||||
-rw-r--r-- | tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/stats.txt | 10 |
2 files changed, 7 insertions, 5 deletions
diff --git a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/simout b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/simout index ba1e40211..27e9cb793 100755 --- a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/simout +++ b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/simout @@ -1,3 +1,5 @@ +Redirecting stdout to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level/simout +Redirecting stderr to build/ARM/tests/opt/quick/se/03.learning-gem5/arm/linux/learning-gem5-p1-two-level/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. diff --git a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/stats.txt b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/stats.txt index 1fca855be..825faee95 100644 --- a/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/stats.txt +++ b/tests/quick/se/03.learning-gem5/ref/arm/linux/learning-gem5-p1-two-level/stats.txt @@ -4,10 +4,10 @@ sim_seconds 0.000050 # Nu sim_ticks 49855000 # Number of ticks simulated final_tick 49855000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 388067 # Simulator instruction rate (inst/s) -host_op_rate 448196 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 3866626926 # Simulator tick rate (ticks/s) -host_mem_usage 651460 # Number of bytes of host memory used +host_inst_rate 372227 # Simulator instruction rate (inst/s) +host_op_rate 430264 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 3715181399 # Simulator tick rate (ticks/s) +host_mem_usage 693900 # Number of bytes of host memory used host_seconds 0.01 # Real time elapsed on the host sim_insts 4988 # Number of instructions simulated sim_ops 5770 # Number of ops (including micro ops) simulated @@ -377,7 +377,7 @@ system.cpu.num_func_calls 215 # nu system.cpu.num_conditional_control_insts 800 # number of instructions that are conditional controls system.cpu.num_int_insts 4977 # number of integer instructions system.cpu.num_fp_insts 16 # number of float instructions -system.cpu.num_int_register_reads 8084 # number of times the integer registers were read +system.cpu.num_int_register_reads 8049 # number of times the integer registers were read system.cpu.num_int_register_writes 2992 # number of times the integer registers were written system.cpu.num_fp_register_reads 16 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written |