diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-11-16 05:08:57 -0600 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-11-16 05:08:57 -0600 |
commit | de489e1997ee6c37aaf6e876e32622f6c648fe95 (patch) | |
tree | 40d4093453491b007167c971ebbb18c8ae0b77fa /tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini | |
parent | 08cec03f8ec3bc427700343a7bd7d216433f93fc (diff) | |
download | gem5-de489e1997ee6c37aaf6e876e32622f6c648fe95.tar.xz |
stats: updates due to recent chagnesets
Diffstat (limited to 'tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini')
-rw-r--r-- | tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini b/tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini index 24aab210d..ef341878b 100644 --- a/tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini +++ b/tests/quick/se/03.learning-gem5/ref/x86/linux/learning-gem5-p1-two-level/config.ini @@ -24,6 +24,7 @@ mem_mode=timing mem_ranges=0:536870911 memories=system.mem_ctrl mmap_using_noreserve=false +multi_thread=false num_work_ids=16 readfile= symbolfile= @@ -95,6 +96,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -111,6 +113,7 @@ system=system tags=system.cpu.dcache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.dcache_port mem_side=system.l2bus.slave[1] @@ -144,6 +147,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -160,6 +164,7 @@ system=system tags=system.cpu.icache.tags tgts_per_mshr=20 write_buffers=8 +writeback_clean=false cpu_side=system.cpu.icache_port mem_side=system.l2bus.slave[0] @@ -240,12 +245,13 @@ transition_latency=100000000 [system.l2bus] type=CoherentXBar +children=snoop_filter clk_domain=system.clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 response_latency=1 -snoop_filter=Null +snoop_filter=system.l2bus.snoop_filter snoop_response_latency=1 system=system use_default_range=false @@ -253,12 +259,20 @@ width=32 master=system.l2cache.cpu_side slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side +[system.l2bus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=0 +max_capacity=8388608 +system=system + [system.l2cache] type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.clk_domain +clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 forward_snoops=true @@ -275,6 +289,7 @@ system=system tags=system.l2cache.tags tgts_per_mshr=12 write_buffers=8 +writeback_clean=false cpu_side=system.l2bus.master[0] mem_side=system.membus.slave[0] |