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authorAndreas Sandberg <andreas.sandberg@arm.com>2016-06-02 14:14:36 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2016-06-02 14:14:36 +0100
commit1d933447fc62de67db938970a8308ac47189fd96 (patch)
treedf7f389eeae7916c3a58082644d6929bf0e94280 /tests/quick/se/10.mcf/ref/arm/linux
parent660fbd543f7c84dec81cd17bdb4ff08f954aec77 (diff)
downloadgem5-1d933447fc62de67db938970a8308ac47189fd96.tar.xz
stats: Update to match ARM ISA changes
Diffstat (limited to 'tests/quick/se/10.mcf/ref/arm/linux')
-rwxr-xr-xtests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout2
-rw-r--r--tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt12
-rwxr-xr-xtests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout2
-rw-r--r--tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt12
4 files changed, 16 insertions, 12 deletions
diff --git a/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout b/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout
index 3e4fd6df8..0868020ea 100755
--- a/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout
+++ b/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/simout
@@ -1,3 +1,5 @@
+Redirecting stdout to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-atomic/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
diff --git a/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt b/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
index edbbb089b..05fda5798 100644
--- a/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.054141 # Nu
sim_ticks 54141000500 # Number of ticks simulated
final_tick 54141000500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 991860 # Simulator instruction rate (inst/s)
-host_op_rate 996799 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 592702245 # Simulator tick rate (ticks/s)
-host_mem_usage 389728 # Number of bytes of host memory used
-host_seconds 91.35 # Real time elapsed on the host
+host_inst_rate 2133242 # Simulator instruction rate (inst/s)
+host_op_rate 2143866 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1274754382 # Simulator tick rate (ticks/s)
+host_mem_usage 434732 # Number of bytes of host memory used
+host_seconds 42.47 # Real time elapsed on the host
sim_insts 90602408 # Number of instructions simulated
sim_ops 91053639 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -164,7 +164,7 @@ system.cpu.num_func_calls 112245 # nu
system.cpu.num_conditional_control_insts 15520157 # number of instructions that are conditional controls
system.cpu.num_int_insts 72326352 # number of integer instructions
system.cpu.num_fp_insts 48 # number of float instructions
-system.cpu.num_int_register_reads 124257699 # number of times the integer registers were read
+system.cpu.num_int_register_reads 124257600 # number of times the integer registers were read
system.cpu.num_int_register_writes 52782988 # number of times the integer registers were written
system.cpu.num_fp_register_reads 54 # number of times the floating registers were read
system.cpu.num_fp_register_writes 30 # number of times the floating registers were written
diff --git a/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout b/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout
index cd6f7e703..6c1776dde 100755
--- a/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout
+++ b/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/simout
@@ -1,3 +1,5 @@
+Redirecting stdout to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-timing/simout
+Redirecting stderr to build/ARM/tests/opt/quick/se/10.mcf/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
diff --git a/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
index 60ec36514..1f4d8614e 100644
--- a/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/quick/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.147149 # Nu
sim_ticks 147148719500 # Number of ticks simulated
final_tick 147148719500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 596574 # Simulator instruction rate (inst/s)
-host_op_rate 599539 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 969178238 # Simulator tick rate (ticks/s)
-host_mem_usage 398700 # Number of bytes of host memory used
-host_seconds 151.83 # Real time elapsed on the host
+host_inst_rate 1356153 # Simulator instruction rate (inst/s)
+host_op_rate 1362892 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 2203169070 # Simulator tick rate (ticks/s)
+host_mem_usage 444740 # Number of bytes of host memory used
+host_seconds 66.79 # Real time elapsed on the host
sim_insts 90576862 # Number of instructions simulated
sim_ops 91026991 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -158,7 +158,7 @@ system.cpu.num_func_calls 112245 # nu
system.cpu.num_conditional_control_insts 15520157 # number of instructions that are conditional controls
system.cpu.num_int_insts 72326352 # number of integer instructions
system.cpu.num_fp_insts 48 # number of float instructions
-system.cpu.num_int_register_reads 124237033 # number of times the integer registers were read
+system.cpu.num_int_register_reads 124236934 # number of times the integer registers were read
system.cpu.num_int_register_writes 52782988 # number of times the integer registers were written
system.cpu.num_fp_register_reads 54 # number of times the floating registers were read
system.cpu.num_fp_register_writes 30 # number of times the floating registers were written