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authorAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:51 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-06-27 05:49:51 -0400
commit5a15909bac241dc795c691d49c4e2c68cab745f4 (patch)
treed0ae694e320c725ed8116943c7179516567279f3 /tests/quick/se/20.eio-short
parentac515d7a9b131ffc9e128bd209fcddb2f383808b (diff)
downloadgem5-5a15909bac241dc795c691d49c4e2c68cab745f4.tar.xz
stats: Update stats for monitor, cache and bus changes
This patch removes the sparse histogram total from the CommMonitor stats. It also bumps the stats after the unit fixes in the atomic cache access. Lastly, it updates the stats to match the new port ordering. All numbers are the same, and the only thing that changes is which master corresponds to what port index.
Diffstat (limited to 'tests/quick/se/20.eio-short')
-rw-r--r--tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt58
1 files changed, 29 insertions, 29 deletions
diff --git a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
index 21486e70f..a1275a141 100644
--- a/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
+++ b/tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
@@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 1454144 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.replacements 0 # number of replacements
-system.cpu.icache.tagsinuse 265.013024 # Cycle average of tags in use
-system.cpu.icache.total_refs 499617 # Total number of references to valid blocks.
-system.cpu.icache.sampled_refs 403 # Sample count of references to valid blocks.
-system.cpu.icache.avg_refs 1239.744417 # Average number of references to valid blocks.
-system.cpu.icache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.occ_blocks::cpu.inst 265.013024 # Average occupied blocks per requestor
-system.cpu.icache.occ_percent::cpu.inst 0.129401 # Average percentage of cache occupancy
-system.cpu.icache.occ_percent::total 0.129401 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 0 # number of replacements
+system.cpu.icache.tags.tagsinuse 265.013024 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 499617 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 403 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 1239.744417 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 265.013024 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.129401 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.129401 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 499617 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 499617 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 499617 # number of demand (read+write) hits
@@ -175,17 +175,17 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 53000
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 53000 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 53000 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.replacements 0 # number of replacements
-system.cpu.l2cache.tagsinuse 481.542013 # Cycle average of tags in use
-system.cpu.l2cache.total_refs 0 # Total number of references to valid blocks.
-system.cpu.l2cache.sampled_refs 718 # Sample count of references to valid blocks.
-system.cpu.l2cache.avg_refs 0 # Average number of references to valid blocks.
-system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.occ_blocks::cpu.inst 265.019675 # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.data 216.522338 # Average occupied blocks per requestor
-system.cpu.l2cache.occ_percent::cpu.inst 0.008088 # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.data 0.006608 # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::total 0.014695 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.replacements 0 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 481.542013 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 718 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 0 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 265.019675 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 216.522338 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_percent::cpu.inst 0.008088 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::cpu.data 0.006608 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.014695 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_misses::cpu.inst 403 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::cpu.data 315 # number of ReadReq misses
system.cpu.l2cache.ReadReq_misses::total 718 # number of ReadReq misses
@@ -294,15 +294,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.replacements 0 # number of replacements
-system.cpu.dcache.tagsinuse 287.259400 # Cycle average of tags in use
-system.cpu.dcache.total_refs 180321 # Total number of references to valid blocks.
-system.cpu.dcache.sampled_refs 454 # Sample count of references to valid blocks.
-system.cpu.dcache.avg_refs 397.182819 # Average number of references to valid blocks.
-system.cpu.dcache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.occ_blocks::cpu.data 287.259400 # Average occupied blocks per requestor
-system.cpu.dcache.occ_percent::cpu.data 0.070132 # Average percentage of cache occupancy
-system.cpu.dcache.occ_percent::total 0.070132 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 0 # number of replacements
+system.cpu.dcache.tags.tagsinuse 287.259400 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 180321 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 454 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 397.182819 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 287.259400 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.070132 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.070132 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 124120 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 124120 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 56201 # number of WriteReq hits