diff options
author | Steve Reinhardt <stever@gmail.com> | 2016-06-12 20:02:49 -0400 |
---|---|---|
committer | Steve Reinhardt <stever@gmail.com> | 2016-06-12 20:02:49 -0400 |
commit | 54aeb1a187caa23b0bfe13da1872688f74a44061 (patch) | |
tree | c7c915be21b8eab3651d18ef0c81812b1425cc12 /tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt | |
parent | 3724fb15faafaaca54cc7a500df9c1490a387049 (diff) | |
download | gem5-54aeb1a187caa23b0bfe13da1872688f74a44061.tar.xz |
stats: update EIO stats
Diffstat (limited to 'tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt')
-rw-r--r-- | tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt | 36 |
1 files changed, 31 insertions, 5 deletions
diff --git a/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt b/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt index 7e1266fc6..9e3f24bb9 100644 --- a/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt +++ b/tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000250 # Nu sim_ticks 250015500 # Number of ticks simulated final_tick 250015500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1005954 # Simulator instruction rate (inst/s) -host_op_rate 1005938 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 125747952 # Simulator tick rate (ticks/s) -host_mem_usage 245580 # Number of bytes of host memory used -host_seconds 1.99 # Real time elapsed on the host +host_inst_rate 1104001 # Simulator instruction rate (inst/s) +host_op_rate 1103987 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 138004981 # Simulator tick rate (ticks/s) +host_mem_usage 246580 # Number of bytes of host memory used +host_seconds 1.81 # Real time elapsed on the host sim_insts 2000004 # Number of instructions simulated sim_ops 2000004 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu0.inst 25792 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.data 29056 # Number of bytes read from this memory system.physmem.bytes_read::cpu1.inst 25792 # Number of bytes read from this memory @@ -59,6 +60,7 @@ system.physmem.bw_total::cpu2.data 116216795 # To system.physmem.bw_total::cpu3.inst 103161604 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu3.data 116216795 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 877513594 # Total bandwidth to/from this memory (bytes/s) +system.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu0.dtb.fetch_hits 0 # ITB hits system.cpu0.dtb.fetch_misses 0 # ITB misses @@ -93,6 +95,7 @@ system.cpu0.itb.data_misses 0 # DT system.cpu0.itb.data_acv 0 # DTB access violations system.cpu0.itb.data_accesses 0 # DTB accesses system.cpu0.workload.num_syscalls 18 # Number of system calls +system.cpu0.pwrStateResidencyTicks::ON 250015500 # Cumulative time (in ticks) in various power states system.cpu0.numCycles 500032 # number of cpu cycles simulated system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -151,6 +154,7 @@ system.cpu0.op_class::MemWrite 56350 11.27% 100.00% # Cl system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu0.op_class::total 500019 # Class of executed instruction +system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu0.dcache.tags.replacements 61 # number of replacements system.cpu0.dcache.tags.tagsinuse 276.872320 # Cycle average of tags in use system.cpu0.dcache.tags.total_refs 180312 # Total number of references to valid blocks. @@ -167,6 +171,7 @@ system.cpu0.dcache.tags.age_task_id_blocks_1024::2 248 system.cpu0.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id system.cpu0.dcache.tags.tag_accesses 723563 # Number of tag accesses system.cpu0.dcache.tags.data_accesses 723563 # Number of data accesses +system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu0.dcache.ReadReq_hits::cpu0.data 124111 # number of ReadReq hits system.cpu0.dcache.ReadReq_hits::total 124111 # number of ReadReq hits system.cpu0.dcache.WriteReq_hits::cpu0.data 56201 # number of WriteReq hits @@ -207,6 +212,7 @@ system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.dcache.writebacks::writebacks 29 # number of writebacks system.cpu0.dcache.writebacks::total 29 # number of writebacks +system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu0.icache.tags.replacements 152 # number of replacements system.cpu0.icache.tags.tagsinuse 218.086151 # Cycle average of tags in use system.cpu0.icache.tags.total_refs 499556 # Total number of references to valid blocks. @@ -222,6 +228,7 @@ system.cpu0.icache.tags.age_task_id_blocks_1024::2 121 system.cpu0.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id system.cpu0.icache.tags.tag_accesses 500482 # Number of tag accesses system.cpu0.icache.tags.data_accesses 500482 # Number of data accesses +system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu0.icache.ReadReq_hits::cpu0.inst 499556 # number of ReadReq hits system.cpu0.icache.ReadReq_hits::total 499556 # number of ReadReq hits system.cpu0.icache.demand_hits::cpu0.inst 499556 # number of demand (read+write) hits @@ -287,6 +294,7 @@ system.cpu1.itb.data_misses 0 # DT system.cpu1.itb.data_acv 0 # DTB access violations system.cpu1.itb.data_accesses 0 # DTB accesses system.cpu1.workload.num_syscalls 18 # Number of system calls +system.cpu1.pwrStateResidencyTicks::ON 250015500 # Cumulative time (in ticks) in various power states system.cpu1.numCycles 500032 # number of cpu cycles simulated system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -345,6 +353,7 @@ system.cpu1.op_class::MemWrite 56350 11.27% 100.00% # Cl system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu1.op_class::total 500019 # Class of executed instruction +system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu1.dcache.tags.replacements 61 # number of replacements system.cpu1.dcache.tags.tagsinuse 276.872320 # Cycle average of tags in use system.cpu1.dcache.tags.total_refs 180312 # Total number of references to valid blocks. @@ -361,6 +370,7 @@ system.cpu1.dcache.tags.age_task_id_blocks_1024::2 248 system.cpu1.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id system.cpu1.dcache.tags.tag_accesses 723563 # Number of tag accesses system.cpu1.dcache.tags.data_accesses 723563 # Number of data accesses +system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu1.dcache.ReadReq_hits::cpu1.data 124111 # number of ReadReq hits system.cpu1.dcache.ReadReq_hits::total 124111 # number of ReadReq hits system.cpu1.dcache.WriteReq_hits::cpu1.data 56201 # number of WriteReq hits @@ -401,6 +411,7 @@ system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.dcache.writebacks::writebacks 29 # number of writebacks system.cpu1.dcache.writebacks::total 29 # number of writebacks +system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu1.icache.tags.replacements 152 # number of replacements system.cpu1.icache.tags.tagsinuse 218.086151 # Cycle average of tags in use system.cpu1.icache.tags.total_refs 499556 # Total number of references to valid blocks. @@ -416,6 +427,7 @@ system.cpu1.icache.tags.age_task_id_blocks_1024::2 121 system.cpu1.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id system.cpu1.icache.tags.tag_accesses 500482 # Number of tag accesses system.cpu1.icache.tags.data_accesses 500482 # Number of data accesses +system.cpu1.icache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu1.icache.ReadReq_hits::cpu1.inst 499556 # number of ReadReq hits system.cpu1.icache.ReadReq_hits::total 499556 # number of ReadReq hits system.cpu1.icache.demand_hits::cpu1.inst 499556 # number of demand (read+write) hits @@ -481,6 +493,7 @@ system.cpu2.itb.data_misses 0 # DT system.cpu2.itb.data_acv 0 # DTB access violations system.cpu2.itb.data_accesses 0 # DTB accesses system.cpu2.workload.num_syscalls 18 # Number of system calls +system.cpu2.pwrStateResidencyTicks::ON 250015500 # Cumulative time (in ticks) in various power states system.cpu2.numCycles 500032 # number of cpu cycles simulated system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -539,6 +552,7 @@ system.cpu2.op_class::MemWrite 56350 11.27% 100.00% # Cl system.cpu2.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu2.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu2.op_class::total 500019 # Class of executed instruction +system.cpu2.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu2.dcache.tags.replacements 61 # number of replacements system.cpu2.dcache.tags.tagsinuse 276.872320 # Cycle average of tags in use system.cpu2.dcache.tags.total_refs 180312 # Total number of references to valid blocks. @@ -555,6 +569,7 @@ system.cpu2.dcache.tags.age_task_id_blocks_1024::2 248 system.cpu2.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id system.cpu2.dcache.tags.tag_accesses 723563 # Number of tag accesses system.cpu2.dcache.tags.data_accesses 723563 # Number of data accesses +system.cpu2.dcache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu2.dcache.ReadReq_hits::cpu2.data 124111 # number of ReadReq hits system.cpu2.dcache.ReadReq_hits::total 124111 # number of ReadReq hits system.cpu2.dcache.WriteReq_hits::cpu2.data 56201 # number of WriteReq hits @@ -595,6 +610,7 @@ system.cpu2.dcache.avg_blocked_cycles::no_mshrs nan system.cpu2.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu2.dcache.writebacks::writebacks 29 # number of writebacks system.cpu2.dcache.writebacks::total 29 # number of writebacks +system.cpu2.icache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu2.icache.tags.replacements 152 # number of replacements system.cpu2.icache.tags.tagsinuse 218.086151 # Cycle average of tags in use system.cpu2.icache.tags.total_refs 499556 # Total number of references to valid blocks. @@ -610,6 +626,7 @@ system.cpu2.icache.tags.age_task_id_blocks_1024::2 121 system.cpu2.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id system.cpu2.icache.tags.tag_accesses 500482 # Number of tag accesses system.cpu2.icache.tags.data_accesses 500482 # Number of data accesses +system.cpu2.icache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu2.icache.ReadReq_hits::cpu2.inst 499556 # number of ReadReq hits system.cpu2.icache.ReadReq_hits::total 499556 # number of ReadReq hits system.cpu2.icache.demand_hits::cpu2.inst 499556 # number of demand (read+write) hits @@ -675,6 +692,7 @@ system.cpu3.itb.data_misses 0 # DT system.cpu3.itb.data_acv 0 # DTB access violations system.cpu3.itb.data_accesses 0 # DTB accesses system.cpu3.workload.num_syscalls 18 # Number of system calls +system.cpu3.pwrStateResidencyTicks::ON 250015500 # Cumulative time (in ticks) in various power states system.cpu3.numCycles 500032 # number of cpu cycles simulated system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -733,6 +751,7 @@ system.cpu3.op_class::MemWrite 56350 11.27% 100.00% # Cl system.cpu3.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu3.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu3.op_class::total 500019 # Class of executed instruction +system.cpu3.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu3.dcache.tags.replacements 61 # number of replacements system.cpu3.dcache.tags.tagsinuse 276.872320 # Cycle average of tags in use system.cpu3.dcache.tags.total_refs 180312 # Total number of references to valid blocks. @@ -749,6 +768,7 @@ system.cpu3.dcache.tags.age_task_id_blocks_1024::2 248 system.cpu3.dcache.tags.occ_task_id_percent::1024 0.785156 # Percentage of cache occupancy per task id system.cpu3.dcache.tags.tag_accesses 723563 # Number of tag accesses system.cpu3.dcache.tags.data_accesses 723563 # Number of data accesses +system.cpu3.dcache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu3.dcache.ReadReq_hits::cpu3.data 124111 # number of ReadReq hits system.cpu3.dcache.ReadReq_hits::total 124111 # number of ReadReq hits system.cpu3.dcache.WriteReq_hits::cpu3.data 56201 # number of WriteReq hits @@ -789,6 +809,7 @@ system.cpu3.dcache.avg_blocked_cycles::no_mshrs nan system.cpu3.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu3.dcache.writebacks::writebacks 29 # number of writebacks system.cpu3.dcache.writebacks::total 29 # number of writebacks +system.cpu3.icache.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu3.icache.tags.replacements 152 # number of replacements system.cpu3.icache.tags.tagsinuse 218.086151 # Cycle average of tags in use system.cpu3.icache.tags.total_refs 499556 # Total number of references to valid blocks. @@ -804,6 +825,7 @@ system.cpu3.icache.tags.age_task_id_blocks_1024::2 121 system.cpu3.icache.tags.occ_task_id_percent::1024 0.607422 # Percentage of cache occupancy per task id system.cpu3.icache.tags.tag_accesses 500482 # Number of tag accesses system.cpu3.icache.tags.data_accesses 500482 # Number of data accesses +system.cpu3.icache.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.cpu3.icache.ReadReq_hits::cpu3.inst 499556 # number of ReadReq hits system.cpu3.icache.ReadReq_hits::total 499556 # number of ReadReq hits system.cpu3.icache.demand_hits::cpu3.inst 499556 # number of demand (read+write) hits @@ -836,6 +858,7 @@ system.cpu3.icache.avg_blocked_cycles::no_mshrs nan system.cpu3.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu3.icache.writebacks::writebacks 152 # number of writebacks system.cpu3.icache.writebacks::total 152 # number of writebacks +system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.l2c.tags.replacements 0 # number of replacements system.l2c.tags.tagsinuse 1962.780232 # Cycle average of tags in use system.l2c.tags.total_refs 1068 # Total number of references to valid blocks. @@ -868,6 +891,7 @@ system.l2c.tags.age_task_id_blocks_1024::2 1836 # system.l2c.tags.occ_task_id_percent::1024 0.044739 # Percentage of cache occupancy per task id system.l2c.tags.tag_accesses 39936 # Number of tag accesses system.l2c.tags.data_accesses 39936 # Number of data accesses +system.l2c.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.l2c.WritebackDirty_hits::writebacks 116 # number of WritebackDirty hits system.l2c.WritebackDirty_hits::total 116 # number of WritebackDirty hits system.l2c.WritebackClean_hits::writebacks 608 # number of WritebackClean hits @@ -1015,6 +1039,7 @@ system.membus.snoop_filter.hit_multi_requests 0 system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.membus.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadResp 2872 # Transaction distribution system.membus.trans_dist::ReadExReq 556 # Transaction distribution system.membus.trans_dist::ReadExResp 556 # Transaction distribution @@ -1040,6 +1065,7 @@ system.toL2Bus.snoop_filter.hit_multi_requests 0 system.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. system.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 250015500 # Cumulative time (in ticks) in various power states system.toL2Bus.trans_dist::ReadResp 3148 # Transaction distribution system.toL2Bus.trans_dist::WritebackDirty 116 # Transaction distribution system.toL2Bus.trans_dist::WritebackClean 608 # Transaction distribution |