diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-11-26 17:05:25 -0600 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-11-26 17:05:25 -0600 |
commit | 2823982a3cbd60a1b21db1a73b78440468df158a (patch) | |
tree | b955647023da451506138be5a325dfaa2bfd8ee5 /tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini | |
parent | 9fb93e5cd226ca928ef9cd45bcefcbd94649f4ea (diff) | |
download | gem5-2823982a3cbd60a1b21db1a73b78440468df158a.tar.xz |
stats: updates due to changes to ticksToCycles()
Diffstat (limited to 'tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini')
-rw-r--r-- | tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini | 54 |
1 files changed, 53 insertions, 1 deletions
diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini index 51f67db18..fc54ba8f2 100644 --- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini +++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini @@ -1,7 +1,9 @@ [root] type=Root children=system +eventq_index=0 full_system=false +sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -12,6 +14,7 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain l2c membus physmem toL2Bu boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +eventq_index=0 init_param=0 kernel= load_addr_mask=1099511627775 @@ -33,6 +36,7 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +eventq_index=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -45,6 +49,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu0.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu0.interrupts @@ -71,6 +76,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -93,11 +99,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu0.dtb] type=SparcTLB +eventq_index=0 size=64 [system.cpu0.icache] @@ -106,6 +114,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -128,21 +137,26 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu0.interrupts] type=SparcInterrupts +eventq_index=0 [system.cpu0.isa] type=SparcISA +eventq_index=0 [system.cpu0.itb] type=SparcTLB +eventq_index=0 size=64 [system.cpu0.tracer] type=ExeTracer +eventq_index=0 [system.cpu0.workload] type=LiveProcess @@ -152,7 +166,8 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic +eventq_index=0 +executable=tests/test-progs/m5threads/bin/sparc/linux/test_atomic gid=100 input=cin max_stack_size=67108864 @@ -173,6 +188,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu1.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu1.interrupts @@ -199,6 +215,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -221,11 +238,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu1.dtb] type=SparcTLB +eventq_index=0 size=64 [system.cpu1.icache] @@ -234,6 +253,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -256,21 +276,26 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu1.interrupts] type=SparcInterrupts +eventq_index=0 [system.cpu1.isa] type=SparcISA +eventq_index=0 [system.cpu1.itb] type=SparcTLB +eventq_index=0 size=64 [system.cpu1.tracer] type=ExeTracer +eventq_index=0 [system.cpu2] type=TimingSimpleCPU @@ -282,6 +307,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu2.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu2.interrupts @@ -308,6 +334,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -330,11 +357,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu2.dtb] type=SparcTLB +eventq_index=0 size=64 [system.cpu2.icache] @@ -343,6 +372,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -365,21 +395,26 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu2.interrupts] type=SparcInterrupts +eventq_index=0 [system.cpu2.isa] type=SparcISA +eventq_index=0 [system.cpu2.itb] type=SparcTLB +eventq_index=0 size=64 [system.cpu2.tracer] type=ExeTracer +eventq_index=0 [system.cpu3] type=TimingSimpleCPU @@ -391,6 +426,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu3.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu3.interrupts @@ -417,6 +453,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=4 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -439,11 +476,13 @@ type=LRU assoc=4 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu3.dtb] type=SparcTLB +eventq_index=0 size=64 [system.cpu3.icache] @@ -452,6 +491,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=1 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -474,25 +514,31 @@ type=LRU assoc=1 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 size=32768 [system.cpu3.interrupts] type=SparcInterrupts +eventq_index=0 [system.cpu3.isa] type=SparcISA +eventq_index=0 [system.cpu3.itb] type=SparcTLB +eventq_index=0 size=64 [system.cpu3.tracer] type=ExeTracer +eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +eventq_index=0 voltage_domain=system.voltage_domain [system.l2c] @@ -501,6 +547,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=20 is_top_level=false @@ -523,12 +570,14 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=20 size=4194304 [system.membus] type=CoherentBus clk_domain=system.clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -541,6 +590,7 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +eventq_index=0 in_addr_map=true latency=30000 latency_var=0 @@ -551,6 +601,7 @@ port=system.membus.master[0] [system.toL2Bus] type=CoherentBus clk_domain=system.cpu_clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -560,5 +611,6 @@ slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache [system.voltage_domain] type=VoltageDomain +eventq_index=0 voltage=1.000000 |