tests: update reference outputs

Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes.  There are a few stats.txt updates too, but
they are in the minority.

2 files changed, 163 insertions, 70 deletions

diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
index b4eef5d4b..51f67db18 100644
--- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
+++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
@@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000
 
 [system]
 type=System
-children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus
+children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu_clk_domain l2c membus physmem toL2Bus voltage_domain
 boot_osflags=a
-clock=1000
+cache_line_size=64
+clk_domain=system.clk_domain
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -27,14 +28,18 @@ work_cpus_ckpt_count=0
 work_end_ckpt_count=0
 work_end_exit_count=0
 work_item_id=-1
-system_port=system.membus.slave[1]
+system_port=system.membus.slave[0]
+
+[system.clk_domain]
+type=SrcClockDomain
+clock=1000
+voltage_domain=system.voltage_domain
 
 [system.cpu0]
 type=TimingSimpleCPU
 children=dcache dtb icache interrupts isa itb tracer workload
-branchPred=Null
 checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
 cpu_id=0
 do_checkpoint_insts=true
 do_quiesce=true
@@ -52,6 +57,7 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+simpoint_start_insts=
 switched_out=false
 system=system
 tracer=system.cpu0.tracer
@@ -61,10 +67,10 @@ icache_port=system.cpu0.icache.cpu_side
 
 [system.cpu0.dcache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -75,22 +81,31 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu0.dcache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu0.dcache_port
 mem_side=system.toL2Bus.slave[1]
 
+[system.cpu0.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu0.dtb]
 type=SparcTLB
 size=64
 
 [system.cpu0.icache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -101,12 +116,21 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu0.icache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu0.icache_port
 mem_side=system.toL2Bus.slave[0]
 
+[system.cpu0.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu0.interrupts]
 type=SparcInterrupts
 
@@ -128,7 +152,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=tests/test-progs/m5threads/bin/sparc/linux/test_atomic
+executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic
 gid=100
 input=cin
 max_stack_size=67108864
@@ -142,9 +166,8 @@ uid=100
 [system.cpu1]
 type=TimingSimpleCPU
 children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
 checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
 cpu_id=1
 do_checkpoint_insts=true
 do_quiesce=true
@@ -162,6 +185,7 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+simpoint_start_insts=
 switched_out=false
 system=system
 tracer=system.cpu1.tracer
@@ -171,10 +195,10 @@ icache_port=system.cpu1.icache.cpu_side
 
 [system.cpu1.dcache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -185,22 +209,31 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu1.dcache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu1.dcache_port
 mem_side=system.toL2Bus.slave[3]
 
+[system.cpu1.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu1.dtb]
 type=SparcTLB
 size=64
 
 [system.cpu1.icache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -211,12 +244,21 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu1.icache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu1.icache_port
 mem_side=system.toL2Bus.slave[2]
 
+[system.cpu1.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu1.interrupts]
 type=SparcInterrupts
 
@@ -233,9 +275,8 @@ type=ExeTracer
 [system.cpu2]
 type=TimingSimpleCPU
 children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
 checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
 cpu_id=2
 do_checkpoint_insts=true
 do_quiesce=true
@@ -253,6 +294,7 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+simpoint_start_insts=
 switched_out=false
 system=system
 tracer=system.cpu2.tracer
@@ -262,10 +304,10 @@ icache_port=system.cpu2.icache.cpu_side
 
 [system.cpu2.dcache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -276,22 +318,31 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu2.dcache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu2.dcache_port
 mem_side=system.toL2Bus.slave[5]
 
+[system.cpu2.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu2.dtb]
 type=SparcTLB
 size=64
 
 [system.cpu2.icache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -302,12 +353,21 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu2.icache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu2.icache_port
 mem_side=system.toL2Bus.slave[4]
 
+[system.cpu2.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu2.interrupts]
 type=SparcInterrupts
 
@@ -324,9 +384,8 @@ type=ExeTracer
 [system.cpu3]
 type=TimingSimpleCPU
 children=dcache dtb icache interrupts isa itb tracer
-branchPred=Null
 checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
 cpu_id=3
 do_checkpoint_insts=true
 do_quiesce=true
@@ -344,6 +403,7 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+simpoint_start_insts=
 switched_out=false
 system=system
 tracer=system.cpu3.tracer
@@ -353,10 +413,10 @@ icache_port=system.cpu3.icache.cpu_side
 
 [system.cpu3.dcache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -367,22 +427,31 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu3.dcache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu3.dcache_port
 mem_side=system.toL2Bus.slave[7]
 
+[system.cpu3.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu3.dtb]
 type=SparcTLB
 size=64
 
 [system.cpu3.icache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -393,12 +462,21 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu3.icache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu3.icache_port
 mem_side=system.toL2Bus.slave[6]
 
+[system.cpu3.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu3.interrupts]
 type=SparcInterrupts
 
@@ -412,12 +490,17 @@ size=64
 [system.cpu3.tracer]
 type=ExeTracer
 
+[system.cpu_clk_domain]
+type=SrcClockDomain
+clock=500
+voltage_domain=system.voltage_domain
+
 [system.l2c]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=20
 is_top_level=false
@@ -428,40 +511,46 @@ prefetcher=Null
 response_latency=20
 size=4194304
 system=system
+tags=system.l2c.tags
 tgts_per_mshr=12
 two_queue=false
 write_buffers=8
 cpu_side=system.toL2Bus.master[0]
-mem_side=system.membus.slave[0]
+mem_side=system.membus.slave[1]
+
+[system.l2c.tags]
+type=LRU
+assoc=8
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=20
+size=4194304
 
 [system.membus]
 type=CoherentBus
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
 header_cycles=1
 system=system
 use_default_range=false
 width=8
 master=system.physmem.port
-slave=system.l2c.mem_side system.system_port
+slave=system.system_port system.l2c.mem_side
 
 [system.physmem]
 type=SimpleMemory
 bandwidth=73.000000
-clock=1000
-conf_table_reported=false
+clk_domain=system.clk_domain
+conf_table_reported=true
 in_addr_map=true
 latency=30000
 latency_var=0
 null=false
 range=0:134217727
-zero=false
 port=system.membus.master[0]
 
 [system.toL2Bus]
 type=CoherentBus
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 header_cycles=1
 system=system
 use_default_range=false
@@ -469,3 +558,7 @@ width=8
 master=system.l2c.cpu_side
 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu2.icache.mem_side system.cpu2.dcache.mem_side system.cpu3.icache.mem_side system.cpu3.dcache.mem_side
 
+[system.voltage_domain]
+type=VoltageDomain
+voltage=1.000000
+
diff --git a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout
index adbb7069b..7a29b18d1 100755
--- a/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout
+++ b/tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout
@@ -3,75 +3,75 @@ Redirecting stderr to build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sp
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Mar 26 2013 15:04:14
-gem5 started Mar 26 2013 15:04:37
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Sep 22 2013 06:07:13
+gem5 started Sep 22 2013 06:10:12
+gem5 executing on zizzer
 command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp -re tests/run.py build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Init done
 [Iteration 1, Thread 1] Got lock
 [Iteration 1, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 1, Thread 3] Got lock
-[Iteration 1, Thread 3] Critical section done, previously next=1, now next=3
 [Iteration 1, Thread 2] Got lock
-[Iteration 1, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 1, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 1, Thread 3] Got lock
+[Iteration 1, Thread 3] Critical section done, previously next=2, now next=3
 Iteration 1 completed
-[Iteration 2, Thread 3] Got lock
-[Iteration 2, Thread 3] Critical section done, previously next=0, now next=3
 [Iteration 2, Thread 2] Got lock
-[Iteration 2, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 2, Thread 2] Critical section done, previously next=0, now next=2
 [Iteration 2, Thread 1] Got lock
 [Iteration 2, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 2, Thread 3] Got lock
+[Iteration 2, Thread 3] Critical section done, previously next=1, now next=3
 Iteration 2 completed
 [Iteration 3, Thread 1] Got lock
 [Iteration 3, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 3, Thread 3] Got lock
-[Iteration 3, Thread 3] Critical section done, previously next=1, now next=3
 [Iteration 3, Thread 2] Got lock
-[Iteration 3, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 3, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 3, Thread 3] Got lock
+[Iteration 3, Thread 3] Critical section done, previously next=2, now next=3
 Iteration 3 completed
 [Iteration 4, Thread 2] Got lock
 [Iteration 4, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 4, Thread 3] Got lock
-[Iteration 4, Thread 3] Critical section done, previously next=2, now next=3
 [Iteration 4, Thread 1] Got lock
-[Iteration 4, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 4, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 4, Thread 3] Got lock
+[Iteration 4, Thread 3] Critical section done, previously next=1, now next=3
 Iteration 4 completed
 [Iteration 5, Thread 1] Got lock
 [Iteration 5, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 5, Thread 3] Got lock
-[Iteration 5, Thread 3] Critical section done, previously next=1, now next=3
 [Iteration 5, Thread 2] Got lock
-[Iteration 5, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 5, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 5, Thread 3] Got lock
+[Iteration 5, Thread 3] Critical section done, previously next=2, now next=3
 Iteration 5 completed
 [Iteration 6, Thread 2] Got lock
 [Iteration 6, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 6, Thread 3] Got lock
-[Iteration 6, Thread 3] Critical section done, previously next=2, now next=3
 [Iteration 6, Thread 1] Got lock
-[Iteration 6, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 6, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 6, Thread 3] Got lock
+[Iteration 6, Thread 3] Critical section done, previously next=1, now next=3
 Iteration 6 completed
 [Iteration 7, Thread 1] Got lock
 [Iteration 7, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 7, Thread 3] Got lock
-[Iteration 7, Thread 3] Critical section done, previously next=1, now next=3
 [Iteration 7, Thread 2] Got lock
-[Iteration 7, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 7, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 7, Thread 3] Got lock
+[Iteration 7, Thread 3] Critical section done, previously next=2, now next=3
 Iteration 7 completed
 [Iteration 8, Thread 2] Got lock
 [Iteration 8, Thread 2] Critical section done, previously next=0, now next=2
-[Iteration 8, Thread 3] Got lock
-[Iteration 8, Thread 3] Critical section done, previously next=2, now next=3
 [Iteration 8, Thread 1] Got lock
-[Iteration 8, Thread 1] Critical section done, previously next=3, now next=1
+[Iteration 8, Thread 1] Critical section done, previously next=2, now next=1
+[Iteration 8, Thread 3] Got lock
+[Iteration 8, Thread 3] Critical section done, previously next=1, now next=3
 Iteration 8 completed
 [Iteration 9, Thread 1] Got lock
 [Iteration 9, Thread 1] Critical section done, previously next=0, now next=1
-[Iteration 9, Thread 3] Got lock
-[Iteration 9, Thread 3] Critical section done, previously next=1, now next=3
 [Iteration 9, Thread 2] Got lock
-[Iteration 9, Thread 2] Critical section done, previously next=3, now next=2
+[Iteration 9, Thread 2] Critical section done, previously next=1, now next=2
+[Iteration 9, Thread 3] Got lock
+[Iteration 9, Thread 3] Critical section done, previously next=2, now next=3
 Iteration 9 completed
 [Iteration 10, Thread 2] Got lock
 [Iteration 10, Thread 2] Critical section done, previously next=0, now next=2
@@ -81,4 +81,4 @@ Iteration 9 completed
 [Iteration 10, Thread 1] Critical section done, previously next=3, now next=1
 Iteration 10 completed
 PASSED :-)
-Exiting @ tick 262970500 because target called exit()
+Exiting @ tick 262794500 because target called exit()