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authorNilay Vaish <nilay@cs.wisc.edu>2014-01-04 00:03:33 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2014-01-04 00:03:33 -0600
commitbb6d7d402b5cc610ed879e9e7ecb251e353149e6 (patch)
tree2724cd730d3867978ddefe2b1cdead47fefa6bc0 /tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr
parent9ec59e8b691d0f2e49f0a8ea6e1284b1d9e4e669 (diff)
downloadgem5-bb6d7d402b5cc610ed879e9e7ecb251e353149e6.tar.xz
ruby: rename MESI_CMP_directory to MESI_Two_Level
This is because the next patch introduces a three level hierarchy. --HG-- rename : build_opts/ALPHA_MESI_CMP_directory => build_opts/ALPHA_MESI_Two_Level rename : build_opts/X86_MESI_CMP_directory => build_opts/X86_MESI_Two_Level rename : configs/ruby/MESI_CMP_directory.py => configs/ruby/MESI_Two_Level.py rename : src/mem/protocol/MESI_CMP_directory-L1cache.sm => src/mem/protocol/MESI_Two_Level-L1cache.sm rename : src/mem/protocol/MESI_CMP_directory-L2cache.sm => src/mem/protocol/MESI_Two_Level-L2cache.sm rename : src/mem/protocol/MESI_CMP_directory-dir.sm => src/mem/protocol/MESI_Two_Level-dir.sm rename : src/mem/protocol/MESI_CMP_directory-dma.sm => src/mem/protocol/MESI_Two_Level-dma.sm rename : src/mem/protocol/MESI_CMP_directory-msg.sm => src/mem/protocol/MESI_Two_Level-msg.sm rename : src/mem/protocol/MESI_CMP_directory.slicc => src/mem/protocol/MESI_Two_Level.slicc rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/ruby.stats rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simerr rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/system.pc.com_1.terminal rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/simerr rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/simout rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simerr rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simout rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simout rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/stats.txt rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/config.ini rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/ruby.stats rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simerr rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simout rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/stats.txt
Diffstat (limited to 'tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr')
-rwxr-xr-xtests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr82
1 files changed, 82 insertions, 0 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr
new file mode 100755
index 000000000..d0c477d0e
--- /dev/null
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr
@@ -0,0 +1,82 @@
+warn: rounding error > tolerance
+ 0.072760 rounded to 0
+warn: rounding error > tolerance
+ 0.072760 rounded to 0
+warn: rounding error > tolerance
+ 0.072760 rounded to 0
+warn: rounding error > tolerance
+ 0.072760 rounded to 0
+system.cpu3: completed 10000 read, 5414 write accesses @719275
+system.cpu1: completed 10000 read, 5207 write accesses @725827
+system.cpu2: completed 10000 read, 5346 write accesses @726254
+system.cpu6: completed 10000 read, 5345 write accesses @729597
+system.cpu7: completed 10000 read, 5419 write accesses @731574
+system.cpu4: completed 10000 read, 5529 write accesses @736931
+system.cpu5: completed 10000 read, 5440 write accesses @744470
+system.cpu0: completed 10000 read, 5379 write accesses @746243
+system.cpu3: completed 20000 read, 10692 write accesses @1453209
+system.cpu1: completed 20000 read, 10572 write accesses @1457166
+system.cpu2: completed 20000 read, 10817 write accesses @1460941
+system.cpu7: completed 20000 read, 11051 write accesses @1471674
+system.cpu4: completed 20000 read, 10890 write accesses @1471936
+system.cpu5: completed 20000 read, 10727 write accesses @1478654
+system.cpu6: completed 20000 read, 10906 write accesses @1482356
+system.cpu0: completed 20000 read, 10698 write accesses @1484885
+system.cpu2: completed 30000 read, 16174 write accesses @2184715
+system.cpu6: completed 30000 read, 16276 write accesses @2193615
+system.cpu0: completed 30000 read, 16014 write accesses @2197245
+system.cpu7: completed 30000 read, 16583 write accesses @2199803
+system.cpu1: completed 30000 read, 16153 write accesses @2202627
+system.cpu4: completed 30000 read, 16326 write accesses @2206424
+system.cpu3: completed 30000 read, 16120 write accesses @2214933
+system.cpu5: completed 30000 read, 16017 write accesses @2228709
+system.cpu6: completed 40000 read, 21587 write accesses @2901116
+system.cpu2: completed 40000 read, 21416 write accesses @2916609
+system.cpu0: completed 40000 read, 21318 write accesses @2930718
+system.cpu1: completed 40000 read, 21576 write accesses @2933338
+system.cpu7: completed 40000 read, 22016 write accesses @2933661
+system.cpu4: completed 40000 read, 21632 write accesses @2934839
+system.cpu3: completed 40000 read, 21495 write accesses @2950362
+system.cpu5: completed 40000 read, 21476 write accesses @2978482
+system.cpu6: completed 50000 read, 26852 write accesses @3637893
+system.cpu2: completed 50000 read, 26885 write accesses @3654740
+system.cpu1: completed 50000 read, 27034 write accesses @3657767
+system.cpu0: completed 50000 read, 26670 write accesses @3659997
+system.cpu4: completed 50000 read, 26987 write accesses @3671541
+system.cpu7: completed 50000 read, 27458 write accesses @3674943
+system.cpu3: completed 50000 read, 26989 write accesses @3692057
+system.cpu5: completed 50000 read, 26964 write accesses @3706034
+system.cpu6: completed 60000 read, 32004 write accesses @4355566
+system.cpu0: completed 60000 read, 32011 write accesses @4386276
+system.cpu4: completed 60000 read, 32458 write accesses @4393617
+system.cpu1: completed 60000 read, 32363 write accesses @4400443
+system.cpu2: completed 60000 read, 32317 write accesses @4403435
+system.cpu7: completed 60000 read, 32808 write accesses @4408380
+system.cpu3: completed 60000 read, 32368 write accesses @4439846
+system.cpu5: completed 60000 read, 32369 write accesses @4442699
+system.cpu6: completed 70000 read, 37273 write accesses @5071946
+system.cpu0: completed 70000 read, 37486 write accesses @5119164
+system.cpu4: completed 70000 read, 37898 write accesses @5125200
+system.cpu7: completed 70000 read, 38069 write accesses @5133382
+system.cpu1: completed 70000 read, 37837 write accesses @5136537
+system.cpu2: completed 70000 read, 37818 write accesses @5139253
+system.cpu5: completed 70000 read, 37708 write accesses @5173290
+system.cpu3: completed 70000 read, 37836 write accesses @5178083
+system.cpu6: completed 80000 read, 42670 write accesses @5803436
+system.cpu7: completed 80000 read, 43237 write accesses @5856290
+system.cpu4: completed 80000 read, 43274 write accesses @5860905
+system.cpu2: completed 80000 read, 43098 write accesses @5864154
+system.cpu0: completed 80000 read, 43136 write accesses @5865993
+system.cpu1: completed 80000 read, 43319 write accesses @5873155
+system.cpu5: completed 80000 read, 43110 write accesses @5912619
+system.cpu3: completed 80000 read, 43527 write accesses @5915226
+system.cpu6: completed 90000 read, 47938 write accesses @6517300
+system.cpu7: completed 90000 read, 48616 write accesses @6584472
+system.cpu2: completed 90000 read, 48495 write accesses @6590070
+system.cpu0: completed 90000 read, 48585 write accesses @6598491
+system.cpu1: completed 90000 read, 48584 write accesses @6599764
+system.cpu4: completed 90000 read, 48685 write accesses @6602186
+system.cpu5: completed 90000 read, 48384 write accesses @6637212
+system.cpu3: completed 90000 read, 48869 write accesses @6654178
+system.cpu6: completed 100000 read, 53414 write accesses @7257449
+hack: be nice to actually delete the event here