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authorNilay Vaish <nilay@cs.wisc.edu>2012-10-15 19:13:59 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2012-10-15 19:13:59 -0500
commitb6b5cde1321f1bd710463db8650b4485720e21bd (patch)
tree021fc6c2161ea5d52569ca08a3e128e406ccf34d /tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
parent5ffc16593997b35f4f1abbd149e01169e6bbcff5 (diff)
downloadgem5-b6b5cde1321f1bd710463db8650b4485720e21bd.tar.xz
regressions: update stats due to change to ruby memory system
Diffstat (limited to 'tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt')
-rw-r--r--tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt44
1 files changed, 22 insertions, 22 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
index 2a42b9411..915e01ac6 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
@@ -1,12 +1,12 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.007494 # Number of seconds simulated
-sim_ticks 7493512 # Number of ticks simulated
-final_tick 7493512 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.007448 # Number of seconds simulated
+sim_ticks 7447945 # Number of ticks simulated
+final_tick 7447945 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 42711 # Simulator tick rate (ticks/s)
-host_mem_usage 410448 # Number of bytes of host memory used
-host_seconds 175.45 # Real time elapsed on the host
+host_tick_rate 25433 # Simulator tick rate (ticks/s)
+host_mem_usage 418956 # Number of bytes of host memory used
+host_seconds 292.84 # Real time elapsed on the host
system.l1_cntrl4.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl4.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -109,29 +109,29 @@ system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0
system.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
-system.cpu0.num_reads 99629 # number of read accesses completed
-system.cpu0.num_writes 53203 # number of write accesses completed
+system.cpu0.num_reads 99070 # number of read accesses completed
+system.cpu0.num_writes 53923 # number of write accesses completed
system.cpu0.num_copies 0 # number of copy accesses completed
-system.cpu1.num_reads 99934 # number of read accesses completed
-system.cpu1.num_writes 53556 # number of write accesses completed
+system.cpu1.num_reads 100000 # number of read accesses completed
+system.cpu1.num_writes 54091 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
-system.cpu2.num_reads 99904 # number of read accesses completed
-system.cpu2.num_writes 53683 # number of write accesses completed
+system.cpu2.num_reads 99298 # number of read accesses completed
+system.cpu2.num_writes 53915 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
-system.cpu3.num_reads 99658 # number of read accesses completed
-system.cpu3.num_writes 53732 # number of write accesses completed
+system.cpu3.num_reads 99379 # number of read accesses completed
+system.cpu3.num_writes 53826 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
-system.cpu4.num_reads 100000 # number of read accesses completed
-system.cpu4.num_writes 54127 # number of write accesses completed
+system.cpu4.num_reads 99471 # number of read accesses completed
+system.cpu4.num_writes 54600 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
-system.cpu5.num_reads 99924 # number of read accesses completed
-system.cpu5.num_writes 53749 # number of write accesses completed
+system.cpu5.num_reads 99375 # number of read accesses completed
+system.cpu5.num_writes 54088 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
-system.cpu6.num_reads 99831 # number of read accesses completed
-system.cpu6.num_writes 53726 # number of write accesses completed
+system.cpu6.num_reads 99102 # number of read accesses completed
+system.cpu6.num_writes 54167 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
-system.cpu7.num_reads 99585 # number of read accesses completed
-system.cpu7.num_writes 53460 # number of write accesses completed
+system.cpu7.num_reads 98852 # number of read accesses completed
+system.cpu7.num_writes 54147 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
---------- End Simulation Statistics ----------