diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-10 12:44:03 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-10 12:44:03 -0500 |
commit | 5cdf221d8ce3f5b983672f26346aefc21b37a752 (patch) | |
tree | ac039244b78f69bee1d0dea82e48827fba97fe3c /tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini | |
parent | c5bf1390aa129fefa7102e2de2998c0e6b09b5b0 (diff) | |
download | gem5-5cdf221d8ce3f5b983672f26346aefc21b37a752.tar.xz |
Regression: Updates due to changes to Ruby memory controller
Diffstat (limited to 'tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini')
-rw-r--r-- | tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini index eb0775893..b7ddefe55 100644 --- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000 type=System children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcbus funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 l2_cntrl0 physmem ruby sys_port_proxy boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -30,6 +31,7 @@ system_port=system.sys_port_proxy.slave[0] [system.cpu0] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -48,6 +50,7 @@ test=system.l1_cntrl0.sequencer.slave[0] [system.cpu1] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -66,6 +69,7 @@ test=system.l1_cntrl1.sequencer.slave[0] [system.cpu2] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -84,6 +88,7 @@ test=system.l1_cntrl2.sequencer.slave[0] [system.cpu3] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -102,6 +107,7 @@ test=system.l1_cntrl3.sequencer.slave[0] [system.cpu4] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -120,6 +126,7 @@ test=system.l1_cntrl4.sequencer.slave[0] [system.cpu5] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -138,6 +145,7 @@ test=system.l1_cntrl5.sequencer.slave[0] [system.cpu6] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -156,6 +164,7 @@ test=system.l1_cntrl6.sequencer.slave[0] [system.cpu7] type=MemTest atomic=false +clock=1 issue_dmas=false max_loads=100000 memory_size=65536 @@ -203,9 +212,9 @@ bank_busy_time=11 bank_queue_size=12 banks_per_rank=8 basic_bus_busy_time=2 +clock=3 dimm_bit_0=12 dimms_per_channel=2 -mem_bus_cycle_multiplier=10 mem_ctl_latency=12 mem_fixed_delay=0 mem_random_arbitrate=0 @@ -214,6 +223,7 @@ rank_rank_delay=1 ranks_per_dimm=2 read_write_delay=2 refresh_period=1560 +ruby_system=system.ruby tFaw=0 version=0 @@ -229,6 +239,7 @@ slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional syste [system.funcmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=false @@ -293,6 +304,7 @@ tagArrayBanks=1 [system.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl0.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl0.L1IcacheMemory @@ -360,6 +372,7 @@ tagArrayBanks=1 [system.l1_cntrl1.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl1.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl1.L1IcacheMemory @@ -427,6 +440,7 @@ tagArrayBanks=1 [system.l1_cntrl2.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl2.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl2.L1IcacheMemory @@ -494,6 +508,7 @@ tagArrayBanks=1 [system.l1_cntrl3.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl3.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl3.L1IcacheMemory @@ -561,6 +576,7 @@ tagArrayBanks=1 [system.l1_cntrl4.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl4.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl4.L1IcacheMemory @@ -628,6 +644,7 @@ tagArrayBanks=1 [system.l1_cntrl5.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl5.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl5.L1IcacheMemory @@ -695,6 +712,7 @@ tagArrayBanks=1 [system.l1_cntrl6.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl6.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl6.L1IcacheMemory @@ -762,6 +780,7 @@ tagArrayBanks=1 [system.l1_cntrl7.sequencer] type=RubySequencer access_phys_mem=false +clock=1 dcache=system.l1_cntrl7.L1DcacheMemory deadlock_threshold=1000000 icache=system.l1_cntrl7.L1IcacheMemory @@ -807,6 +826,7 @@ tagArrayBanks=1 [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true @@ -1092,6 +1112,7 @@ ruby_system=system.ruby [system.sys_port_proxy] type=RubyPortProxy access_phys_mem=true +clock=1 ruby_system=system.ruby support_data_reqs=true support_inst_reqs=true |