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author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-01-24 12:29:00 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-01-24 12:29:00 -0600 |
commit | 9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b (patch) | |
tree | 64b85031cb791a21af6059778384d358d992b817 /tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt | |
parent | dbeabedaf0f8d9ec0ea3331db2e44b1add53f79f (diff) | |
download | gem5-9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b.tar.xz |
regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.
Diffstat (limited to 'tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt')
-rw-r--r-- | tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt index 18c37b3f8..e20a29e2b 100644 --- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt +++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt @@ -4,9 +4,9 @@ sim_seconds 0.008665 # Nu sim_ticks 8664886 # Number of ticks simulated final_tick 8664886 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 187879 # Simulator tick rate (ticks/s) -host_mem_usage 425448 # Number of bytes of host memory used -host_seconds 46.12 # Real time elapsed on the host +host_tick_rate 109516 # Simulator tick rate (ticks/s) +host_mem_usage 425456 # Number of bytes of host memory used +host_seconds 79.12 # Real time elapsed on the host system.ruby.l1_cntrl4.cacheMemory.num_data_array_reads 0 # number of data array reads system.ruby.l1_cntrl4.cacheMemory.num_data_array_writes 0 # number of data array writes system.ruby.l1_cntrl4.cacheMemory.num_tag_array_reads 0 # number of tag array reads |