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author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-27 18:36:21 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-27 18:36:21 -0500 |
commit | 4646369afd408b486fd3515c35d6c6bbe8960839 (patch) | |
tree | 0649a2372083956dc573d4b0d56d60c1c15a344c /tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout | |
parent | 4920f0d7e5a4c29ada074bf3a73f36510e138016 (diff) | |
download | gem5-4646369afd408b486fd3515c35d6c6bbe8960839.tar.xz |
regressions: update due to cache latency fix
Diffstat (limited to 'tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout')
-rwxr-xr-x | tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout index 86075abc3..077a1416b 100755 --- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout +++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout @@ -3,10 +3,10 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memt gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:46:00 +gem5 compiled Mar 26 2013 14:38:52 +gem5 started Mar 26 2013 14:39:12 gem5 executing on ribera.cs.wisc.edu command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest -re tests/run.py build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 758619000 because maximum number of loads reached +Exiting @ tick 761435500 because maximum number of loads reached |