summaryrefslogtreecommitdiff
path: root/tests/quick/se/50.memtest/ref/null/none/memtest-filter
diff options
context:
space:
mode:
authorCurtis Dunham <Curtis.Dunham@arm.com>2016-07-21 17:19:18 +0100
committerCurtis Dunham <Curtis.Dunham@arm.com>2016-07-21 17:19:18 +0100
commit84f138ba96201431513eb2ae5f847389ac731aa2 (patch)
tree3aee721699295c85e4e0c2d3d4a6bb27595bfabd /tests/quick/se/50.memtest/ref/null/none/memtest-filter
parenta288c94387b110112461ff5686fa727a43ddbe9c (diff)
downloadgem5-84f138ba96201431513eb2ae5f847389ac731aa2.tar.xz
stats: update references
Diffstat (limited to 'tests/quick/se/50.memtest/ref/null/none/memtest-filter')
-rw-r--r--tests/quick/se/50.memtest/ref/null/none/memtest-filter/config.ini150
-rwxr-xr-xtests/quick/se/50.memtest/ref/null/none/memtest-filter/simerr146
-rwxr-xr-xtests/quick/se/50.memtest/ref/null/none/memtest-filter/simout12
-rw-r--r--tests/quick/se/50.memtest/ref/null/none/memtest-filter/stats.txt8
4 files changed, 235 insertions, 81 deletions
diff --git a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/config.ini b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/config.ini
index 8d136d962..a2f7231b1 100644
--- a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/config.ini
+++ b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/config.ini
@@ -14,6 +14,7 @@ children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 cpu_clk_domain dvfs_
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
exit_on_work_items=false
init_param=0
@@ -27,6 +28,10 @@ memories=system.physmem
mmap_using_noreserve=false
multi_thread=false
num_work_ids=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
readfile=
symbolfile=
thermal_components=
@@ -52,12 +57,17 @@ voltage_domain=system.voltage_domain
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -72,12 +82,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -96,8 +111,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -105,12 +125,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -125,12 +150,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -149,8 +179,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -158,12 +193,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -178,12 +218,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -202,8 +247,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -211,12 +261,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -231,12 +286,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -255,8 +315,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -264,12 +329,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -284,12 +354,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -308,8 +383,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -317,12 +397,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -337,12 +422,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -361,8 +451,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -370,12 +465,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -390,12 +490,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -414,8 +519,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -423,12 +533,17 @@ size=32768
type=MemTest
children=l1c
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
interval=1
max_loads=100000
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
percent_functional=50
percent_reads=65
percent_uncacheable=10
+power_model=Null
progress_check=5000000
progress_interval=10000
size=65536
@@ -443,12 +558,17 @@ addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -467,8 +587,13 @@ type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -495,12 +620,17 @@ addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
hit_latency=20
is_read_only=false
max_miss_count=0
mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=20
@@ -519,8 +649,13 @@ type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=65536
@@ -528,10 +663,15 @@ size=65536
type=CoherentXBar
children=snoop_filter
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=4
frontend_latency=3
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
point_of_coherency=true
+power_model=Null
response_latency=2
snoop_filter=system.membus.snoop_filter
snoop_response_latency=4
@@ -553,11 +693,16 @@ type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
+default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
range=0:134217727
port=system.membus.master[0]
@@ -565,10 +710,15 @@ port=system.membus.master[0]
type=CoherentXBar
children=snoop_filter
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=0
frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
point_of_coherency=false
+power_model=Null
response_latency=1
snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
diff --git a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simerr b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simerr
index 4771f3483..01d1cac03 100755
--- a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simerr
+++ b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simerr
@@ -1,73 +1,73 @@
-system.cpu5: completed 10000 read, 5633 write accesses @60486000
-system.cpu4: completed 10000 read, 5582 write accesses @61180000
-system.cpu6: completed 10000 read, 5560 write accesses @61307500
-system.cpu7: completed 10000 read, 5599 write accesses @61402000
-system.cpu2: completed 10000 read, 5643 write accesses @61472000
-system.cpu1: completed 10000 read, 5506 write accesses @61551000
-system.cpu3: completed 10000 read, 5658 write accesses @61700000
-system.cpu0: completed 10000 read, 5706 write accesses @62631500
-system.cpu5: completed 20000 read, 11103 write accesses @113616000
-system.cpu6: completed 20000 read, 10976 write accesses @113920500
-system.cpu2: completed 20000 read, 11039 write accesses @113933500
-system.cpu3: completed 20000 read, 11207 write accesses @114624500
-system.cpu4: completed 20000 read, 11084 write accesses @114955000
-system.cpu0: completed 20000 read, 11085 write accesses @115057000
-system.cpu7: completed 20000 read, 11095 write accesses @115187000
-system.cpu1: completed 20000 read, 11193 write accesses @116687500
-system.cpu5: completed 30000 read, 16705 write accesses @166840500
-system.cpu2: completed 30000 read, 16691 write accesses @167354000
-system.cpu6: completed 30000 read, 16468 write accesses @167416000
-system.cpu4: completed 30000 read, 16533 write accesses @168175000
-system.cpu3: completed 30000 read, 16715 write accesses @168594500
-system.cpu7: completed 30000 read, 16620 write accesses @168682000
-system.cpu0: completed 30000 read, 16560 write accesses @168778500
-system.cpu1: completed 30000 read, 16873 write accesses @170313500
-system.cpu2: completed 40000 read, 22285 write accesses @220155500
-system.cpu3: completed 40000 read, 22038 write accesses @220636000
-system.cpu5: completed 40000 read, 22211 write accesses @221161500
-system.cpu6: completed 40000 read, 22097 write accesses @221217500
-system.cpu7: completed 40000 read, 22095 write accesses @221239000
-system.cpu0: completed 40000 read, 22196 write accesses @221351000
-system.cpu4: completed 40000 read, 21983 write accesses @222184000
-system.cpu1: completed 40000 read, 22367 write accesses @223407000
-system.cpu2: completed 50000 read, 27562 write accesses @273475000
-system.cpu6: completed 50000 read, 27553 write accesses @273666500
-system.cpu0: completed 50000 read, 27658 write accesses @274179000
-system.cpu4: completed 50000 read, 27584 write accesses @274332000
-system.cpu3: completed 50000 read, 27495 write accesses @274461500
-system.cpu7: completed 50000 read, 27568 write accesses @274681000
-system.cpu5: completed 50000 read, 27850 write accesses @275614000
-system.cpu1: completed 50000 read, 28070 write accesses @277107000
-system.cpu2: completed 60000 read, 33123 write accesses @327185500
-system.cpu6: completed 60000 read, 33149 write accesses @327223000
-system.cpu3: completed 60000 read, 32991 write accesses @327854000
-system.cpu7: completed 60000 read, 32997 write accesses @328407000
-system.cpu0: completed 60000 read, 33282 write accesses @328452500
-system.cpu4: completed 60000 read, 33164 write accesses @329017000
-system.cpu5: completed 60000 read, 33383 write accesses @329401500
-system.cpu1: completed 60000 read, 33681 write accesses @330675000
-system.cpu2: completed 70000 read, 38702 write accesses @380801000
-system.cpu3: completed 70000 read, 38442 write accesses @381181000
-system.cpu6: completed 70000 read, 38695 write accesses @381583500
-system.cpu7: completed 70000 read, 38573 write accesses @382302000
-system.cpu0: completed 70000 read, 38773 write accesses @382499000
-system.cpu4: completed 70000 read, 38793 write accesses @383094500
-system.cpu5: completed 70000 read, 38945 write accesses @383290000
-system.cpu1: completed 70000 read, 39200 write accesses @385376000
-system.cpu2: completed 80000 read, 44175 write accesses @434108000
-system.cpu6: completed 80000 read, 44138 write accesses @434454000
-system.cpu3: completed 80000 read, 43905 write accesses @434859000
-system.cpu7: completed 80000 read, 43929 write accesses @435594500
-system.cpu0: completed 80000 read, 44322 write accesses @435767000
-system.cpu4: completed 80000 read, 44313 write accesses @436517500
-system.cpu5: completed 80000 read, 44613 write accesses @436622000
-system.cpu1: completed 80000 read, 44739 write accesses @439209000
-system.cpu6: completed 90000 read, 49689 write accesses @488185000
-system.cpu3: completed 90000 read, 49429 write accesses @488562500
-system.cpu7: completed 90000 read, 49434 write accesses @488577000
-system.cpu2: completed 90000 read, 49778 write accesses @488987500
-system.cpu0: completed 90000 read, 49893 write accesses @489736000
-system.cpu5: completed 90000 read, 50116 write accesses @489869500
-system.cpu4: completed 90000 read, 49769 write accesses @490914000
-system.cpu1: completed 90000 read, 50142 write accesses @491765500
-system.cpu6: completed 100000 read, 55059 write accesses @540820000
+system.cpu3: completed 10000 read, 5503 write accesses @55915500
+system.cpu4: completed 10000 read, 5302 write accesses @55980000
+system.cpu7: completed 10000 read, 5500 write accesses @56129000
+system.cpu2: completed 10000 read, 5342 write accesses @56146500
+system.cpu6: completed 10000 read, 5358 write accesses @56494500
+system.cpu0: completed 10000 read, 5493 write accesses @56861500
+system.cpu1: completed 10000 read, 5676 write accesses @57033500
+system.cpu5: completed 10000 read, 5528 write accesses @57497500
+system.cpu4: completed 20000 read, 10871 write accesses @105086000
+system.cpu7: completed 20000 read, 11018 write accesses @105227000
+system.cpu6: completed 20000 read, 10904 write accesses @105245500
+system.cpu0: completed 20000 read, 10841 write accesses @105416500
+system.cpu3: completed 20000 read, 11147 write accesses @105878500
+system.cpu2: completed 20000 read, 10930 write accesses @106485500
+system.cpu5: completed 20000 read, 10954 write accesses @106687000
+system.cpu1: completed 20000 read, 11324 write accesses @107095000
+system.cpu4: completed 30000 read, 16387 write accesses @154433500
+system.cpu6: completed 30000 read, 16529 write accesses @154891500
+system.cpu2: completed 30000 read, 16387 write accesses @154906000
+system.cpu3: completed 30000 read, 16756 write accesses @155604500
+system.cpu7: completed 30000 read, 16642 write accesses @155734000
+system.cpu5: completed 30000 read, 16445 write accesses @156039500
+system.cpu0: completed 30000 read, 16469 write accesses @156104500
+system.cpu1: completed 30000 read, 16825 write accesses @156708500
+system.cpu6: completed 40000 read, 21980 write accesses @203895500
+system.cpu4: completed 40000 read, 22029 write accesses @204285000
+system.cpu3: completed 40000 read, 22257 write accesses @204704000
+system.cpu7: completed 40000 read, 22193 write accesses @205001500
+system.cpu2: completed 40000 read, 22047 write accesses @205470000
+system.cpu5: completed 40000 read, 22004 write accesses @206055000
+system.cpu0: completed 40000 read, 21987 write accesses @206174000
+system.cpu1: completed 40000 read, 22532 write accesses @206732500
+system.cpu4: completed 50000 read, 27591 write accesses @253615500
+system.cpu6: completed 50000 read, 27369 write accesses @253616500
+system.cpu2: completed 50000 read, 27561 write accesses @254261500
+system.cpu7: completed 50000 read, 27945 write accesses @254398000
+system.cpu5: completed 50000 read, 27346 write accesses @254644500
+system.cpu3: completed 50000 read, 27794 write accesses @254687000
+system.cpu0: completed 50000 read, 27491 write accesses @255540000
+system.cpu1: completed 50000 read, 28147 write accesses @256393500
+system.cpu4: completed 60000 read, 33155 write accesses @302912000
+system.cpu6: completed 60000 read, 33024 write accesses @303044500
+system.cpu5: completed 60000 read, 32819 write accesses @303948500
+system.cpu7: completed 60000 read, 33412 write accesses @304003500
+system.cpu2: completed 60000 read, 33183 write accesses @305097000
+system.cpu3: completed 60000 read, 33603 write accesses @305311500
+system.cpu1: completed 60000 read, 33393 write accesses @305569000
+system.cpu0: completed 60000 read, 33038 write accesses @305621500
+system.cpu4: completed 70000 read, 38636 write accesses @352443000
+system.cpu5: completed 70000 read, 38516 write accesses @353701000
+system.cpu6: completed 70000 read, 38725 write accesses @353942000
+system.cpu7: completed 70000 read, 39072 write accesses @354424000
+system.cpu2: completed 70000 read, 38818 write accesses @354701000
+system.cpu1: completed 70000 read, 38717 write accesses @354858500
+system.cpu3: completed 70000 read, 39274 write accesses @355379500
+system.cpu0: completed 70000 read, 38744 write accesses @355617500
+system.cpu4: completed 80000 read, 44404 write accesses @402767500
+system.cpu2: completed 80000 read, 44188 write accesses @403291500
+system.cpu5: completed 80000 read, 44099 write accesses @403371500
+system.cpu7: completed 80000 read, 44629 write accesses @403854500
+system.cpu6: completed 80000 read, 44307 write accesses @404062000
+system.cpu0: completed 80000 read, 44206 write accesses @404147000
+system.cpu1: completed 80000 read, 44256 write accesses @404649000
+system.cpu3: completed 80000 read, 44966 write accesses @406154000
+system.cpu4: completed 90000 read, 49951 write accesses @452283500
+system.cpu5: completed 90000 read, 49582 write accesses @452363500
+system.cpu2: completed 90000 read, 49727 write accesses @452365500
+system.cpu6: completed 90000 read, 49789 write accesses @453642000
+system.cpu0: completed 90000 read, 49883 write accesses @453665500
+system.cpu7: completed 90000 read, 50370 write accesses @454276500
+system.cpu1: completed 90000 read, 49817 write accesses @454621500
+system.cpu3: completed 90000 read, 50461 write accesses @455559000
+system.cpu5: completed 100000 read, 55110 write accesses @501584000
diff --git a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simout b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simout
index 78aee4704..ee02aa361 100755
--- a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simout
+++ b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/simout
@@ -1,11 +1,13 @@
+Redirecting stdout to build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter/simout
+Redirecting stderr to build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 21 2016 14:20:17
-gem5 started Jan 21 2016 14:20:32
-gem5 executing on zizzer, pid 63114
-command line: build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter -re /z/atgutier/gem5/gem5-commit/tests/run.py build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter
+gem5 compiled Jul 21 2016 14:24:31
+gem5 started Jul 21 2016 14:24:50
+gem5 executing on e108600-lin, pid 18184
+command line: /work/curdun01/gem5-external.hg/build/NULL/gem5.opt -d build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter -re /work/curdun01/gem5-external.hg/tests/testing/../run.py quick/se/50.memtest/null/none/memtest-filter
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 540820000 because maximum number of loads reached
+Exiting @ tick 501584000 because maximum number of loads reached
diff --git a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/stats.txt b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/stats.txt
index 863fa9c63..a994433c5 100644
--- a/tests/quick/se/50.memtest/ref/null/none/memtest-filter/stats.txt
+++ b/tests/quick/se/50.memtest/ref/null/none/memtest-filter/stats.txt
@@ -4,9 +4,9 @@ sim_seconds 0.000502 # Nu
sim_ticks 501584000 # Number of ticks simulated
final_tick 501584000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_tick_rate 130273139 # Simulator tick rate (ticks/s)
-host_mem_usage 277304 # Number of bytes of host memory used
-host_seconds 3.85 # Real time elapsed on the host
+host_tick_rate 67567713 # Simulator tick rate (ticks/s)
+host_mem_usage 232512 # Number of bytes of host memory used
+host_seconds 7.42 # Real time elapsed on the host
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.pwrStateResidencyTicks::UNDEFINED 501584000 # Cumulative time (in ticks) in various power states
@@ -1679,6 +1679,7 @@ system.membus.pkt_count::total 377217 # Pa
system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 1076434 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size::total 1076434 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 56879 # Total snoops (count)
+system.membus.snoopTraffic 0 # Total snoop traffic (bytes)
system.membus.snoop_fanout::samples 245548 # Request fanout histogram
system.membus.snoop_fanout::mean 0 # Request fanout histogram
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
@@ -1730,6 +1731,7 @@ system.toL2Bus.pkt_size_system.cpu6.l1c.mem_side::system.l2c.cpu_side 17923
system.toL2Bus.pkt_size_system.cpu7.l1c.mem_side::system.l2c.cpu_side 1782917 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.pkt_size::total 14289488 # Cumulative packet size per connected master and slave (bytes)
system.toL2Bus.snoops 336712 # Total snoops (count)
+system.toL2Bus.snoopTraffic 20380288 # Total snoop traffic (bytes)
system.toL2Bus.snoop_fanout::samples 624467 # Request fanout histogram
system.toL2Bus.snoop_fanout::mean 1.150434 # Request fanout histogram
system.toL2Bus.snoop_fanout::stdev 0.985907 # Request fanout histogram