diff options
author | Steve Reinhardt <stever@gmail.com> | 2013-09-28 15:25:17 -0400 |
---|---|---|
committer | Steve Reinhardt <stever@gmail.com> | 2013-09-28 15:25:17 -0400 |
commit | fbc1feb39ac19379983ca714f4c7fadcd9fdabf6 (patch) | |
tree | 59e49142d5930eb044e9fc09d94c5060a810d545 /tests/quick/se/50.memtest/ref/null/none/memtest/config.ini | |
parent | e5c319db43751f45b2bcca1d018fc39d4561ef9c (diff) | |
download | gem5-fbc1feb39ac19379983ca714f4c7fadcd9fdabf6.tar.xz |
tests: update reference outputs
Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes. There are a few stats.txt updates too, but
they are in the minority.
Diffstat (limited to 'tests/quick/se/50.memtest/ref/null/none/memtest/config.ini')
-rw-r--r-- | tests/quick/se/50.memtest/ref/null/none/memtest/config.ini | 173 |
1 files changed, 132 insertions, 41 deletions
diff --git a/tests/quick/se/50.memtest/ref/null/none/memtest/config.ini b/tests/quick/se/50.memtest/ref/null/none/memtest/config.ini index 1f567a1b9..0b50bed4c 100644 --- a/tests/quick/se/50.memtest/ref/null/none/memtest/config.ini +++ b/tests/quick/se/50.memtest/ref/null/none/memtest/config.ini @@ -8,15 +8,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 funcbus funcmem l2c membus physmem toL2Bus +children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 cpu_clk_domain funcbus funcmem l2c membus physmem toL2Bus voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 mem_mode=timing mem_ranges= -memories=system.funcmem system.physmem +memories=system.physmem system.funcmem num_work_ids=16 readfile= symbolfile= @@ -29,11 +30,16 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[1] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu0] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -51,10 +57,10 @@ test=system.cpu0.l1c.cpu_side [system.cpu0.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -65,17 +71,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu0.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu0.test mem_side=system.toL2Bus.slave[0] +[system.cpu0.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu1] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -93,10 +108,10 @@ test=system.cpu1.l1c.cpu_side [system.cpu1.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -107,17 +122,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu1.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu1.test mem_side=system.toL2Bus.slave[1] +[system.cpu1.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu2] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -135,10 +159,10 @@ test=system.cpu2.l1c.cpu_side [system.cpu2.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -149,17 +173,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu2.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu2.test mem_side=system.toL2Bus.slave[2] +[system.cpu2.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu3] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -177,10 +210,10 @@ test=system.cpu3.l1c.cpu_side [system.cpu3.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -191,17 +224,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu3.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu3.test mem_side=system.toL2Bus.slave[3] +[system.cpu3.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu4] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -219,10 +261,10 @@ test=system.cpu4.l1c.cpu_side [system.cpu4.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -233,17 +275,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu4.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu4.test mem_side=system.toL2Bus.slave[4] +[system.cpu4.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu5] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -261,10 +312,10 @@ test=system.cpu5.l1c.cpu_side [system.cpu5.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -275,17 +326,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu5.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu5.test mem_side=system.toL2Bus.slave[5] +[system.cpu5.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu6] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -303,10 +363,10 @@ test=system.cpu6.l1c.cpu_side [system.cpu6.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -317,17 +377,26 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu6.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu6.test mem_side=system.toL2Bus.slave[6] +[system.cpu6.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + [system.cpu7] type=MemTest children=l1c atomic=false -clock=500 +clk_domain=system.cpu_clk_domain issue_dmas=false max_loads=100000 memory_size=65536 @@ -345,10 +414,10 @@ test=system.cpu7.l1c.cpu_side [system.cpu7.l1c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=4 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -359,16 +428,29 @@ prefetcher=Null response_latency=2 size=32768 system=system +tags=system.cpu7.l1c.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu7.test mem_side=system.toL2Bus.slave[7] +[system.cpu7.l1c.tags] +type=LRU +assoc=4 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=32768 + +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.funcbus] type=NoncoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 use_default_range=false width=8 @@ -378,22 +460,21 @@ slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional syste [system.funcmem] type=SimpleMemory bandwidth=73.000000 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true in_addr_map=false latency=30000 latency_var=0 null=false range=0:134217727 -zero=false port=system.funcbus.master[0] [system.l2c] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=8 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=20 is_top_level=false @@ -404,16 +485,24 @@ prefetcher=Null response_latency=20 size=65536 system=system +tags=system.l2c.tags tgts_per_mshr=12 two_queue=false write_buffers=8 cpu_side=system.toL2Bus.master[0] mem_side=system.membus.slave[0] +[system.l2c.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=20 +size=65536 + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 system=system use_default_range=false @@ -424,20 +513,18 @@ slave=system.l2c.mem_side system.system_port [system.physmem] type=SimpleMemory bandwidth=73.000000 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 -zero=false port=system.membus.master[0] [system.toL2Bus] type=CoherentBus -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain header_cycles=1 system=system use_default_range=false @@ -445,3 +532,7 @@ width=16 master=system.l2c.cpu_side slave=system.cpu0.l1c.mem_side system.cpu1.l1c.mem_side system.cpu2.l1c.mem_side system.cpu3.l1c.mem_side system.cpu4.l1c.mem_side system.cpu5.l1c.mem_side system.cpu6.l1c.mem_side system.cpu7.l1c.mem_side +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + |