regressions: update stats due to branch predictor changes

The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.

8 files changed, 160 insertions, 204 deletions

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
index 8fc3158b8..07ef89806 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
@@ -16,7 +16,7 @@ kernel=
 load_addr_mask=1099511627775
 mem_mode=timing
 mem_ranges=
-memories=system.funcmem system.physmem
+memories=system.physmem system.funcmem
 num_work_ids=16
 readfile=
 symbolfile=
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
index 1eaf6be73..4a52344b3 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
@@ -1,24 +1,24 @@
-Real time: Jan/14/2013 08:13:32
+Real time: Jan/23/2013 14:04:13
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 46
-Elapsed_time_in_minutes: 0.766667
-Elapsed_time_in_hours: 0.0127778
-Elapsed_time_in_days: 0.000532407
+Elapsed_time_in_seconds: 79
+Elapsed_time_in_minutes: 1.31667
+Elapsed_time_in_hours: 0.0219444
+Elapsed_time_in_days: 0.000914352
 
-Virtual_time_in_seconds: 46.4
-Virtual_time_in_minutes: 0.773333
-Virtual_time_in_hours:   0.0128889
-Virtual_time_in_days:    0.000537037
+Virtual_time_in_seconds: 47.52
+Virtual_time_in_minutes: 0.792
+Virtual_time_in_hours:   0.0132
+Virtual_time_in_days:    0.00055
 
 Ruby_current_time: 8664886
 Ruby_start_time: 0
 Ruby_cycles: 8664886
 
-mbytes_resident: 70.9336
-mbytes_total: 415.473
-resident_ratio: 0.170758
+mbytes_resident: 71.0234
+mbytes_total: 415.48
+resident_ratio: 0.170971
 
 ruby_cycles_executed: [ 8664887 8664887 8664887 8664887 8664887 8664887 8664887 8664887 ]
 
@@ -82,13 +82,13 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 22 count: 1237687 average: 0.00723931
 Resource Usage
 --------------
 page_size: 4096
-user_time: 46
+user_time: 47
 system_time: 0
-page_reclaims: 10183
+page_reclaims: 10782
 page_faults: 0
 swaps: 0
-block_inputs: 0
-block_outputs: 200
+block_inputs: 16
+block_outputs: 720
 
 Network Stats
 -------------
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
index cc306c62c..2794962f3 100755
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
@@ -3,8 +3,8 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memt
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Nov 10 2012 16:31:57
-gem5 started Nov 10 2012 16:32:41
+gem5 compiled Jan 23 2013 13:29:14
+gem5 started Jan 23 2013 14:02:54
 gem5 executing on ribera.cs.wisc.edu
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby
 Global frequency set at 1000000000 ticks per second
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
index 18c37b3f8..e20a29e2b 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
@@ -4,9 +4,9 @@ sim_seconds                                  0.008665                       # Nu
 sim_ticks                                     8664886                       # Number of ticks simulated
 final_tick                                    8664886                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                 187879                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 425448                       # Number of bytes of host memory used
-host_seconds                                    46.12                       # Real time elapsed on the host
+host_tick_rate                                 109516                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 425456                       # Number of bytes of host memory used
+host_seconds                                    79.12                       # Real time elapsed on the host
 system.ruby.l1_cntrl4.cacheMemory.num_data_array_reads            0                       # number of data array reads
 system.ruby.l1_cntrl4.cacheMemory.num_data_array_writes            0                       # number of data array writes
 system.ruby.l1_cntrl4.cacheMemory.num_tag_array_reads            0                       # number of tag array reads
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini
index a24f176d8..120840f6d 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini
@@ -10,11 +10,12 @@ time_sync_spin_threshold=100000000
 type=System
 children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 funcbus funcmem l2c membus physmem toL2Bus
 boot_osflags=a
-clock=1
+clock=1000
 init_param=0
 kernel=
 load_addr_mask=1099511627775
 mem_mode=timing
+mem_ranges=
 memories=system.physmem system.funcmem
 num_work_ids=16
 readfile=
@@ -32,7 +33,7 @@ system_port=system.membus.slave[1]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -53,23 +54,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu0.test
@@ -79,7 +75,7 @@ mem_side=system.toL2Bus.slave[0]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -100,23 +96,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu1.test
@@ -126,7 +117,7 @@ mem_side=system.toL2Bus.slave[1]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -147,23 +138,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu2.test
@@ -173,7 +159,7 @@ mem_side=system.toL2Bus.slave[2]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -194,23 +180,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu3.test
@@ -220,7 +201,7 @@ mem_side=system.toL2Bus.slave[3]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -241,23 +222,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu4.test
@@ -267,7 +243,7 @@ mem_side=system.toL2Bus.slave[4]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -288,23 +264,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu5.test
@@ -314,7 +285,7 @@ mem_side=system.toL2Bus.slave[5]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -335,23 +306,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu6.test
@@ -361,7 +327,7 @@ mem_side=system.toL2Bus.slave[6]
 type=MemTest
 children=l1c
 atomic=false
-clock=1
+clock=500
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -382,23 +348,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=4
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=12
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=32768
-subblock_size=0
 system=system
-tgts_per_mshr=8
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu7.test
@@ -417,7 +378,7 @@ slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional syste
 [system.funcmem]
 type=SimpleMemory
 bandwidth=73.000000
-clock=1
+clock=1000
 conf_table_reported=false
 in_addr_map=false
 latency=30000
@@ -432,23 +393,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=8
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=10000
+hit_latency=20
 is_top_level=false
 max_miss_count=0
-mshrs=92
+mshrs=20
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=10000
+response_latency=20
 size=65536
-subblock_size=0
 system=system
-tgts_per_mshr=16
-trace_addr=0
+tgts_per_mshr=12
 two_queue=false
 write_buffers=8
 cpu_side=system.toL2Bus.master[0]
@@ -457,7 +413,7 @@ mem_side=system.membus.slave[0]
 [system.membus]
 type=CoherentBus
 block_size=64
-clock=2
+clock=1000
 header_cycles=1
 use_default_range=false
 width=16
@@ -467,7 +423,7 @@ slave=system.l2c.mem_side system.system_port
 [system.physmem]
 type=SimpleMemory
 bandwidth=73.000000
-clock=1
+clock=1000
 conf_table_reported=false
 in_addr_map=true
 latency=30000
@@ -480,7 +436,7 @@ port=system.membus.master[0]
 [system.toL2Bus]
 type=CoherentBus
 block_size=64
-clock=2
+clock=500
 header_cycles=1
 use_default_range=false
 width=16
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr
index 41e8d0489..ac8f30c3e 100755
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr
@@ -1,74 +1,74 @@
-system.cpu0: completed 10000 read, 5290 write accesses @74885500
-system.cpu7: completed 10000 read, 5447 write accesses @78072500
-system.cpu2: completed 10000 read, 5330 write accesses @78536500
-system.cpu5: completed 10000 read, 5401 write accesses @79479500
-system.cpu3: completed 10000 read, 5406 write accesses @80479500
-system.cpu1: completed 10000 read, 5452 write accesses @80823500
-system.cpu4: completed 10000 read, 5330 write accesses @82914500
-system.cpu6: completed 10000 read, 5363 write accesses @83627000
-system.cpu7: completed 20000 read, 10668 write accesses @150917000
-system.cpu0: completed 20000 read, 10683 write accesses @151253500
-system.cpu5: completed 20000 read, 10718 write accesses @151911500
-system.cpu2: completed 20000 read, 10688 write accesses @152119000
-system.cpu3: completed 20000 read, 10954 write accesses @159391000
-system.cpu6: completed 20000 read, 10780 write accesses @160278500
-system.cpu1: completed 20000 read, 10888 write accesses @160835000
-system.cpu4: completed 20000 read, 10745 write accesses @162137000
-system.cpu2: completed 30000 read, 16060 write accesses @225600500
-system.cpu0: completed 30000 read, 16073 write accesses @226217000
-system.cpu7: completed 30000 read, 15898 write accesses @227550500
-system.cpu5: completed 30000 read, 16102 write accesses @230201000
-system.cpu3: completed 30000 read, 16375 write accesses @233880500
-system.cpu1: completed 30000 read, 16184 write accesses @234964500
-system.cpu6: completed 30000 read, 16132 write accesses @236785500
-system.cpu4: completed 30000 read, 16103 write accesses @242571500
-system.cpu7: completed 40000 read, 21206 write accesses @298942500
-system.cpu2: completed 40000 read, 21441 write accesses @299465500
-system.cpu0: completed 40000 read, 21388 write accesses @302202500
-system.cpu5: completed 40000 read, 21578 write accesses @308632000
-system.cpu6: completed 40000 read, 21492 write accesses @314697500
-system.cpu3: completed 40000 read, 22088 write accesses @315960000
-system.cpu4: completed 40000 read, 21590 write accesses @317147500
-system.cpu1: completed 40000 read, 21566 write accesses @317423500
-system.cpu7: completed 50000 read, 26570 write accesses @373251000
-system.cpu2: completed 50000 read, 26788 write accesses @373919000
-system.cpu0: completed 50000 read, 26897 write accesses @382805000
-system.cpu5: completed 50000 read, 27003 write accesses @384437500
-system.cpu3: completed 50000 read, 27349 write accesses @389623000
-system.cpu4: completed 50000 read, 26792 write accesses @389830500
-system.cpu6: completed 50000 read, 27002 write accesses @392270000
-system.cpu1: completed 50000 read, 26853 write accesses @392392000
-system.cpu7: completed 60000 read, 31855 write accesses @449936000
-system.cpu2: completed 60000 read, 32201 write accesses @452901500
-system.cpu0: completed 60000 read, 32209 write accesses @457331000
-system.cpu5: completed 60000 read, 32356 write accesses @458864500
-system.cpu4: completed 60000 read, 32204 write accesses @464577500
-system.cpu3: completed 60000 read, 32813 write accesses @468126500
-system.cpu6: completed 60000 read, 32463 write accesses @469913500
-system.cpu1: completed 60000 read, 32376 write accesses @472262000
-system.cpu7: completed 70000 read, 37203 write accesses @526760000
-system.cpu2: completed 70000 read, 37525 write accesses @530661000
-system.cpu5: completed 70000 read, 37749 write accesses @533141500
-system.cpu0: completed 70000 read, 37615 write accesses @537691500
-system.cpu3: completed 70000 read, 38216 write accesses @538787500
-system.cpu4: completed 70000 read, 37614 write accesses @545810500
-system.cpu6: completed 70000 read, 37722 write accesses @546307000
-system.cpu1: completed 70000 read, 37746 write accesses @546660500
-system.cpu7: completed 80000 read, 42460 write accesses @600681000
-system.cpu5: completed 80000 read, 42949 write accesses @604308500
-system.cpu2: completed 80000 read, 42841 write accesses @606628000
-system.cpu0: completed 80000 read, 43072 write accesses @615043500
-system.cpu3: completed 80000 read, 43808 write accesses @615907000
-system.cpu4: completed 80000 read, 43047 write accesses @622672500
-system.cpu6: completed 80000 read, 43213 write accesses @622720000
-system.cpu1: completed 80000 read, 43140 write accesses @626035000
-system.cpu2: completed 90000 read, 48140 write accesses @675974000
-system.cpu7: completed 90000 read, 48058 write accesses @680921000
-system.cpu5: completed 90000 read, 48486 write accesses @683376500
-system.cpu3: completed 90000 read, 49174 write accesses @687533500
-system.cpu0: completed 90000 read, 48447 write accesses @690023000
-system.cpu6: completed 90000 read, 48621 write accesses @702298000
-system.cpu4: completed 90000 read, 48429 write accesses @703717000
-system.cpu1: completed 90000 read, 48600 write accesses @705675000
-system.cpu2: completed 100000 read, 53454 write accesses @753126500
+system.cpu4: completed 10000 read, 5213 write accesses @76807500
+system.cpu7: completed 10000 read, 5302 write accesses @79251000
+system.cpu3: completed 10000 read, 5351 write accesses @81062000
+system.cpu5: completed 10000 read, 5541 write accesses @82066500
+system.cpu1: completed 10000 read, 5479 write accesses @82140500
+system.cpu2: completed 10000 read, 5270 write accesses @82209500
+system.cpu6: completed 10000 read, 5352 write accesses @82224000
+system.cpu0: completed 10000 read, 5437 write accesses @83502000
+system.cpu4: completed 20000 read, 10638 write accesses @152852500
+system.cpu7: completed 20000 read, 10671 write accesses @153245500
+system.cpu5: completed 20000 read, 10802 write accesses @155921500
+system.cpu1: completed 20000 read, 10780 write accesses @157898500
+system.cpu3: completed 20000 read, 10762 write accesses @158207000
+system.cpu2: completed 20000 read, 10562 write accesses @158441500
+system.cpu6: completed 20000 read, 10817 write accesses @160812000
+system.cpu0: completed 20000 read, 10942 write accesses @162138000
+system.cpu4: completed 30000 read, 15885 write accesses @226882500
+system.cpu7: completed 30000 read, 16162 write accesses @230488000
+system.cpu1: completed 30000 read, 15996 write accesses @231220000
+system.cpu5: completed 30000 read, 16227 write accesses @232272500
+system.cpu3: completed 30000 read, 16181 write accesses @234012000
+system.cpu6: completed 30000 read, 16285 write accesses @236458500
+system.cpu2: completed 30000 read, 16117 write accesses @236552000
+system.cpu0: completed 30000 read, 16426 write accesses @240306500
+system.cpu4: completed 40000 read, 21151 write accesses @301825500
+system.cpu7: completed 40000 read, 21649 write accesses @305825500
+system.cpu1: completed 40000 read, 21293 write accesses @308437500
+system.cpu3: completed 40000 read, 21436 write accesses @308497500
+system.cpu5: completed 40000 read, 21614 write accesses @310554000
+system.cpu2: completed 40000 read, 21323 write accesses @312243500
+system.cpu6: completed 40000 read, 21541 write accesses @312536000
+system.cpu0: completed 40000 read, 21919 write accesses @320331000
+system.cpu4: completed 50000 read, 26446 write accesses @376676500
+system.cpu7: completed 50000 read, 26971 write accesses @382643500
+system.cpu1: completed 50000 read, 26742 write accesses @382692500
+system.cpu3: completed 50000 read, 26868 write accesses @383729000
+system.cpu5: completed 50000 read, 26982 write accesses @388892000
+system.cpu2: completed 50000 read, 26690 write accesses @389746500
+system.cpu6: completed 50000 read, 26890 write accesses @390639500
+system.cpu0: completed 50000 read, 27239 write accesses @394395001
+system.cpu4: completed 60000 read, 31859 write accesses @454814000
+system.cpu3: completed 60000 read, 32157 write accesses @455574000
+system.cpu1: completed 60000 read, 32039 write accesses @458833000
+system.cpu7: completed 60000 read, 32494 write accesses @460248000
+system.cpu2: completed 60000 read, 32094 write accesses @465749500
+system.cpu5: completed 60000 read, 32378 write accesses @466634000
+system.cpu6: completed 60000 read, 32333 write accesses @468161500
+system.cpu0: completed 60000 read, 32569 write accesses @469644500
+system.cpu3: completed 70000 read, 37524 write accesses @531095000
+system.cpu4: completed 70000 read, 37387 write accesses @531724000
+system.cpu1: completed 70000 read, 37455 write accesses @534864500
+system.cpu2: completed 70000 read, 37386 write accesses @539742500
+system.cpu7: completed 70000 read, 38025 write accesses @540171500
+system.cpu5: completed 70000 read, 37779 write accesses @540661000
+system.cpu0: completed 70000 read, 37912 write accesses @543002000
+system.cpu6: completed 70000 read, 37876 write accesses @544926000
+system.cpu4: completed 80000 read, 42765 write accesses @607648000
+system.cpu3: completed 80000 read, 42947 write accesses @608627500
+system.cpu1: completed 80000 read, 42804 write accesses @612176500
+system.cpu5: completed 80000 read, 43215 write accesses @614679500
+system.cpu2: completed 80000 read, 42837 write accesses @616130500
+system.cpu7: completed 80000 read, 43372 write accesses @618251000
+system.cpu0: completed 80000 read, 43388 write accesses @620992000
+system.cpu6: completed 80000 read, 43420 write accesses @622851000
+system.cpu4: completed 90000 read, 48066 write accesses @681361000
+system.cpu3: completed 90000 read, 48251 write accesses @683201500
+system.cpu1: completed 90000 read, 48377 write accesses @690035500
+system.cpu5: completed 90000 read, 48546 write accesses @692142000
+system.cpu2: completed 90000 read, 48240 write accesses @693946000
+system.cpu7: completed 90000 read, 48816 write accesses @696757000
+system.cpu0: completed 90000 read, 48758 write accesses @697163500
+system.cpu6: completed 90000 read, 48649 write accesses @698059000
+system.cpu4: completed 100000 read, 53418 write accesses @758619000
 hack: be nice to actually delete the event here
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout
index 8e44f53e1..86075abc3 100755
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout
@@ -3,10 +3,10 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memt
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Oct 15 2012 19:23:25
-gem5 started Oct 15 2012 19:23:52
+gem5 compiled Jan 23 2013 13:29:14
+gem5 started Jan 23 2013 13:46:00
 gem5 executing on ribera.cs.wisc.edu
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest -re tests/run.py build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 753126500 because maximum number of loads reached
+Exiting @ tick 758619000 because maximum number of loads reached
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt
index cd5a28936..159c48ed1 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt
@@ -4,9 +4,9 @@ sim_seconds                                  0.000759                       # Nu
 sim_ticks                                   758619000                       # Number of ticks simulated
 final_tick                                  758619000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_tick_rate                              151805189                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 345224                       # Number of bytes of host memory used
-host_seconds                                     5.00                       # Real time elapsed on the host
+host_tick_rate                               45315591                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 399988                       # Number of bytes of host memory used
+host_seconds                                    16.74                       # Real time elapsed on the host
 system.physmem.bytes_read::cpu0                 93443                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu1                 93419                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu2                 89535                       # Number of bytes read from this memory