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authorNilay Vaish <nilay@cs.wisc.edu>2012-12-11 10:06:01 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2012-12-11 10:06:01 -0600
commit141ee3879459eea62d6176119fbc2c432a5fb124 (patch)
tree495c71e7c8b3e8b726d5111277ef5b99377b35a7 /tests/quick/se/50.memtest
parentf3d0be210f889da927d921d21a6c27ba94fde746 (diff)
downloadgem5-141ee3879459eea62d6176119fbc2c432a5fb124.tar.xz
regressions: stats update due to stats from ruby prefetcher
Diffstat (limited to 'tests/quick/se/50.memtest')
-rw-r--r--tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini112
-rw-r--r--tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats99
-rw-r--r--tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt78
3 files changed, 261 insertions, 28 deletions
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
index 32e26ce07..5acc18975 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
@@ -250,15 +250,17 @@ port=system.funcbus.master[0]
[system.l1_cntrl0]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory
buffer_size=0
cntrl_id=0
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl0.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -295,6 +297,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl0.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl0.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -314,15 +326,17 @@ slave=system.cpu0.test
[system.l1_cntrl1]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory
buffer_size=0
cntrl_id=1
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl1.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -359,6 +373,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl1.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl1.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -378,15 +402,17 @@ slave=system.cpu1.test
[system.l1_cntrl2]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory
buffer_size=0
cntrl_id=2
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl2.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -423,6 +449,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl2.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl2.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -442,15 +478,17 @@ slave=system.cpu2.test
[system.l1_cntrl3]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory
buffer_size=0
cntrl_id=3
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl3.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -487,6 +525,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl3.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl3.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -506,15 +554,17 @@ slave=system.cpu3.test
[system.l1_cntrl4]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory
buffer_size=0
cntrl_id=4
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl4.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -551,6 +601,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl4.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl4.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -570,15 +630,17 @@ slave=system.cpu4.test
[system.l1_cntrl5]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory
buffer_size=0
cntrl_id=5
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl5.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -615,6 +677,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl5.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl5.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -634,15 +706,17 @@ slave=system.cpu5.test
[system.l1_cntrl6]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory
buffer_size=0
cntrl_id=6
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl6.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -679,6 +753,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl6.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl6.sequencer]
type=RubySequencer
access_phys_mem=false
@@ -698,15 +782,17 @@ slave=system.cpu6.test
[system.l1_cntrl7]
type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory sequencer
+children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory
L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory
buffer_size=0
cntrl_id=7
+enable_prefetch=false
l1_request_latency=2
l1_response_latency=2
l2_select_num_bits=0
number_of_TBEs=256
+prefetcher=system.l1_cntrl7.prefetcher
recycle_latency=10
ruby_system=system.ruby
send_evictions=false
@@ -743,6 +829,16 @@ start_index_bit=6
tagAccessLatency=1
tagArrayBanks=1
+[system.l1_cntrl7.prefetcher]
+type=Prefetcher
+cross_page=false
+nonunit_filter=8
+num_startup_pfs=1
+num_streams=4
+pf_per_stream=1
+train_misses=4
+unit_filter=8
+
[system.l1_cntrl7.sequencer]
type=RubySequencer
access_phys_mem=false
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
index d5c8c0e23..8b52d5805 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
@@ -1,24 +1,24 @@
-Real time: Nov/10/2012 16:12:59
+Real time: Dec/11/2012 09:13:04
Profiler Stats
--------------
-Elapsed_time_in_seconds: 104
-Elapsed_time_in_minutes: 1.73333
-Elapsed_time_in_hours: 0.0288889
-Elapsed_time_in_days: 0.0012037
+Elapsed_time_in_seconds: 164
+Elapsed_time_in_minutes: 2.73333
+Elapsed_time_in_hours: 0.0455556
+Elapsed_time_in_days: 0.00189815
-Virtual_time_in_seconds: 104.72
-Virtual_time_in_minutes: 1.74533
-Virtual_time_in_hours: 0.0290889
-Virtual_time_in_days: 0.00121204
+Virtual_time_in_seconds: 103.36
+Virtual_time_in_minutes: 1.72267
+Virtual_time_in_hours: 0.0287111
+Virtual_time_in_days: 0.0011963
Ruby_current_time: 7257449
Ruby_start_time: 0
Ruby_cycles: 7257449
-mbytes_resident: 71.043
-mbytes_total: 409.262
-resident_ratio: 0.173598
+mbytes_resident: 71.4336
+mbytes_total: 409.793
+resident_ratio: 0.174345
ruby_cycles_executed: [ 7257450 7257450 7257450 7257450 7257450 7257450 7257450 7257450 ]
@@ -80,13 +80,13 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 36 count: 3321263 average: 1.55988 |
Resource Usage
--------------
page_size: 4096
-user_time: 104
+user_time: 103
system_time: 0
-page_reclaims: 9518
-page_faults: 95
+page_reclaims: 9692
+page_faults: 0
swaps: 0
-block_inputs: 14064
-block_outputs: 248
+block_inputs: 0
+block_outputs: 296
Network Stats
-------------
@@ -331,6 +331,9 @@ Data_all_Acks [27578 27207 27259 27370 27420 27295 27237 27204 ] 218570
Ack [3 2 1 1 1 2 1 0 ] 11
Ack_all [3 2 1 1 1 2 1 0 ] 11
WB_Ack [40309 39563 40425 40081 40110 39623 40034 39662 ] 319807
+PF_Load [0 0 0 0 0 0 0 0 ] 0
+PF_Ifetch [0 0 0 0 0 0 0 0 ] 0
+PF_Store [0 0 0 0 0 0 0 0 ] 0
- Transitions -
NP Load [49736 49359 50040 49632 49768 49368 49506 49370 ] 396779
@@ -338,18 +341,26 @@ NP Ifetch [0 0 0 0 0 0 0 0 ] 0
NP Store [26890 26593 26629 26744 26783 26673 26639 26570 ] 213521
NP Inv [420 399 405 385 436 404 386 385 ] 3220
NP L1_Replacement [0 0 0 0 0 0 0 0 ] 0
+NP PF_Load [0 0 0 0 0 0 0 0 ] 0
+NP PF_Ifetch [0 0 0 0 0 0 0 0 ] 0
+NP PF_Store [0 0 0 0 0 0 0 0 ] 0
I Load [9 8 4 8 8 9 9 9 ] 64
I Ifetch [0 0 0 0 0 0 0 0 ] 0
I Store [6 6 2 2 2 6 11 4 ] 39
I Inv [0 0 0 0 0 0 0 0 ] 0
I L1_Replacement [35950 36049 35879 35962 36061 36066 35776 35948 ] 287691
+I PF_Load [0 0 0 0 0 0 0 0 ] 0
+I PF_Ifetch [0 0 0 0 0 0 0 0 ] 0
+I PF_Store [0 0 0 0 0 0 0 0 ] 0
S Load [0 0 0 0 0 0 0 0 ] 0
S Ifetch [0 0 0 0 0 0 0 0 ] 0
S Store [0 0 0 0 0 0 0 0 ] 0
S Inv [526 446 511 500 475 488 482 528 ] 3956
S L1_Replacement [361 336 360 328 375 347 329 325 ] 2761
+S PF_Load [0 0 0 0 0 0 0 0 ] 0
+S PF_Store [0 0 0 0 0 0 0 0 ] 0
E Load [1 0 0 2 2 0 0 0 ] 5
E Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -359,6 +370,8 @@ E L1_Replacement [26159 25558 26202 25901 26080 25475 25987 25671 ] 207033
E Fwd_GETX [56 56 77 52 47 55 52 62 ] 457
E Fwd_GETS [14 7 7 7 7 9 12 5 ] 68
E Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
+E PF_Load [0 0 0 0 0 0 0 0 ] 0
+E PF_Store [0 0 0 0 0 0 0 0 ] 0
M Load [1 1 0 0 0 0 0 1 ] 3
M Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -368,6 +381,8 @@ M L1_Replacement [14152 14005 14224 14181 14031 14149 14049 13992 ] 112783
M Fwd_GETX [26 36 27 32 34 25 30 32 ] 242
M Fwd_GETS [54 40 53 61 59 60 61 63 ] 451
M Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
+M PF_Load [0 0 0 0 0 0 0 0 ] 0
+M PF_Store [0 0 0 0 0 0 0 0 ] 0
IS Load [0 0 0 0 0 0 0 0 ] 0
IS Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -377,6 +392,8 @@ IS L1_Replacement [297188 294582 298840 297864 297388 295578 296859 294148 ] 23
IS Data_Exclusive [48923 48630 49230 48877 48989 48607 48775 48593 ] 390624
IS DataS_fromL1 [133 124 182 136 147 148 149 152 ] 1171
IS Data_all_Acks [686 611 629 624 637 618 589 633 ] 5027
+IS PF_Load [0 0 0 0 0 0 0 0 ] 0
+IS PF_Store [0 0 0 0 0 0 0 0 ] 0
IM Load [0 0 0 0 0 0 0 0 ] 0
IM Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -386,6 +403,8 @@ IM L1_Replacement [159689 159963 157731 158595 159682 159314 158837 157683 ] 12
IM Data [3 2 1 1 1 2 1 0 ] 11
IM Data_all_Acks [26892 26596 26629 26745 26783 26677 26648 26571 ] 213541
IM Ack [0 0 0 0 0 0 0 0 ] 0
+IM PF_Load [0 0 0 0 0 0 0 0 ] 0
+IM PF_Store [0 0 0 0 0 0 0 0 ] 0
SM Load [0 0 0 0 0 0 0 0 ] 0
SM Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -394,6 +413,8 @@ SM Inv [0 0 0 0 0 0 0 0 ] 0
SM L1_Replacement [0 0 0 0 0 0 0 0 ] 0
SM Ack [3 2 1 1 1 2 1 0 ] 11
SM Ack_all [3 2 1 1 1 2 1 0 ] 11
+SM PF_Load [0 0 0 0 0 0 0 0 ] 0
+SM PF_Store [0 0 0 0 0 0 0 0 ] 0
IS_I Load [0 0 0 0 0 0 0 0 ] 0
IS_I Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -403,6 +424,8 @@ IS_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
IS_I Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
IS_I DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
IS_I Data_all_Acks [0 0 1 1 0 0 0 0 ] 2
+IS_I PF_Load [0 0 0 0 0 0 0 0 ] 0
+IS_I PF_Store [0 0 0 0 0 0 0 0 ] 0
M_I Load [0 0 0 0 0 0 0 0 ] 0
M_I Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -413,6 +436,8 @@ M_I Fwd_GETX [133 112 108 132 117 140 116 106 ] 964
M_I Fwd_GETS [81 82 73 74 93 82 80 87 ] 652
M_I Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
M_I WB_Ack [2584 2356 2484 2618 2624 2482 2530 2483 ] 20161
+M_I PF_Load [0 0 0 0 0 0 0 0 ] 0
+M_I PF_Store [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK Load [0 0 0 0 0 0 1 1 ] 2
SINK_WB_ACK Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -420,6 +445,46 @@ SINK_WB_ACK Store [1 0 0 0 0 0 0 0 ] 1
SINK_WB_ACK Inv [22 19 28 17 32 25 23 27 ] 193
SINK_WB_ACK L1_Replacement [0 0 0 0 0 0 0 0 ] 0
SINK_WB_ACK WB_Ack [37725 37207 37941 37463 37486 37141 37504 37179 ] 299646
+SINK_WB_ACK PF_Load [0 0 0 0 0 0 0 0 ] 0
+SINK_WB_ACK PF_Store [0 0 0 0 0 0 0 0 ] 0
+
+PF_IS Load [0 0 0 0 0 0 0 0 ] 0
+PF_IS Ifetch [0 0 0 0 0 0 0 0 ] 0
+PF_IS Store [0 0 0 0 0 0 0 0 ] 0
+PF_IS Inv [0 0 0 0 0 0 0 0 ] 0
+PF_IS L1_Replacement [0 0 0 0 0 0 0 0 ] 0
+PF_IS Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
+PF_IS DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
+PF_IS Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
+PF_IS PF_Load [0 0 0 0 0 0 0 0 ] 0
+PF_IS PF_Store [0 0 0 0 0 0 0 0 ] 0
+
+PF_IM Load [0 0 0 0 0 0 0 0 ] 0
+PF_IM Ifetch [0 0 0 0 0 0 0 0 ] 0
+PF_IM Store [0 0 0 0 0 0 0 0 ] 0
+PF_IM Inv [0 0 0 0 0 0 0 0 ] 0
+PF_IM L1_Replacement [0 0 0 0 0 0 0 0 ] 0
+PF_IM Data [0 0 0 0 0 0 0 0 ] 0
+PF_IM Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
+PF_IM Ack [0 0 0 0 0 0 0 0 ] 0
+PF_IM PF_Load [0 0 0 0 0 0 0 0 ] 0
+PF_IM PF_Store [0 0 0 0 0 0 0 0 ] 0
+
+PF_SM Load [0 0 0 0 0 0 0 0 ] 0
+PF_SM Ifetch [0 0 0 0 0 0 0 0 ] 0
+PF_SM Store [0 0 0 0 0 0 0 0 ] 0
+PF_SM Inv [0 0 0 0 0 0 0 0 ] 0
+PF_SM L1_Replacement [0 0 0 0 0 0 0 0 ] 0
+PF_SM Ack [0 0 0 0 0 0 0 0 ] 0
+PF_SM Ack_all [0 0 0 0 0 0 0 0 ] 0
+
+PF_IS_I Load [0 0 0 0 0 0 0 0 ] 0
+PF_IS_I Store [0 0 0 0 0 0 0 0 ] 0
+PF_IS_I Inv [0 0 0 0 0 0 0 0 ] 0
+PF_IS_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0
+PF_IS_I Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
+PF_IS_I DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
+PF_IS_I Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
Cache Stats: system.l1_cntrl1.L1IcacheMemory
system.l1_cntrl1.L1IcacheMemory_total_misses: 0
diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
index f01dfc83f..5e837a981 100644
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
@@ -4,9 +4,9 @@ sim_seconds 0.007257 # Nu
sim_ticks 7257449 # Number of ticks simulated
final_tick 7257449 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_tick_rate 69452 # Simulator tick rate (ticks/s)
-host_mem_usage 419088 # Number of bytes of host memory used
-host_seconds 104.50 # Real time elapsed on the host
+host_tick_rate 44253 # Simulator tick rate (ticks/s)
+host_mem_usage 419632 # Number of bytes of host memory used
+host_seconds 164.00 # Real time elapsed on the host
system.l1_cntrl4.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl4.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -19,6 +19,15 @@ system.l1_cntrl4.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl4.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl4.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl4.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl4.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl4.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl4.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl4.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl4.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl4.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl4.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl4.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl4.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl5.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl5.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl5.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -31,6 +40,15 @@ system.l1_cntrl5.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl5.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl5.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl5.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl5.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl5.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl5.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl5.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl5.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl5.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl5.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl5.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl5.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl6.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl6.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl6.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -43,6 +61,15 @@ system.l1_cntrl6.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl6.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl6.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl6.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl6.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl6.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl6.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl6.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl6.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl6.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl6.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl6.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl6.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl7.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl7.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl7.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -55,6 +82,15 @@ system.l1_cntrl7.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl7.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl7.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl7.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl7.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl7.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl7.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl7.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl7.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl7.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl7.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl7.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl7.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -67,6 +103,15 @@ system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl0.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl0.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl0.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl1.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl1.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl1.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -79,6 +124,15 @@ system.l1_cntrl1.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl1.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl1.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl1.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl1.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl1.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl1.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl1.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl1.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl1.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl1.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl1.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl1.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl2.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl2.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl2.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -91,6 +145,15 @@ system.l1_cntrl2.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl2.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl2.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl2.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl2.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl2.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl2.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl2.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl2.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl2.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl2.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl2.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl2.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l1_cntrl3.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
system.l1_cntrl3.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
system.l1_cntrl3.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
@@ -103,6 +166,15 @@ system.l1_cntrl3.L1IcacheMemory.num_tag_array_reads 0
system.l1_cntrl3.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
system.l1_cntrl3.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
system.l1_cntrl3.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
+system.l1_cntrl3.prefetcher.miss_observed 0 # number of misses observed
+system.l1_cntrl3.prefetcher.allocated_streams 0 # number of streams allocated for prefetching
+system.l1_cntrl3.prefetcher.prefetches_requested 0 # number of prefetch requests made
+system.l1_cntrl3.prefetcher.prefetches_accepted 0 # number of prefetch requests accepted
+system.l1_cntrl3.prefetcher.dropped_prefetches 0 # number of prefetch requests dropped
+system.l1_cntrl3.prefetcher.hits 0 # number of prefetched blocks accessed
+system.l1_cntrl3.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched
+system.l1_cntrl3.prefetcher.pages_crossed 0 # number of prefetches across pages
+system.l1_cntrl3.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed
system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads