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author | Brad Beckmann <Brad.Beckmann@amd.com> | 2012-07-10 22:51:55 -0700 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2012-07-10 22:51:55 -0700 |
commit | b00fe08cc9338cb96a151a8cd3c3d1498c716989 (patch) | |
tree | e6fdf2b84d5c80ff492a9ff9522e860a7ccc1c7e /tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt | |
parent | 387f843d513dd80554cb6361da36ba805dfbcea2 (diff) | |
download | gem5-b00fe08cc9338cb96a151a8cd3c3d1498c716989.tar.xz |
regress: ruby stat additions and config changes
Diffstat (limited to 'tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt')
-rw-r--r-- | tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt index f6f4e6847..3aa96ab1f 100644 --- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt +++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt @@ -4,8 +4,26 @@ sim_seconds 0.000350 # Nu sim_ticks 349711 # Number of ticks simulated final_tick 349711 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 2288501 # Simulator tick rate (ticks/s) -host_mem_usage 221264 # Number of bytes of host memory used -host_seconds 0.15 # Real time elapsed on the host +host_tick_rate 1546655 # Simulator tick rate (ticks/s) +host_mem_usage 230968 # Number of bytes of host memory used +host_seconds 0.23 # Real time elapsed on the host +system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads +system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes +system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads +system.l1_cntrl0.L1DcacheMemory.num_tag_array_writes 0 # number of tag array writes +system.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array +system.l1_cntrl0.L1DcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array +system.l1_cntrl0.L1IcacheMemory.num_data_array_reads 0 # number of data array reads +system.l1_cntrl0.L1IcacheMemory.num_data_array_writes 0 # number of data array writes +system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0 # number of tag array reads +system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes +system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array +system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array +system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads +system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes +system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads +system.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes +system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array +system.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array ---------- End Simulation Statistics ---------- |