summaryrefslogtreecommitdiff
path: root/tests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2012-09-21 11:48:11 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-09-21 11:48:11 -0400
commitefea870fce8c00dbb8d5b9b33fe6fd0cf2e3b960 (patch)
tree35729f5ff93cde1982eb62306c0a0f403ae96f63 /tests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout
parentd75b1b5a7366c162ffca69b29901f4cb5e05895d (diff)
downloadgem5-efea870fce8c00dbb8d5b9b33fe6fd0cf2e3b960.tar.xz
TrafficGen: Add a basic traffic generator regression
This patch adds a basic regression for the traffic generator. The regression also serves as an example of the file formats used. More complex regressions that make use of a DRAM controller model will follow shortly.
Diffstat (limited to 'tests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout')
-rwxr-xr-xtests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout10
1 files changed, 10 insertions, 0 deletions
diff --git a/tests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout b/tests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout
new file mode 100755
index 000000000..727a89c99
--- /dev/null
+++ b/tests/quick/se/70.tgen/ref/arm/linux/tgen-simple-mem/simout
@@ -0,0 +1,10 @@
+gem5 Simulator System. http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
+
+gem5 compiled Aug 25 2012 13:56:00
+gem5 started Aug 25 2012 13:58:17
+gem5 executing on Andreas-MacBook-Pro.local
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.tgen/arm/linux/tgen-simple-mem -re tests/run.py build/ARM/tests/opt/quick/se/70.tgen/arm/linux/tgen-simple-mem
+Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
+Exiting @ tick 100000000000 because simulate() limit reached