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author | Ali Saidi <Ali.Saidi@ARM.com> | 2014-01-24 15:29:33 -0600 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2014-01-24 15:29:33 -0600 |
commit | f3585c841e964c98911784a187fc4f081a02a0a6 (patch) | |
tree | 2a5a3edeaeb0ffe37ca3a04b884f8f66c7538bbf /tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt | |
parent | cfc4a999828a5b51f4c514e3a7c47b4eebc450b9 (diff) | |
download | gem5-f3585c841e964c98911784a187fc4f081a02a0a6.tar.xz |
stats: update stats for cache occupancy and clock domain changes
Diffstat (limited to 'tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt')
-rw-r--r-- | tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt index 14b3c1d80..ead00396f 100644 --- a/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt +++ b/tests/quick/se/70.tgen/ref/null/none/tgen-simple-mem/stats.txt @@ -4,9 +4,11 @@ sim_seconds 0.100000 # Nu sim_ticks 100000000000 # Number of ticks simulated final_tick 100000000000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_tick_rate 8032030639 # Simulator tick rate (ticks/s) -host_mem_usage 228596 # Number of bytes of host memory used -host_seconds 12.45 # Real time elapsed on the host +host_tick_rate 14364594493 # Simulator tick rate (ticks/s) +host_mem_usage 195500 # Number of bytes of host memory used +host_seconds 6.96 # Real time elapsed on the host +system.clk_domain.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu 64 # Number of bytes read from this memory system.physmem.bytes_read::total 64 # Number of bytes read from this memory system.physmem.bytes_written::cpu 213329152 # Number of bytes written to this memory |