stats: bump stats to reflect ruby tester changes

6 files changed, 24 insertions, 24 deletions

diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
index f38bc42f7..74c17abe1 100644
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
@@ -215,7 +215,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf
+executable=/dist/m5/cpu2000/binaries/arm/linux/twolf
 gid=100
 input=cin
 kvmInSE=false
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout
index a9bfbb1db..51c0d90e7 100755
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout
@@ -1,13 +1,13 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Nov 15 2015 15:24:37
-gem5 started Nov 15 2015 15:25:24
-gem5 executing on ribera.cs.wisc.edu, pid 11057
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic
+gem5 compiled Dec 11 2015 20:46:46
+gem5 started Dec 11 2015 20:47:10
+gem5 executing on zizzer, pid 11547
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic -re /z/atgutier/gem5/gem5/tests/run.py build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic
 
+Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/smred.sav
+Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/smred.sv2
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
index 01fff93b4..df22b2153 100644
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.099596                       # Nu
 sim_ticks                                 99596491500                       # Number of ticks simulated
 final_tick                                99596491500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1150155                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1212449                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              664769571                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 303552                       # Number of bytes of host memory used
-host_seconds                                   149.82                       # Real time elapsed on the host
+host_inst_rate                                 676246                       # Simulator instruction rate (inst/s)
+host_op_rate                                   712872                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              390858173                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 241720                       # Number of bytes of host memory used
+host_seconds                                   254.82                       # Real time elapsed on the host
 sim_insts                                   172317410                       # Number of instructions simulated
 sim_ops                                     181650342                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini
index 4f19d94a5..9f4a8940a 100644
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini
@@ -345,7 +345,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf
+executable=/dist/m5/cpu2000/binaries/arm/linux/twolf
 gid=100
 input=cin
 kvmInSE=false
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout
index 0c6efa8ae..54bf73b2a 100755
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout
@@ -1,13 +1,13 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Nov 15 2015 15:24:37
-gem5 started Nov 15 2015 15:25:11
-gem5 executing on ribera.cs.wisc.edu, pid 11027
-command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing
+gem5 compiled Dec 11 2015 20:46:46
+gem5 started Dec 11 2015 20:47:11
+gem5 executing on zizzer, pid 11563
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing -re /z/atgutier/gem5/gem5/tests/run.py build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing
 
+Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/smred.sav
+Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/smred.sv2
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
index 058efd4de..6ded2a08d 100644
--- a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.230198                       # Nu
 sim_ticks                                230197694500                       # Number of ticks simulated
 final_tick                               230197694500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 733775                       # Simulator instruction rate (inst/s)
-host_op_rate                                   773584                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              982953876                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 313544                       # Number of bytes of host memory used
-host_seconds                                   234.19                       # Real time elapsed on the host
+host_inst_rate                                 497825                       # Simulator instruction rate (inst/s)
+host_op_rate                                   524833                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              666878578                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 251744                       # Number of bytes of host memory used
+host_seconds                                   345.19                       # Real time elapsed on the host
 sim_insts                                   171842484                       # Number of instructions simulated
 sim_ops                                     181165371                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts