diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2016-10-19 06:20:04 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-10-19 06:20:04 -0400 |
| commit | 607c2772915628c2c67c1c5bfdefaa33ae66a06e (patch) | |
| tree | f8f23fd4012f9a0053d65ac91792a7dc61d6baff /tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt | |
| parent | 71c982ff708cc3adc7c0eccf536fea34c20cc5f0 (diff) | |
| download | gem5-607c2772915628c2c67c1c5bfdefaa33ae66a06e.tar.xz | |
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding
reads/writes.
Diffstat (limited to 'tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt')
| -rw-r--r-- | tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt index 24b1a8bcb..b7cc9a760 100644 --- a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt +++ b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.131393 # Nu sim_ticks 131393279000 # Number of ticks simulated final_tick 131393279000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1175193 # Simulator instruction rate (inst/s) -host_op_rate 1969730 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1169160517 # Simulator tick rate (ticks/s) -host_mem_usage 289616 # Number of bytes of host memory used -host_seconds 112.38 # Real time elapsed on the host +host_inst_rate 1535006 # Simulator instruction rate (inst/s) +host_op_rate 2572810 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1527126307 # Simulator tick rate (ticks/s) +host_mem_usage 288212 # Number of bytes of host memory used +host_seconds 86.04 # Real time elapsed on the host sim_insts 132071193 # Number of instructions simulated sim_ops 221363385 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -77,7 +77,9 @@ system.cpu.op_class::FloatAdd 1105073 0.50% 65.14% # Cl system.cpu.op_class::FloatCmp 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatCvt 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatMult 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::FloatMultAcc 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatDiv 0 0.00% 65.14% # Class of executed instruction +system.cpu.op_class::FloatMisc 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatSqrt 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::SimdAdd 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::SimdAddAcc 0 0.00% 65.14% # Class of executed instruction @@ -99,8 +101,10 @@ system.cpu.op_class::SimdFloatMisc 0 0.00% 65.14% # Cl system.cpu.op_class::SimdFloatMult 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::SimdFloatMultAcc 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::SimdFloatSqrt 0 0.00% 65.14% # Class of executed instruction -system.cpu.op_class::MemRead 56649587 25.59% 90.73% # Class of executed instruction -system.cpu.op_class::MemWrite 20515717 9.27% 100.00% # Class of executed instruction +system.cpu.op_class::MemRead 55945136 25.27% 90.41% # Class of executed instruction +system.cpu.op_class::MemWrite 20410230 9.22% 99.63% # Class of executed instruction +system.cpu.op_class::FloatMemRead 704451 0.32% 99.95% # Class of executed instruction +system.cpu.op_class::FloatMemWrite 105487 0.05% 100.00% # Class of executed instruction system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 221363385 # Class of executed instruction |